diff options
author | Shahed Shaikh <shahed.shaikh@qlogic.com> | 2012-11-23 18:56:52 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-11-25 16:12:59 -0500 |
commit | 63507592e3524405ce8b4887b61ebb3b60c10de2 (patch) | |
tree | 1baa0c46b0e202a95a64077703efaa6e03207271 /drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |
parent | 82167cb8c6b2f8166d5c7532e5ef4b5e0cc46a72 (diff) |
qlcnic: fix sparse check endian warnings
Signed-off-by: Shahed Shaikh <shahed.shaikh@qlogic.com>
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qlcnic/qlcnic.h')
-rw-r--r-- | drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 224 |
1 files changed, 151 insertions, 73 deletions
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h index 8b3d3b388735..ec29f7988d42 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |||
@@ -280,16 +280,16 @@ struct status_desc { | |||
280 | #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29 | 280 | #define QLCNIC_UNI_FIRMWARE_IDX_OFF 29 |
281 | 281 | ||
282 | struct uni_table_desc{ | 282 | struct uni_table_desc{ |
283 | u32 findex; | 283 | __le32 findex; |
284 | u32 num_entries; | 284 | __le32 num_entries; |
285 | u32 entry_size; | 285 | __le32 entry_size; |
286 | u32 reserved[5]; | 286 | __le32 reserved[5]; |
287 | }; | 287 | }; |
288 | 288 | ||
289 | struct uni_data_desc{ | 289 | struct uni_data_desc{ |
290 | u32 findex; | 290 | __le32 findex; |
291 | u32 size; | 291 | __le32 size; |
292 | u32 reserved[5]; | 292 | __le32 reserved[5]; |
293 | }; | 293 | }; |
294 | 294 | ||
295 | /* Flash Defines and Structures */ | 295 | /* Flash Defines and Structures */ |
@@ -416,19 +416,19 @@ struct qlcnic_nic_intr_coalesce { | |||
416 | }; | 416 | }; |
417 | 417 | ||
418 | struct qlcnic_dump_template_hdr { | 418 | struct qlcnic_dump_template_hdr { |
419 | __le32 type; | 419 | u32 type; |
420 | __le32 offset; | 420 | u32 offset; |
421 | __le32 size; | 421 | u32 size; |
422 | __le32 cap_mask; | 422 | u32 cap_mask; |
423 | __le32 num_entries; | 423 | u32 num_entries; |
424 | __le32 version; | 424 | u32 version; |
425 | __le32 timestamp; | 425 | u32 timestamp; |
426 | __le32 checksum; | 426 | u32 checksum; |
427 | __le32 drv_cap_mask; | 427 | u32 drv_cap_mask; |
428 | __le32 sys_info[3]; | 428 | u32 sys_info[3]; |
429 | __le32 saved_state[16]; | 429 | u32 saved_state[16]; |
430 | __le32 cap_sizes[8]; | 430 | u32 cap_sizes[8]; |
431 | __le32 rsvd[0]; | 431 | u32 rsvd[0]; |
432 | }; | 432 | }; |
433 | 433 | ||
434 | struct qlcnic_fw_dump { | 434 | struct qlcnic_fw_dump { |
@@ -1065,16 +1065,16 @@ struct qlcnic_adapter { | |||
1065 | 1065 | ||
1066 | spinlock_t tx_clean_lock; | 1066 | spinlock_t tx_clean_lock; |
1067 | spinlock_t mac_learn_lock; | 1067 | spinlock_t mac_learn_lock; |
1068 | __le32 file_prd_off; /*File fw product offset*/ | 1068 | u32 file_prd_off; /*File fw product offset*/ |
1069 | u32 fw_version; | 1069 | u32 fw_version; |
1070 | const struct firmware *fw; | 1070 | const struct firmware *fw; |
1071 | }; | 1071 | }; |
1072 | 1072 | ||
1073 | struct qlcnic_info { | 1073 | struct qlcnic_info_le { |
1074 | __le16 pci_func; | 1074 | __le16 pci_func; |
1075 | __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */ | 1075 | __le16 op_mode; /* 1 = Priv, 2 = NP, 3 = NP passthru */ |
1076 | __le16 phys_port; | 1076 | __le16 phys_port; |
1077 | __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */ | 1077 | __le16 switch_mode; /* 0 = disabled, 1 = int, 2 = ext */ |
1078 | 1078 | ||
1079 | __le32 capabilities; | 1079 | __le32 capabilities; |
1080 | u8 max_mac_filters; | 1080 | u8 max_mac_filters; |
@@ -1088,13 +1088,28 @@ struct qlcnic_info { | |||
1088 | u8 reserved2[104]; | 1088 | u8 reserved2[104]; |
1089 | } __packed; | 1089 | } __packed; |
1090 | 1090 | ||
1091 | struct qlcnic_pci_info { | 1091 | struct qlcnic_info { |
1092 | __le16 id; /* pci function id */ | 1092 | u16 pci_func; |
1093 | __le16 active; /* 1 = Enabled */ | 1093 | u16 op_mode; |
1094 | __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */ | 1094 | u16 phys_port; |
1095 | __le16 default_port; /* default port number */ | 1095 | u16 switch_mode; |
1096 | u32 capabilities; | ||
1097 | u8 max_mac_filters; | ||
1098 | u8 reserved1; | ||
1099 | u16 max_mtu; | ||
1100 | u16 max_tx_ques; | ||
1101 | u16 max_rx_ques; | ||
1102 | u16 min_tx_bw; | ||
1103 | u16 max_tx_bw; | ||
1104 | }; | ||
1096 | 1105 | ||
1097 | __le16 tx_min_bw; /* Multiple of 100mbpc */ | 1106 | struct qlcnic_pci_info_le { |
1107 | __le16 id; /* pci function id */ | ||
1108 | __le16 active; /* 1 = Enabled */ | ||
1109 | __le16 type; /* 1 = NIC, 2 = FCoE, 3 = iSCSI */ | ||
1110 | __le16 default_port; /* default port number */ | ||
1111 | |||
1112 | __le16 tx_min_bw; /* Multiple of 100mbpc */ | ||
1098 | __le16 tx_max_bw; | 1113 | __le16 tx_max_bw; |
1099 | __le16 reserved1[2]; | 1114 | __le16 reserved1[2]; |
1100 | 1115 | ||
@@ -1102,6 +1117,16 @@ struct qlcnic_pci_info { | |||
1102 | u8 reserved2[106]; | 1117 | u8 reserved2[106]; |
1103 | } __packed; | 1118 | } __packed; |
1104 | 1119 | ||
1120 | struct qlcnic_pci_info { | ||
1121 | u16 id; | ||
1122 | u16 active; | ||
1123 | u16 type; | ||
1124 | u16 default_port; | ||
1125 | u16 tx_min_bw; | ||
1126 | u16 tx_max_bw; | ||
1127 | u8 mac[ETH_ALEN]; | ||
1128 | }; | ||
1129 | |||
1105 | struct qlcnic_npar_info { | 1130 | struct qlcnic_npar_info { |
1106 | u16 pvid; | 1131 | u16 pvid; |
1107 | u16 min_bw; | 1132 | u16 min_bw; |
@@ -1208,7 +1233,7 @@ do { \ | |||
1208 | (VAL1) += (VAL2); \ | 1233 | (VAL1) += (VAL2); \ |
1209 | } while (0) | 1234 | } while (0) |
1210 | 1235 | ||
1211 | struct qlcnic_mac_statistics{ | 1236 | struct qlcnic_mac_statistics_le { |
1212 | __le64 mac_tx_frames; | 1237 | __le64 mac_tx_frames; |
1213 | __le64 mac_tx_bytes; | 1238 | __le64 mac_tx_bytes; |
1214 | __le64 mac_tx_mcast_pkts; | 1239 | __le64 mac_tx_mcast_pkts; |
@@ -1248,7 +1273,45 @@ struct qlcnic_mac_statistics{ | |||
1248 | __le64 mac_align_error; | 1273 | __le64 mac_align_error; |
1249 | } __packed; | 1274 | } __packed; |
1250 | 1275 | ||
1251 | struct __qlcnic_esw_statistics { | 1276 | struct qlcnic_mac_statistics { |
1277 | u64 mac_tx_frames; | ||
1278 | u64 mac_tx_bytes; | ||
1279 | u64 mac_tx_mcast_pkts; | ||
1280 | u64 mac_tx_bcast_pkts; | ||
1281 | u64 mac_tx_pause_cnt; | ||
1282 | u64 mac_tx_ctrl_pkt; | ||
1283 | u64 mac_tx_lt_64b_pkts; | ||
1284 | u64 mac_tx_lt_127b_pkts; | ||
1285 | u64 mac_tx_lt_255b_pkts; | ||
1286 | u64 mac_tx_lt_511b_pkts; | ||
1287 | u64 mac_tx_lt_1023b_pkts; | ||
1288 | u64 mac_tx_lt_1518b_pkts; | ||
1289 | u64 mac_tx_gt_1518b_pkts; | ||
1290 | u64 rsvd1[3]; | ||
1291 | u64 mac_rx_frames; | ||
1292 | u64 mac_rx_bytes; | ||
1293 | u64 mac_rx_mcast_pkts; | ||
1294 | u64 mac_rx_bcast_pkts; | ||
1295 | u64 mac_rx_pause_cnt; | ||
1296 | u64 mac_rx_ctrl_pkt; | ||
1297 | u64 mac_rx_lt_64b_pkts; | ||
1298 | u64 mac_rx_lt_127b_pkts; | ||
1299 | u64 mac_rx_lt_255b_pkts; | ||
1300 | u64 mac_rx_lt_511b_pkts; | ||
1301 | u64 mac_rx_lt_1023b_pkts; | ||
1302 | u64 mac_rx_lt_1518b_pkts; | ||
1303 | u64 mac_rx_gt_1518b_pkts; | ||
1304 | u64 rsvd2[3]; | ||
1305 | u64 mac_rx_length_error; | ||
1306 | u64 mac_rx_length_small; | ||
1307 | u64 mac_rx_length_large; | ||
1308 | u64 mac_rx_jabber; | ||
1309 | u64 mac_rx_dropped; | ||
1310 | u64 mac_rx_crc_error; | ||
1311 | u64 mac_align_error; | ||
1312 | }; | ||
1313 | |||
1314 | struct qlcnic_esw_stats_le { | ||
1252 | __le16 context_id; | 1315 | __le16 context_id; |
1253 | __le16 version; | 1316 | __le16 version; |
1254 | __le16 size; | 1317 | __le16 size; |
@@ -1263,54 +1326,69 @@ struct __qlcnic_esw_statistics { | |||
1263 | __le64 rsvd[3]; | 1326 | __le64 rsvd[3]; |
1264 | } __packed; | 1327 | } __packed; |
1265 | 1328 | ||
1329 | struct __qlcnic_esw_statistics { | ||
1330 | u16 context_id; | ||
1331 | u16 version; | ||
1332 | u16 size; | ||
1333 | u16 unused; | ||
1334 | u64 unicast_frames; | ||
1335 | u64 multicast_frames; | ||
1336 | u64 broadcast_frames; | ||
1337 | u64 dropped_frames; | ||
1338 | u64 errors; | ||
1339 | u64 local_frames; | ||
1340 | u64 numbytes; | ||
1341 | u64 rsvd[3]; | ||
1342 | }; | ||
1343 | |||
1266 | struct qlcnic_esw_statistics { | 1344 | struct qlcnic_esw_statistics { |
1267 | struct __qlcnic_esw_statistics rx; | 1345 | struct __qlcnic_esw_statistics rx; |
1268 | struct __qlcnic_esw_statistics tx; | 1346 | struct __qlcnic_esw_statistics tx; |
1269 | }; | 1347 | }; |
1270 | 1348 | ||
1271 | struct qlcnic_common_entry_hdr { | 1349 | struct qlcnic_common_entry_hdr { |
1272 | __le32 type; | 1350 | u32 type; |
1273 | __le32 offset; | 1351 | u32 offset; |
1274 | __le32 cap_size; | 1352 | u32 cap_size; |
1275 | u8 mask; | 1353 | u8 mask; |
1276 | u8 rsvd[2]; | 1354 | u8 rsvd[2]; |
1277 | u8 flags; | 1355 | u8 flags; |
1278 | } __packed; | 1356 | } __packed; |
1279 | 1357 | ||
1280 | struct __crb { | 1358 | struct __crb { |
1281 | __le32 addr; | 1359 | u32 addr; |
1282 | u8 stride; | 1360 | u8 stride; |
1283 | u8 rsvd1[3]; | 1361 | u8 rsvd1[3]; |
1284 | __le32 data_size; | 1362 | u32 data_size; |
1285 | __le32 no_ops; | 1363 | u32 no_ops; |
1286 | __le32 rsvd2[4]; | 1364 | u32 rsvd2[4]; |
1287 | } __packed; | 1365 | } __packed; |
1288 | 1366 | ||
1289 | struct __ctrl { | 1367 | struct __ctrl { |
1290 | __le32 addr; | 1368 | u32 addr; |
1291 | u8 stride; | 1369 | u8 stride; |
1292 | u8 index_a; | 1370 | u8 index_a; |
1293 | __le16 timeout; | 1371 | u16 timeout; |
1294 | __le32 data_size; | 1372 | u32 data_size; |
1295 | __le32 no_ops; | 1373 | u32 no_ops; |
1296 | u8 opcode; | 1374 | u8 opcode; |
1297 | u8 index_v; | 1375 | u8 index_v; |
1298 | u8 shl_val; | 1376 | u8 shl_val; |
1299 | u8 shr_val; | 1377 | u8 shr_val; |
1300 | __le32 val1; | 1378 | u32 val1; |
1301 | __le32 val2; | 1379 | u32 val2; |
1302 | __le32 val3; | 1380 | u32 val3; |
1303 | } __packed; | 1381 | } __packed; |
1304 | 1382 | ||
1305 | struct __cache { | 1383 | struct __cache { |
1306 | __le32 addr; | 1384 | u32 addr; |
1307 | __le16 stride; | 1385 | u16 stride; |
1308 | __le16 init_tag_val; | 1386 | u16 init_tag_val; |
1309 | __le32 size; | 1387 | u32 size; |
1310 | __le32 no_ops; | 1388 | u32 no_ops; |
1311 | __le32 ctrl_addr; | 1389 | u32 ctrl_addr; |
1312 | __le32 ctrl_val; | 1390 | u32 ctrl_val; |
1313 | __le32 read_addr; | 1391 | u32 read_addr; |
1314 | u8 read_addr_stride; | 1392 | u8 read_addr_stride; |
1315 | u8 read_addr_num; | 1393 | u8 read_addr_num; |
1316 | u8 rsvd1[2]; | 1394 | u8 rsvd1[2]; |
@@ -1318,38 +1396,38 @@ struct __cache { | |||
1318 | 1396 | ||
1319 | struct __ocm { | 1397 | struct __ocm { |
1320 | u8 rsvd[8]; | 1398 | u8 rsvd[8]; |
1321 | __le32 size; | 1399 | u32 size; |
1322 | __le32 no_ops; | 1400 | u32 no_ops; |
1323 | u8 rsvd1[8]; | 1401 | u8 rsvd1[8]; |
1324 | __le32 read_addr; | 1402 | u32 read_addr; |
1325 | __le32 read_addr_stride; | 1403 | u32 read_addr_stride; |
1326 | } __packed; | 1404 | } __packed; |
1327 | 1405 | ||
1328 | struct __mem { | 1406 | struct __mem { |
1329 | u8 rsvd[24]; | 1407 | u8 rsvd[24]; |
1330 | __le32 addr; | 1408 | u32 addr; |
1331 | __le32 size; | 1409 | u32 size; |
1332 | } __packed; | 1410 | } __packed; |
1333 | 1411 | ||
1334 | struct __mux { | 1412 | struct __mux { |
1335 | __le32 addr; | 1413 | u32 addr; |
1336 | u8 rsvd[4]; | 1414 | u8 rsvd[4]; |
1337 | __le32 size; | 1415 | u32 size; |
1338 | __le32 no_ops; | 1416 | u32 no_ops; |
1339 | __le32 val; | 1417 | u32 val; |
1340 | __le32 val_stride; | 1418 | u32 val_stride; |
1341 | __le32 read_addr; | 1419 | u32 read_addr; |
1342 | u8 rsvd2[4]; | 1420 | u8 rsvd2[4]; |
1343 | } __packed; | 1421 | } __packed; |
1344 | 1422 | ||
1345 | struct __queue { | 1423 | struct __queue { |
1346 | __le32 sel_addr; | 1424 | u32 sel_addr; |
1347 | __le16 stride; | 1425 | u16 stride; |
1348 | u8 rsvd[2]; | 1426 | u8 rsvd[2]; |
1349 | __le32 size; | 1427 | u32 size; |
1350 | __le32 no_ops; | 1428 | u32 no_ops; |
1351 | u8 rsvd2[8]; | 1429 | u8 rsvd2[8]; |
1352 | __le32 read_addr; | 1430 | u32 read_addr; |
1353 | u8 read_addr_stride; | 1431 | u8 read_addr_stride; |
1354 | u8 read_addr_cnt; | 1432 | u8 read_addr_cnt; |
1355 | u8 rsvd3[2]; | 1433 | u8 rsvd3[2]; |
@@ -1413,8 +1491,8 @@ enum op_codes { | |||
1413 | 1491 | ||
1414 | struct qlcnic_dump_operations { | 1492 | struct qlcnic_dump_operations { |
1415 | enum op_codes opcode; | 1493 | enum op_codes opcode; |
1416 | u32 (*handler)(struct qlcnic_adapter *, | 1494 | u32 (*handler)(struct qlcnic_adapter *, struct qlcnic_dump_entry *, |
1417 | struct qlcnic_dump_entry *, u32 *); | 1495 | __le32 *); |
1418 | }; | 1496 | }; |
1419 | 1497 | ||
1420 | struct _cdrp_cmd { | 1498 | struct _cdrp_cmd { |