diff options
author | Sony Chacko <sony.chacko@qlogic.com> | 2012-11-27 23:34:30 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-11-28 11:07:44 -0500 |
commit | 58634e74e66dd14407176d8620c76bae299ddb02 (patch) | |
tree | a9d9966c4a9b8a94ec1cdfa2784ecfc882221f66 /drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |
parent | b66e29c9fda1b7288ec2504a6bc730654bff12b2 (diff) |
qlcnic: create file qlcnic_minidump.c for dump utility
Physical refactoring of 82xx adapter register dump utility.
Move register dump routines to new file qlcnic_minidump.c
Existing register dump routines has coding style issues, the code
is moved to the new file without fixing the style issues.
There is a seperate patch to fix the style issues in qlcnic_minidump.c
Signed-off-by: Sony Chacko <sony.chacko@qlogic.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/qlogic/qlcnic/qlcnic.h')
-rw-r--r-- | drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | 143 |
1 files changed, 2 insertions, 141 deletions
diff --git a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h index 618e5ec5506c..082eecbf4148 100644 --- a/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h +++ b/drivers/net/ethernet/qlogic/qlcnic/qlcnic.h | |||
@@ -1255,142 +1255,7 @@ struct qlcnic_esw_statistics { | |||
1255 | struct __qlcnic_esw_statistics tx; | 1255 | struct __qlcnic_esw_statistics tx; |
1256 | }; | 1256 | }; |
1257 | 1257 | ||
1258 | struct qlcnic_common_entry_hdr { | ||
1259 | u32 type; | ||
1260 | u32 offset; | ||
1261 | u32 cap_size; | ||
1262 | u8 mask; | ||
1263 | u8 rsvd[2]; | ||
1264 | u8 flags; | ||
1265 | } __packed; | ||
1266 | |||
1267 | struct __crb { | ||
1268 | u32 addr; | ||
1269 | u8 stride; | ||
1270 | u8 rsvd1[3]; | ||
1271 | u32 data_size; | ||
1272 | u32 no_ops; | ||
1273 | u32 rsvd2[4]; | ||
1274 | } __packed; | ||
1275 | |||
1276 | struct __ctrl { | ||
1277 | u32 addr; | ||
1278 | u8 stride; | ||
1279 | u8 index_a; | ||
1280 | u16 timeout; | ||
1281 | u32 data_size; | ||
1282 | u32 no_ops; | ||
1283 | u8 opcode; | ||
1284 | u8 index_v; | ||
1285 | u8 shl_val; | ||
1286 | u8 shr_val; | ||
1287 | u32 val1; | ||
1288 | u32 val2; | ||
1289 | u32 val3; | ||
1290 | } __packed; | ||
1291 | |||
1292 | struct __cache { | ||
1293 | u32 addr; | ||
1294 | u16 stride; | ||
1295 | u16 init_tag_val; | ||
1296 | u32 size; | ||
1297 | u32 no_ops; | ||
1298 | u32 ctrl_addr; | ||
1299 | u32 ctrl_val; | ||
1300 | u32 read_addr; | ||
1301 | u8 read_addr_stride; | ||
1302 | u8 read_addr_num; | ||
1303 | u8 rsvd1[2]; | ||
1304 | } __packed; | ||
1305 | |||
1306 | struct __ocm { | ||
1307 | u8 rsvd[8]; | ||
1308 | u32 size; | ||
1309 | u32 no_ops; | ||
1310 | u8 rsvd1[8]; | ||
1311 | u32 read_addr; | ||
1312 | u32 read_addr_stride; | ||
1313 | } __packed; | ||
1314 | |||
1315 | struct __mem { | ||
1316 | u8 rsvd[24]; | ||
1317 | u32 addr; | ||
1318 | u32 size; | ||
1319 | } __packed; | ||
1320 | |||
1321 | struct __mux { | ||
1322 | u32 addr; | ||
1323 | u8 rsvd[4]; | ||
1324 | u32 size; | ||
1325 | u32 no_ops; | ||
1326 | u32 val; | ||
1327 | u32 val_stride; | ||
1328 | u32 read_addr; | ||
1329 | u8 rsvd2[4]; | ||
1330 | } __packed; | ||
1331 | |||
1332 | struct __queue { | ||
1333 | u32 sel_addr; | ||
1334 | u16 stride; | ||
1335 | u8 rsvd[2]; | ||
1336 | u32 size; | ||
1337 | u32 no_ops; | ||
1338 | u8 rsvd2[8]; | ||
1339 | u32 read_addr; | ||
1340 | u8 read_addr_stride; | ||
1341 | u8 read_addr_cnt; | ||
1342 | u8 rsvd3[2]; | ||
1343 | } __packed; | ||
1344 | |||
1345 | struct qlcnic_dump_entry { | ||
1346 | struct qlcnic_common_entry_hdr hdr; | ||
1347 | union { | ||
1348 | struct __crb crb; | ||
1349 | struct __cache cache; | ||
1350 | struct __ocm ocm; | ||
1351 | struct __mem mem; | ||
1352 | struct __mux mux; | ||
1353 | struct __queue que; | ||
1354 | struct __ctrl ctrl; | ||
1355 | } region; | ||
1356 | } __packed; | ||
1357 | |||
1358 | enum op_codes { | ||
1359 | QLCNIC_DUMP_NOP = 0, | ||
1360 | QLCNIC_DUMP_READ_CRB = 1, | ||
1361 | QLCNIC_DUMP_READ_MUX = 2, | ||
1362 | QLCNIC_DUMP_QUEUE = 3, | ||
1363 | QLCNIC_DUMP_BRD_CONFIG = 4, | ||
1364 | QLCNIC_DUMP_READ_OCM = 6, | ||
1365 | QLCNIC_DUMP_PEG_REG = 7, | ||
1366 | QLCNIC_DUMP_L1_DTAG = 8, | ||
1367 | QLCNIC_DUMP_L1_ITAG = 9, | ||
1368 | QLCNIC_DUMP_L1_DATA = 11, | ||
1369 | QLCNIC_DUMP_L1_INST = 12, | ||
1370 | QLCNIC_DUMP_L2_DTAG = 21, | ||
1371 | QLCNIC_DUMP_L2_ITAG = 22, | ||
1372 | QLCNIC_DUMP_L2_DATA = 23, | ||
1373 | QLCNIC_DUMP_L2_INST = 24, | ||
1374 | QLCNIC_DUMP_READ_ROM = 71, | ||
1375 | QLCNIC_DUMP_READ_MEM = 72, | ||
1376 | QLCNIC_DUMP_READ_CTRL = 98, | ||
1377 | QLCNIC_DUMP_TLHDR = 99, | ||
1378 | QLCNIC_DUMP_RDEND = 255 | ||
1379 | }; | ||
1380 | |||
1381 | #define QLCNIC_DUMP_WCRB BIT_0 | ||
1382 | #define QLCNIC_DUMP_RWCRB BIT_1 | ||
1383 | #define QLCNIC_DUMP_ANDCRB BIT_2 | ||
1384 | #define QLCNIC_DUMP_ORCRB BIT_3 | ||
1385 | #define QLCNIC_DUMP_POLLCRB BIT_4 | ||
1386 | #define QLCNIC_DUMP_RD_SAVE BIT_5 | ||
1387 | #define QLCNIC_DUMP_WRT_SAVED BIT_6 | ||
1388 | #define QLCNIC_DUMP_MOD_SAVE_ST BIT_7 | ||
1389 | #define QLCNIC_DUMP_SKIP BIT_7 | ||
1390 | |||
1391 | #define QLCNIC_DUMP_MASK_MIN 3 | ||
1392 | #define QLCNIC_DUMP_MASK_DEF 0x1f | 1258 | #define QLCNIC_DUMP_MASK_DEF 0x1f |
1393 | #define QLCNIC_DUMP_MASK_MAX 0xff | ||
1394 | #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed | 1259 | #define QLCNIC_FORCE_FW_DUMP_KEY 0xdeadfeed |
1395 | #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed | 1260 | #define QLCNIC_ENABLE_FW_DUMP 0xaddfeed |
1396 | #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed | 1261 | #define QLCNIC_DISABLE_FW_DUMP 0xbadfeed |
@@ -1398,12 +1263,6 @@ enum op_codes { | |||
1398 | #define QLCNIC_SET_QUIESCENT 0xadd00010 | 1263 | #define QLCNIC_SET_QUIESCENT 0xadd00010 |
1399 | #define QLCNIC_RESET_QUIESCENT 0xadd00020 | 1264 | #define QLCNIC_RESET_QUIESCENT 0xadd00020 |
1400 | 1265 | ||
1401 | struct qlcnic_dump_operations { | ||
1402 | enum op_codes opcode; | ||
1403 | u32 (*handler)(struct qlcnic_adapter *, struct qlcnic_dump_entry *, | ||
1404 | __le32 *); | ||
1405 | }; | ||
1406 | |||
1407 | struct _cdrp_cmd { | 1266 | struct _cdrp_cmd { |
1408 | u32 cmd; | 1267 | u32 cmd; |
1409 | u32 arg1; | 1268 | u32 arg1; |
@@ -1461,6 +1320,8 @@ void qlcnic_pcie_sem_unlock(struct qlcnic_adapter *, int); | |||
1461 | #define __QLCNIC_MAX_LED_RATE 0xf | 1320 | #define __QLCNIC_MAX_LED_RATE 0xf |
1462 | #define __QLCNIC_MAX_LED_STATE 0x2 | 1321 | #define __QLCNIC_MAX_LED_STATE 0x2 |
1463 | 1322 | ||
1323 | #define MAX_CTL_CHECK 1000 | ||
1324 | |||
1464 | int qlcnic_get_board_info(struct qlcnic_adapter *adapter); | 1325 | int qlcnic_get_board_info(struct qlcnic_adapter *adapter); |
1465 | int qlcnic_wol_supported(struct qlcnic_adapter *adapter); | 1326 | int qlcnic_wol_supported(struct qlcnic_adapter *adapter); |
1466 | int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state, u32 rate); | 1327 | int qlcnic_config_led(struct qlcnic_adapter *adapter, u32 state, u32 rate); |