diff options
author | David S. Miller <davem@davemloft.net> | 2012-11-10 18:32:51 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-11-10 18:32:51 -0500 |
commit | d4185bbf62a5d8d777ee445db1581beb17882a07 (patch) | |
tree | 024b0badbd7c970b1983be6d8c345cc4a290cb31 /drivers/net/ethernet/oki-semi/pch_gbe | |
parent | c075b13098b399dc565b4d53f42047a8d40ed3ba (diff) | |
parent | a375413311b39005ef281bfd71ae8f4e3df22e97 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net
Conflicts:
drivers/net/ethernet/broadcom/bnx2x/bnx2x_main.c
Minor conflict between the BCM_CNIC define removal in net-next
and a bug fix added to net. Based upon a conflict resolution
patch posted by Stephen Rothwell.
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/oki-semi/pch_gbe')
-rw-r--r-- | drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | 116 |
1 files changed, 37 insertions, 79 deletions
diff --git a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c index 499249a15e88..39ab4d09faaa 100644 --- a/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c +++ b/drivers/net/ethernet/oki-semi/pch_gbe/pch_gbe_main.c | |||
@@ -333,26 +333,6 @@ static void pch_gbe_wait_clr_bit(void *reg, u32 bit) | |||
333 | } | 333 | } |
334 | 334 | ||
335 | /** | 335 | /** |
336 | * pch_gbe_wait_clr_bit_irq - Wait to clear a bit for interrupt context | ||
337 | * @reg: Pointer of register | ||
338 | * @busy: Busy bit | ||
339 | */ | ||
340 | static int pch_gbe_wait_clr_bit_irq(void *reg, u32 bit) | ||
341 | { | ||
342 | u32 tmp; | ||
343 | int ret = -1; | ||
344 | /* wait busy */ | ||
345 | tmp = 20; | ||
346 | while ((ioread32(reg) & bit) && --tmp) | ||
347 | udelay(5); | ||
348 | if (!tmp) | ||
349 | pr_err("Error: busy bit is not cleared\n"); | ||
350 | else | ||
351 | ret = 0; | ||
352 | return ret; | ||
353 | } | ||
354 | |||
355 | /** | ||
356 | * pch_gbe_mac_mar_set - Set MAC address register | 336 | * pch_gbe_mac_mar_set - Set MAC address register |
357 | * @hw: Pointer to the HW structure | 337 | * @hw: Pointer to the HW structure |
358 | * @addr: Pointer to the MAC address | 338 | * @addr: Pointer to the MAC address |
@@ -403,15 +383,20 @@ static void pch_gbe_mac_reset_hw(struct pch_gbe_hw *hw) | |||
403 | return; | 383 | return; |
404 | } | 384 | } |
405 | 385 | ||
406 | static void pch_gbe_mac_reset_rx(struct pch_gbe_hw *hw) | 386 | static void pch_gbe_disable_mac_rx(struct pch_gbe_hw *hw) |
407 | { | 387 | { |
408 | /* Read the MAC addresses. and store to the private data */ | 388 | u32 rctl; |
409 | pch_gbe_mac_read_mac_addr(hw); | 389 | /* Disables Receive MAC */ |
410 | iowrite32(PCH_GBE_RX_RST, &hw->reg->RESET); | 390 | rctl = ioread32(&hw->reg->MAC_RX_EN); |
411 | pch_gbe_wait_clr_bit_irq(&hw->reg->RESET, PCH_GBE_RX_RST); | 391 | iowrite32((rctl & ~PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN); |
412 | /* Setup the MAC addresses */ | 392 | } |
413 | pch_gbe_mac_mar_set(hw, hw->mac.addr, 0); | 393 | |
414 | return; | 394 | static void pch_gbe_enable_mac_rx(struct pch_gbe_hw *hw) |
395 | { | ||
396 | u32 rctl; | ||
397 | /* Enables Receive MAC */ | ||
398 | rctl = ioread32(&hw->reg->MAC_RX_EN); | ||
399 | iowrite32((rctl | PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN); | ||
415 | } | 400 | } |
416 | 401 | ||
417 | /** | 402 | /** |
@@ -907,7 +892,7 @@ static void pch_gbe_setup_rctl(struct pch_gbe_adapter *adapter) | |||
907 | static void pch_gbe_configure_rx(struct pch_gbe_adapter *adapter) | 892 | static void pch_gbe_configure_rx(struct pch_gbe_adapter *adapter) |
908 | { | 893 | { |
909 | struct pch_gbe_hw *hw = &adapter->hw; | 894 | struct pch_gbe_hw *hw = &adapter->hw; |
910 | u32 rdba, rdlen, rctl, rxdma; | 895 | u32 rdba, rdlen, rxdma; |
911 | 896 | ||
912 | pr_debug("dma adr = 0x%08llx size = 0x%08x\n", | 897 | pr_debug("dma adr = 0x%08llx size = 0x%08x\n", |
913 | (unsigned long long)adapter->rx_ring->dma, | 898 | (unsigned long long)adapter->rx_ring->dma, |
@@ -915,9 +900,7 @@ static void pch_gbe_configure_rx(struct pch_gbe_adapter *adapter) | |||
915 | 900 | ||
916 | pch_gbe_mac_force_mac_fc(hw); | 901 | pch_gbe_mac_force_mac_fc(hw); |
917 | 902 | ||
918 | /* Disables Receive MAC */ | 903 | pch_gbe_disable_mac_rx(hw); |
919 | rctl = ioread32(&hw->reg->MAC_RX_EN); | ||
920 | iowrite32((rctl & ~PCH_GBE_MRE_MAC_RX_EN), &hw->reg->MAC_RX_EN); | ||
921 | 904 | ||
922 | /* Disables Receive DMA */ | 905 | /* Disables Receive DMA */ |
923 | rxdma = ioread32(&hw->reg->DMA_CTRL); | 906 | rxdma = ioread32(&hw->reg->DMA_CTRL); |
@@ -1308,38 +1291,17 @@ void pch_gbe_update_stats(struct pch_gbe_adapter *adapter) | |||
1308 | spin_unlock_irqrestore(&adapter->stats_lock, flags); | 1291 | spin_unlock_irqrestore(&adapter->stats_lock, flags); |
1309 | } | 1292 | } |
1310 | 1293 | ||
1311 | static void pch_gbe_stop_receive(struct pch_gbe_adapter *adapter) | 1294 | static void pch_gbe_disable_dma_rx(struct pch_gbe_hw *hw) |
1312 | { | 1295 | { |
1313 | struct pch_gbe_hw *hw = &adapter->hw; | ||
1314 | u32 rxdma; | 1296 | u32 rxdma; |
1315 | u16 value; | ||
1316 | int ret; | ||
1317 | 1297 | ||
1318 | /* Disable Receive DMA */ | 1298 | /* Disable Receive DMA */ |
1319 | rxdma = ioread32(&hw->reg->DMA_CTRL); | 1299 | rxdma = ioread32(&hw->reg->DMA_CTRL); |
1320 | rxdma &= ~PCH_GBE_RX_DMA_EN; | 1300 | rxdma &= ~PCH_GBE_RX_DMA_EN; |
1321 | iowrite32(rxdma, &hw->reg->DMA_CTRL); | 1301 | iowrite32(rxdma, &hw->reg->DMA_CTRL); |
1322 | /* Wait Rx DMA BUS is IDLE */ | ||
1323 | ret = pch_gbe_wait_clr_bit_irq(&hw->reg->RX_DMA_ST, PCH_GBE_IDLE_CHECK); | ||
1324 | if (ret) { | ||
1325 | /* Disable Bus master */ | ||
1326 | pci_read_config_word(adapter->pdev, PCI_COMMAND, &value); | ||
1327 | value &= ~PCI_COMMAND_MASTER; | ||
1328 | pci_write_config_word(adapter->pdev, PCI_COMMAND, value); | ||
1329 | /* Stop Receive */ | ||
1330 | pch_gbe_mac_reset_rx(hw); | ||
1331 | /* Enable Bus master */ | ||
1332 | value |= PCI_COMMAND_MASTER; | ||
1333 | pci_write_config_word(adapter->pdev, PCI_COMMAND, value); | ||
1334 | } else { | ||
1335 | /* Stop Receive */ | ||
1336 | pch_gbe_mac_reset_rx(hw); | ||
1337 | } | ||
1338 | /* reprogram multicast address register after reset */ | ||
1339 | pch_gbe_set_multi(adapter->netdev); | ||
1340 | } | 1302 | } |
1341 | 1303 | ||
1342 | static void pch_gbe_start_receive(struct pch_gbe_hw *hw) | 1304 | static void pch_gbe_enable_dma_rx(struct pch_gbe_hw *hw) |
1343 | { | 1305 | { |
1344 | u32 rxdma; | 1306 | u32 rxdma; |
1345 | 1307 | ||
@@ -1347,9 +1309,6 @@ static void pch_gbe_start_receive(struct pch_gbe_hw *hw) | |||
1347 | rxdma = ioread32(&hw->reg->DMA_CTRL); | 1309 | rxdma = ioread32(&hw->reg->DMA_CTRL); |
1348 | rxdma |= PCH_GBE_RX_DMA_EN; | 1310 | rxdma |= PCH_GBE_RX_DMA_EN; |
1349 | iowrite32(rxdma, &hw->reg->DMA_CTRL); | 1311 | iowrite32(rxdma, &hw->reg->DMA_CTRL); |
1350 | /* Enables Receive */ | ||
1351 | iowrite32(PCH_GBE_MRE_MAC_RX_EN, &hw->reg->MAC_RX_EN); | ||
1352 | return; | ||
1353 | } | 1312 | } |
1354 | 1313 | ||
1355 | /** | 1314 | /** |
@@ -1385,7 +1344,7 @@ static irqreturn_t pch_gbe_intr(int irq, void *data) | |||
1385 | int_en = ioread32(&hw->reg->INT_EN); | 1344 | int_en = ioread32(&hw->reg->INT_EN); |
1386 | iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR), | 1345 | iowrite32((int_en & ~PCH_GBE_INT_RX_FIFO_ERR), |
1387 | &hw->reg->INT_EN); | 1346 | &hw->reg->INT_EN); |
1388 | pch_gbe_stop_receive(adapter); | 1347 | pch_gbe_disable_dma_rx(&adapter->hw); |
1389 | int_st |= ioread32(&hw->reg->INT_ST); | 1348 | int_st |= ioread32(&hw->reg->INT_ST); |
1390 | int_st = int_st & ioread32(&hw->reg->INT_EN); | 1349 | int_st = int_st & ioread32(&hw->reg->INT_EN); |
1391 | } | 1350 | } |
@@ -1961,12 +1920,12 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter) | |||
1961 | struct net_device *netdev = adapter->netdev; | 1920 | struct net_device *netdev = adapter->netdev; |
1962 | struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; | 1921 | struct pch_gbe_tx_ring *tx_ring = adapter->tx_ring; |
1963 | struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; | 1922 | struct pch_gbe_rx_ring *rx_ring = adapter->rx_ring; |
1964 | int err; | 1923 | int err = -EINVAL; |
1965 | 1924 | ||
1966 | /* Ensure we have a valid MAC */ | 1925 | /* Ensure we have a valid MAC */ |
1967 | if (!is_valid_ether_addr(adapter->hw.mac.addr)) { | 1926 | if (!is_valid_ether_addr(adapter->hw.mac.addr)) { |
1968 | pr_err("Error: Invalid MAC address\n"); | 1927 | pr_err("Error: Invalid MAC address\n"); |
1969 | return -EINVAL; | 1928 | goto out; |
1970 | } | 1929 | } |
1971 | 1930 | ||
1972 | /* hardware has been reset, we need to reload some things */ | 1931 | /* hardware has been reset, we need to reload some things */ |
@@ -1979,18 +1938,19 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter) | |||
1979 | 1938 | ||
1980 | err = pch_gbe_request_irq(adapter); | 1939 | err = pch_gbe_request_irq(adapter); |
1981 | if (err) { | 1940 | if (err) { |
1982 | pr_err("Error: can't bring device up\n"); | 1941 | pr_err("Error: can't bring device up - irq request failed\n"); |
1983 | return err; | 1942 | goto out; |
1984 | } | 1943 | } |
1985 | err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count); | 1944 | err = pch_gbe_alloc_rx_buffers_pool(adapter, rx_ring, rx_ring->count); |
1986 | if (err) { | 1945 | if (err) { |
1987 | pr_err("Error: can't bring device up\n"); | 1946 | pr_err("Error: can't bring device up - alloc rx buffers pool failed\n"); |
1988 | return err; | 1947 | goto freeirq; |
1989 | } | 1948 | } |
1990 | pch_gbe_alloc_tx_buffers(adapter, tx_ring); | 1949 | pch_gbe_alloc_tx_buffers(adapter, tx_ring); |
1991 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count); | 1950 | pch_gbe_alloc_rx_buffers(adapter, rx_ring, rx_ring->count); |
1992 | adapter->tx_queue_len = netdev->tx_queue_len; | 1951 | adapter->tx_queue_len = netdev->tx_queue_len; |
1993 | pch_gbe_start_receive(&adapter->hw); | 1952 | pch_gbe_enable_dma_rx(&adapter->hw); |
1953 | pch_gbe_enable_mac_rx(&adapter->hw); | ||
1994 | 1954 | ||
1995 | mod_timer(&adapter->watchdog_timer, jiffies); | 1955 | mod_timer(&adapter->watchdog_timer, jiffies); |
1996 | 1956 | ||
@@ -1999,6 +1959,11 @@ int pch_gbe_up(struct pch_gbe_adapter *adapter) | |||
1999 | netif_start_queue(adapter->netdev); | 1959 | netif_start_queue(adapter->netdev); |
2000 | 1960 | ||
2001 | return 0; | 1961 | return 0; |
1962 | |||
1963 | freeirq: | ||
1964 | pch_gbe_free_irq(adapter); | ||
1965 | out: | ||
1966 | return err; | ||
2002 | } | 1967 | } |
2003 | 1968 | ||
2004 | /** | 1969 | /** |
@@ -2393,7 +2358,6 @@ static int pch_gbe_napi_poll(struct napi_struct *napi, int budget) | |||
2393 | int work_done = 0; | 2358 | int work_done = 0; |
2394 | bool poll_end_flag = false; | 2359 | bool poll_end_flag = false; |
2395 | bool cleaned = false; | 2360 | bool cleaned = false; |
2396 | u32 int_en; | ||
2397 | 2361 | ||
2398 | pr_debug("budget : %d\n", budget); | 2362 | pr_debug("budget : %d\n", budget); |
2399 | 2363 | ||
@@ -2410,19 +2374,13 @@ static int pch_gbe_napi_poll(struct napi_struct *napi, int budget) | |||
2410 | 2374 | ||
2411 | if (poll_end_flag) { | 2375 | if (poll_end_flag) { |
2412 | napi_complete(napi); | 2376 | napi_complete(napi); |
2413 | if (adapter->rx_stop_flag) { | ||
2414 | adapter->rx_stop_flag = false; | ||
2415 | pch_gbe_start_receive(&adapter->hw); | ||
2416 | } | ||
2417 | pch_gbe_irq_enable(adapter); | 2377 | pch_gbe_irq_enable(adapter); |
2418 | } else | 2378 | } |
2419 | if (adapter->rx_stop_flag) { | 2379 | |
2420 | adapter->rx_stop_flag = false; | 2380 | if (adapter->rx_stop_flag) { |
2421 | pch_gbe_start_receive(&adapter->hw); | 2381 | adapter->rx_stop_flag = false; |
2422 | int_en = ioread32(&adapter->hw.reg->INT_EN); | 2382 | pch_gbe_enable_dma_rx(&adapter->hw); |
2423 | iowrite32((int_en | PCH_GBE_INT_RX_FIFO_ERR), | 2383 | } |
2424 | &adapter->hw.reg->INT_EN); | ||
2425 | } | ||
2426 | 2384 | ||
2427 | pr_debug("poll_end_flag : %d work_done : %d budget : %d\n", | 2385 | pr_debug("poll_end_flag : %d work_done : %d budget : %d\n", |
2428 | poll_end_flag, work_done, budget); | 2386 | poll_end_flag, work_done, budget); |