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authorBen Dooks <ben@simtec.co.uk>2011-11-21 03:58:00 -0500
committerDavid S. Miller <davem@davemloft.net>2011-11-26 14:59:40 -0500
commit51b7b1c34e195886e38ee93ff2a8a203745f897f (patch)
tree88069709e21b0d206fc6619e5737be398e105aa0 /drivers/net/ethernet/micrel/ks8851.c
parent32f160d96514a15cc52b708d8a8b9742bc3acd5d (diff)
KSZ8851-SNL: Add ethtool support for EEPROM via eeprom_93cx6
Add ethtool EEPROM read/write support using the eeprom_93cx6 library instead of open-coding the functions. Depends on eeprom_93cx6 driver getting EEPROM write support. Signed-off-by: Ben Dooks <ben@simtec.co.uk> Signed-off-by: Simtec Linux Team <linux@simtec.co.uk> [sboyd@codeaurora.org: Removed previous eeprom implementation] Signed-off-by: Stephen Boyd <sboyd@codeaurora.org> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/micrel/ks8851.c')
-rw-r--r--drivers/net/ethernet/micrel/ks8851.c425
1 files changed, 117 insertions, 308 deletions
diff --git a/drivers/net/ethernet/micrel/ks8851.c b/drivers/net/ethernet/micrel/ks8851.c
index 208e25a9e08c..6b35e7da9a9c 100644
--- a/drivers/net/ethernet/micrel/ks8851.c
+++ b/drivers/net/ethernet/micrel/ks8851.c
@@ -22,6 +22,7 @@
22#include <linux/cache.h> 22#include <linux/cache.h>
23#include <linux/crc32.h> 23#include <linux/crc32.h>
24#include <linux/mii.h> 24#include <linux/mii.h>
25#include <linux/eeprom_93cx6.h>
25 26
26#include <linux/spi/spi.h> 27#include <linux/spi/spi.h>
27 28
@@ -82,6 +83,7 @@ union ks8851_tx_hdr {
82 * @rc_ccr: Cached copy of KS_CCR. 83 * @rc_ccr: Cached copy of KS_CCR.
83 * @rc_rxqcr: Cached copy of KS_RXQCR. 84 * @rc_rxqcr: Cached copy of KS_RXQCR.
84 * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom 85 * @eeprom_size: Companion eeprom size in Bytes, 0 if no eeprom
86 * @eeprom: 93CX6 EEPROM state for accessing on-board EEPROM.
85 * 87 *
86 * The @lock ensures that the chip is protected when certain operations are 88 * The @lock ensures that the chip is protected when certain operations are
87 * in progress. When the read or write packet transfer is in progress, most 89 * in progress. When the read or write packet transfer is in progress, most
@@ -128,6 +130,8 @@ struct ks8851_net {
128 struct spi_message spi_msg2; 130 struct spi_message spi_msg2;
129 struct spi_transfer spi_xfer1; 131 struct spi_transfer spi_xfer1;
130 struct spi_transfer spi_xfer2[2]; 132 struct spi_transfer spi_xfer2[2];
133
134 struct eeprom_93cx6 eeprom;
131}; 135};
132 136
133static int msg_enable; 137static int msg_enable;
@@ -1071,234 +1075,6 @@ static const struct net_device_ops ks8851_netdev_ops = {
1071 .ndo_validate_addr = eth_validate_addr, 1075 .ndo_validate_addr = eth_validate_addr,
1072}; 1076};
1073 1077
1074/* Companion eeprom access */
1075
1076enum { /* EEPROM programming states */
1077 EEPROM_CONTROL,
1078 EEPROM_ADDRESS,
1079 EEPROM_DATA,
1080 EEPROM_COMPLETE
1081};
1082
1083/**
1084 * ks8851_eeprom_read - read a 16bits word in ks8851 companion EEPROM
1085 * @dev: The network device the PHY is on.
1086 * @addr: EEPROM address to read
1087 *
1088 * eeprom_size: used to define the data coding length. Can be changed
1089 * through debug-fs.
1090 *
1091 * Programs a read on the EEPROM using ks8851 EEPROM SW access feature.
1092 * Warning: The READ feature is not supported on ks8851 revision 0.
1093 *
1094 * Rough programming model:
1095 * - on period start: set clock high and read value on bus
1096 * - on period / 2: set clock low and program value on bus
1097 * - start on period / 2
1098 */
1099unsigned int ks8851_eeprom_read(struct net_device *dev, unsigned int addr)
1100{
1101 struct ks8851_net *ks = netdev_priv(dev);
1102 int eepcr;
1103 int ctrl = EEPROM_OP_READ;
1104 int state = EEPROM_CONTROL;
1105 int bit_count = EEPROM_OP_LEN - 1;
1106 unsigned int data = 0;
1107 int dummy;
1108 unsigned int addr_len;
1109
1110 addr_len = (ks->eeprom_size == 128) ? 6 : 8;
1111
1112 /* start transaction: chip select high, authorize write */
1113 mutex_lock(&ks->lock);
1114 eepcr = EEPCR_EESA | EEPCR_EESRWA;
1115 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1116 eepcr |= EEPCR_EECS;
1117 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1118 mutex_unlock(&ks->lock);
1119
1120 while (state != EEPROM_COMPLETE) {
1121 /* falling clock period starts... */
1122 /* set EED_IO pin for control and address */
1123 eepcr &= ~EEPCR_EEDO;
1124 switch (state) {
1125 case EEPROM_CONTROL:
1126 eepcr |= ((ctrl >> bit_count) & 1) << 2;
1127 if (bit_count-- <= 0) {
1128 bit_count = addr_len - 1;
1129 state = EEPROM_ADDRESS;
1130 }
1131 break;
1132 case EEPROM_ADDRESS:
1133 eepcr |= ((addr >> bit_count) & 1) << 2;
1134 bit_count--;
1135 break;
1136 case EEPROM_DATA:
1137 /* Change to receive mode */
1138 eepcr &= ~EEPCR_EESRWA;
1139 break;
1140 }
1141
1142 /* lower clock */
1143 eepcr &= ~EEPCR_EESCK;
1144
1145 mutex_lock(&ks->lock);
1146 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1147 mutex_unlock(&ks->lock);
1148
1149 /* waitread period / 2 */
1150 udelay(EEPROM_SK_PERIOD / 2);
1151
1152 /* rising clock period starts... */
1153
1154 /* raise clock */
1155 mutex_lock(&ks->lock);
1156 eepcr |= EEPCR_EESCK;
1157 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1158 mutex_unlock(&ks->lock);
1159
1160 /* Manage read */
1161 switch (state) {
1162 case EEPROM_ADDRESS:
1163 if (bit_count < 0) {
1164 bit_count = EEPROM_DATA_LEN - 1;
1165 state = EEPROM_DATA;
1166 }
1167 break;
1168 case EEPROM_DATA:
1169 mutex_lock(&ks->lock);
1170 dummy = ks8851_rdreg16(ks, KS_EEPCR);
1171 mutex_unlock(&ks->lock);
1172 data |= ((dummy >> EEPCR_EESB_OFFSET) & 1) << bit_count;
1173 if (bit_count-- <= 0)
1174 state = EEPROM_COMPLETE;
1175 break;
1176 }
1177
1178 /* wait period / 2 */
1179 udelay(EEPROM_SK_PERIOD / 2);
1180 }
1181
1182 /* close transaction */
1183 mutex_lock(&ks->lock);
1184 eepcr &= ~EEPCR_EECS;
1185 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1186 eepcr = 0;
1187 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1188 mutex_unlock(&ks->lock);
1189
1190 return data;
1191}
1192
1193/**
1194 * ks8851_eeprom_write - write a 16bits word in ks8851 companion EEPROM
1195 * @dev: The network device the PHY is on.
1196 * @op: operand (can be WRITE, EWEN, EWDS)
1197 * @addr: EEPROM address to write
1198 * @data: data to write
1199 *
1200 * eeprom_size: used to define the data coding length. Can be changed
1201 * through debug-fs.
1202 *
1203 * Programs a write on the EEPROM using ks8851 EEPROM SW access feature.
1204 *
1205 * Note that a write enable is required before writing data.
1206 *
1207 * Rough programming model:
1208 * - on period start: set clock high
1209 * - on period / 2: set clock low and program value on bus
1210 * - start on period / 2
1211 */
1212void ks8851_eeprom_write(struct net_device *dev, unsigned int op,
1213 unsigned int addr, unsigned int data)
1214{
1215 struct ks8851_net *ks = netdev_priv(dev);
1216 int eepcr;
1217 int state = EEPROM_CONTROL;
1218 int bit_count = EEPROM_OP_LEN - 1;
1219 unsigned int addr_len;
1220
1221 addr_len = (ks->eeprom_size == 128) ? 6 : 8;
1222
1223 switch (op) {
1224 case EEPROM_OP_EWEN:
1225 addr = 0x30;
1226 break;
1227 case EEPROM_OP_EWDS:
1228 addr = 0;
1229 break;
1230 }
1231
1232 /* start transaction: chip select high, authorize write */
1233 mutex_lock(&ks->lock);
1234 eepcr = EEPCR_EESA | EEPCR_EESRWA;
1235 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1236 eepcr |= EEPCR_EECS;
1237 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1238 mutex_unlock(&ks->lock);
1239
1240 while (state != EEPROM_COMPLETE) {
1241 /* falling clock period starts... */
1242 /* set EED_IO pin for control and address */
1243 eepcr &= ~EEPCR_EEDO;
1244 switch (state) {
1245 case EEPROM_CONTROL:
1246 eepcr |= ((op >> bit_count) & 1) << 2;
1247 if (bit_count-- <= 0) {
1248 bit_count = addr_len - 1;
1249 state = EEPROM_ADDRESS;
1250 }
1251 break;
1252 case EEPROM_ADDRESS:
1253 eepcr |= ((addr >> bit_count) & 1) << 2;
1254 if (bit_count-- <= 0) {
1255 if (op == EEPROM_OP_WRITE) {
1256 bit_count = EEPROM_DATA_LEN - 1;
1257 state = EEPROM_DATA;
1258 } else {
1259 state = EEPROM_COMPLETE;
1260 }
1261 }
1262 break;
1263 case EEPROM_DATA:
1264 eepcr |= ((data >> bit_count) & 1) << 2;
1265 if (bit_count-- <= 0)
1266 state = EEPROM_COMPLETE;
1267 break;
1268 }
1269
1270 /* lower clock */
1271 eepcr &= ~EEPCR_EESCK;
1272
1273 mutex_lock(&ks->lock);
1274 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1275 mutex_unlock(&ks->lock);
1276
1277 /* wait period / 2 */
1278 udelay(EEPROM_SK_PERIOD / 2);
1279
1280 /* rising clock period starts... */
1281
1282 /* raise clock */
1283 eepcr |= EEPCR_EESCK;
1284 mutex_lock(&ks->lock);
1285 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1286 mutex_unlock(&ks->lock);
1287
1288 /* wait period / 2 */
1289 udelay(EEPROM_SK_PERIOD / 2);
1290 }
1291
1292 /* close transaction */
1293 mutex_lock(&ks->lock);
1294 eepcr &= ~EEPCR_EECS;
1295 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1296 eepcr = 0;
1297 ks8851_wrreg16(ks, KS_EEPCR, eepcr);
1298 mutex_unlock(&ks->lock);
1299
1300}
1301
1302/* ethtool support */ 1078/* ethtool support */
1303 1079
1304static void ks8851_get_drvinfo(struct net_device *dev, 1080static void ks8851_get_drvinfo(struct net_device *dev,
@@ -1345,115 +1121,141 @@ static int ks8851_nway_reset(struct net_device *dev)
1345 return mii_nway_restart(&ks->mii); 1121 return mii_nway_restart(&ks->mii);
1346} 1122}
1347 1123
1348static int ks8851_get_eeprom_len(struct net_device *dev) 1124/* EEPROM support */
1349{
1350 struct ks8851_net *ks = netdev_priv(dev);
1351 return ks->eeprom_size;
1352}
1353 1125
1354static int ks8851_get_eeprom(struct net_device *dev, 1126static void ks8851_eeprom_regread(struct eeprom_93cx6 *ee)
1355 struct ethtool_eeprom *eeprom, u8 *bytes)
1356{ 1127{
1357 struct ks8851_net *ks = netdev_priv(dev); 1128 struct ks8851_net *ks = ee->data;
1358 u16 *eeprom_buff; 1129 unsigned val;
1359 int first_word;
1360 int last_word;
1361 int ret_val = 0;
1362 u16 i;
1363
1364 if (eeprom->len == 0)
1365 return -EINVAL;
1366 1130
1367 if (eeprom->len > ks->eeprom_size) 1131 val = ks8851_rdreg16(ks, KS_EEPCR);
1368 return -EINVAL;
1369 1132
1370 eeprom->magic = ks8851_rdreg16(ks, KS_CIDER); 1133 ee->reg_data_out = (val & EEPCR_EESB) ? 1 : 0;
1134 ee->reg_data_clock = (val & EEPCR_EESCK) ? 1 : 0;
1135 ee->reg_chip_select = (val & EEPCR_EECS) ? 1 : 0;
1136}
1371 1137
1372 first_word = eeprom->offset >> 1; 1138static void ks8851_eeprom_regwrite(struct eeprom_93cx6 *ee)
1373 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1139{
1140 struct ks8851_net *ks = ee->data;
1141 unsigned val = EEPCR_EESA; /* default - eeprom access on */
1142
1143 if (ee->drive_data)
1144 val |= EEPCR_EESRWA;
1145 if (ee->reg_data_in)
1146 val |= EEPCR_EEDO;
1147 if (ee->reg_data_clock)
1148 val |= EEPCR_EESCK;
1149 if (ee->reg_chip_select)
1150 val |= EEPCR_EECS;
1151
1152 ks8851_wrreg16(ks, KS_EEPCR, val);
1153}
1374 1154
1375 eeprom_buff = kmalloc(sizeof(u16) * 1155/**
1376 (last_word - first_word + 1), GFP_KERNEL); 1156 * ks8851_eeprom_claim - claim device EEPROM and activate the interface
1377 if (!eeprom_buff) 1157 * @ks: The network device state.
1378 return -ENOMEM; 1158 *
1159 * Check for the presence of an EEPROM, and then activate software access
1160 * to the device.
1161 */
1162static int ks8851_eeprom_claim(struct ks8851_net *ks)
1163{
1164 if (!(ks->rc_ccr & CCR_EEPROM))
1165 return -ENOENT;
1379 1166
1380 for (i = 0; i < last_word - first_word + 1; i++) 1167 mutex_lock(&ks->lock);
1381 eeprom_buff[i] = ks8851_eeprom_read(dev, first_word + 1);
1382 1168
1383 /* Device's eeprom is little-endian, word addressable */ 1169 /* start with clock low, cs high */
1384 for (i = 0; i < last_word - first_word + 1; i++) 1170 ks8851_wrreg16(ks, KS_EEPCR, EEPCR_EESA | EEPCR_EECS);
1385 le16_to_cpus(&eeprom_buff[i]); 1171 return 0;
1172}
1386 1173
1387 memcpy(bytes, (u8 *)eeprom_buff + (eeprom->offset & 1), eeprom->len); 1174/**
1388 kfree(eeprom_buff); 1175 * ks8851_eeprom_release - release the EEPROM interface
1176 * @ks: The device state
1177 *
1178 * Release the software access to the device EEPROM
1179 */
1180static void ks8851_eeprom_release(struct ks8851_net *ks)
1181{
1182 unsigned val = ks8851_rdreg16(ks, KS_EEPCR);
1389 1183
1390 return ret_val; 1184 ks8851_wrreg16(ks, KS_EEPCR, val & ~EEPCR_EESA);
1185 mutex_unlock(&ks->lock);
1391} 1186}
1392 1187
1188#define KS_EEPROM_MAGIC (0x00008851)
1189
1393static int ks8851_set_eeprom(struct net_device *dev, 1190static int ks8851_set_eeprom(struct net_device *dev,
1394 struct ethtool_eeprom *eeprom, u8 *bytes) 1191 struct ethtool_eeprom *ee, u8 *data)
1395{ 1192{
1396 struct ks8851_net *ks = netdev_priv(dev); 1193 struct ks8851_net *ks = netdev_priv(dev);
1397 u16 *eeprom_buff; 1194 int offset = ee->offset;
1398 void *ptr; 1195 int len = ee->len;
1399 int max_len; 1196 u16 tmp;
1400 int first_word; 1197
1401 int last_word; 1198 /* currently only support byte writing */
1402 int ret_val = 0; 1199 if (len != 1)
1403 u16 i;
1404
1405 if (eeprom->len == 0)
1406 return -EOPNOTSUPP;
1407
1408 if (eeprom->len > ks->eeprom_size)
1409 return -EINVAL; 1200 return -EINVAL;
1410 1201
1411 if (eeprom->magic != ks8851_rdreg16(ks, KS_CIDER)) 1202 if (ee->magic != KS_EEPROM_MAGIC)
1412 return -EFAULT; 1203 return -EINVAL;
1413 1204
1414 first_word = eeprom->offset >> 1; 1205 if (ks8851_eeprom_claim(ks))
1415 last_word = (eeprom->offset + eeprom->len - 1) >> 1; 1206 return -ENOENT;
1416 max_len = (last_word - first_word + 1) * 2; 1207
1417 eeprom_buff = kmalloc(max_len, GFP_KERNEL); 1208 eeprom_93cx6_wren(&ks->eeprom, true);
1418 if (!eeprom_buff) 1209
1419 return -ENOMEM; 1210 /* ethtool currently only supports writing bytes, which means
1211 * we have to read/modify/write our 16bit EEPROMs */
1420 1212
1421 ptr = (void *)eeprom_buff; 1213 eeprom_93cx6_read(&ks->eeprom, offset/2, &tmp);
1422 1214
1423 if (eeprom->offset & 1) { 1215 if (offset & 1) {
1424 /* need read/modify/write of first changed EEPROM word */ 1216 tmp &= 0xff;
1425 /* only the second byte of the word is being modified */ 1217 tmp |= *data << 8;
1426 eeprom_buff[0] = ks8851_eeprom_read(dev, first_word); 1218 } else {
1427 ptr++; 1219 tmp &= 0xff00;
1220 tmp |= *data;
1428 } 1221 }
1429 if ((eeprom->offset + eeprom->len) & 1)
1430 /* need read/modify/write of last changed EEPROM word */
1431 /* only the first byte of the word is being modified */
1432 eeprom_buff[last_word - first_word] =
1433 ks8851_eeprom_read(dev, last_word);
1434 1222
1223 eeprom_93cx6_write(&ks->eeprom, offset/2, tmp);
1224 eeprom_93cx6_wren(&ks->eeprom, false);
1225
1226 ks8851_eeprom_release(ks);
1227
1228 return 0;
1229}
1435 1230
1436 /* Device's eeprom is little-endian, word addressable */ 1231static int ks8851_get_eeprom(struct net_device *dev,
1437 le16_to_cpus(&eeprom_buff[0]); 1232 struct ethtool_eeprom *ee, u8 *data)
1438 le16_to_cpus(&eeprom_buff[last_word - first_word]); 1233{
1234 struct ks8851_net *ks = netdev_priv(dev);
1235 int offset = ee->offset;
1236 int len = ee->len;
1439 1237
1440 memcpy(ptr, bytes, eeprom->len); 1238 /* must be 2 byte aligned */
1239 if (len & 1 || offset & 1)
1240 return -EINVAL;
1441 1241
1442 for (i = 0; i < last_word - first_word + 1; i++) 1242 if (ks8851_eeprom_claim(ks))
1443 eeprom_buff[i] = cpu_to_le16(eeprom_buff[i]); 1243 return -ENOENT;
1444 1244
1445 ks8851_eeprom_write(dev, EEPROM_OP_EWEN, 0, 0); 1245 ee->magic = KS_EEPROM_MAGIC;
1446 1246
1447 for (i = 0; i < last_word - first_word + 1; i++) { 1247 eeprom_93cx6_multiread(&ks->eeprom, offset/2, (__le16 *)data, len/2);
1448 ks8851_eeprom_write(dev, EEPROM_OP_WRITE, first_word + i, 1248 ks8851_eeprom_release(ks);
1449 eeprom_buff[i]);
1450 mdelay(EEPROM_WRITE_TIME);
1451 }
1452 1249
1453 ks8851_eeprom_write(dev, EEPROM_OP_EWDS, 0, 0); 1250 return 0;
1251}
1454 1252
1455 kfree(eeprom_buff); 1253static int ks8851_get_eeprom_len(struct net_device *dev)
1456 return ret_val; 1254{
1255 struct ks8851_net *ks = netdev_priv(dev);
1256
1257 /* currently, we assume it is an 93C46 attached, so return 128 */
1258 return ks->rc_ccr & CCR_EEPROM ? 128 : 0;
1457} 1259}
1458 1260
1459static const struct ethtool_ops ks8851_ethtool_ops = { 1261static const struct ethtool_ops ks8851_ethtool_ops = {
@@ -1646,6 +1448,13 @@ static int __devinit ks8851_probe(struct spi_device *spi)
1646 spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2); 1448 spi_message_add_tail(&ks->spi_xfer2[0], &ks->spi_msg2);
1647 spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2); 1449 spi_message_add_tail(&ks->spi_xfer2[1], &ks->spi_msg2);
1648 1450
1451 /* setup EEPROM state */
1452
1453 ks->eeprom.data = ks;
1454 ks->eeprom.width = PCI_EEPROM_WIDTH_93C46;
1455 ks->eeprom.register_read = ks8851_eeprom_regread;
1456 ks->eeprom.register_write = ks8851_eeprom_regwrite;
1457
1649 /* setup mii state */ 1458 /* setup mii state */
1650 ks->mii.dev = ndev; 1459 ks->mii.dev = ndev;
1651 ks->mii.phy_id = 1, 1460 ks->mii.phy_id = 1,