diff options
author | Jack Morgenstein <jackm@dev.mellanox.co.il> | 2011-12-12 23:10:51 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-12-13 13:56:05 -0500 |
commit | f9baff509f8a05a79626defdbdf4f4aa4efd373b (patch) | |
tree | d4f0e425cd8c8999775f0f135c9825e3bbdc180c /drivers/net/ethernet/mellanox/mlx4/mcg.c | |
parent | 65dab25deb8da7dba4b6dd0145a9143be7f8369f (diff) |
mlx4_core: Add "native" argument to mlx4_cmd and its callers (where needed)
For SRIOV, some Hypervisor commands can be executed directly (native = 1).
Others should go through the command wrapper flow (for tracking resource
usage, for example, or for changing some HCA configurations that slaves
need to be notified of).
This patch sets the groundwork for this capability -- adding the correct
value of "native" in each case.
Note that if SRIOV is not activated, this parameter has no effect.
Signed-off-by: Jack Morgenstein <jackm@dev.mellanox.co.il>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/mcg.c')
-rw-r--r-- | drivers/net/ethernet/mellanox/mlx4/mcg.c | 10 |
1 files changed, 6 insertions, 4 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/mcg.c b/drivers/net/ethernet/mellanox/mlx4/mcg.c index 978688c31046..4187f7bbd793 100644 --- a/drivers/net/ethernet/mellanox/mlx4/mcg.c +++ b/drivers/net/ethernet/mellanox/mlx4/mcg.c | |||
@@ -48,14 +48,14 @@ static int mlx4_READ_ENTRY(struct mlx4_dev *dev, int index, | |||
48 | struct mlx4_cmd_mailbox *mailbox) | 48 | struct mlx4_cmd_mailbox *mailbox) |
49 | { | 49 | { |
50 | return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, | 50 | return mlx4_cmd_box(dev, 0, mailbox->dma, index, 0, MLX4_CMD_READ_MCG, |
51 | MLX4_CMD_TIME_CLASS_A); | 51 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); |
52 | } | 52 | } |
53 | 53 | ||
54 | static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index, | 54 | static int mlx4_WRITE_ENTRY(struct mlx4_dev *dev, int index, |
55 | struct mlx4_cmd_mailbox *mailbox) | 55 | struct mlx4_cmd_mailbox *mailbox) |
56 | { | 56 | { |
57 | return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, | 57 | return mlx4_cmd(dev, mailbox->dma, index, 0, MLX4_CMD_WRITE_MCG, |
58 | MLX4_CMD_TIME_CLASS_A); | 58 | MLX4_CMD_TIME_CLASS_A, MLX4_CMD_NATIVE); |
59 | } | 59 | } |
60 | 60 | ||
61 | static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 vep_num, u8 port, u8 steer, | 61 | static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 vep_num, u8 port, u8 steer, |
@@ -65,7 +65,8 @@ static int mlx4_WRITE_PROMISC(struct mlx4_dev *dev, u8 vep_num, u8 port, u8 stee | |||
65 | 65 | ||
66 | in_mod = (u32) vep_num << 24 | (u32) port << 16 | steer << 1; | 66 | in_mod = (u32) vep_num << 24 | (u32) port << 16 | steer << 1; |
67 | return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, | 67 | return mlx4_cmd(dev, mailbox->dma, in_mod, 0x1, |
68 | MLX4_CMD_WRITE_MCG, MLX4_CMD_TIME_CLASS_A); | 68 | MLX4_CMD_WRITE_MCG, MLX4_CMD_TIME_CLASS_A, |
69 | MLX4_CMD_NATIVE); | ||
69 | } | 70 | } |
70 | 71 | ||
71 | static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | 72 | static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, |
@@ -75,7 +76,8 @@ static int mlx4_GID_HASH(struct mlx4_dev *dev, struct mlx4_cmd_mailbox *mailbox, | |||
75 | int err; | 76 | int err; |
76 | 77 | ||
77 | err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, | 78 | err = mlx4_cmd_imm(dev, mailbox->dma, &imm, 0, op_mod, |
78 | MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A); | 79 | MLX4_CMD_MGID_HASH, MLX4_CMD_TIME_CLASS_A, |
80 | MLX4_CMD_NATIVE); | ||
79 | 81 | ||
80 | if (!err) | 82 | if (!err) |
81 | *hash = imm; | 83 | *hash = imm; |