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authorRoland Dreier <roland@purestorage.com>2012-09-27 12:53:05 -0400
committerRoland Dreier <roland@purestorage.com>2012-10-01 05:10:44 -0400
commitca3e57a599e1f3624a6164a5c3a655859368f7aa (patch)
treeb5515a00d42519620872d3a67ffa337fcfa7a4a8 /drivers/net/ethernet/mellanox/mlx4/main.c
parent839f12434c7618d326b9d1ece5eca643e5e48d0a (diff)
mlx4_core: Clean up enabling of SENSE_PORT for older (ConnectX-1/-2) HCAs
Instead of having a hard-coded "PCI device ID != 0x1003" (which obviously breaks as newer devices with ID != 0x1003 become available), instead let's set a flag in our PCI device table for the older devices where we're supposed to force using SENSE_PORT. This also avoids enabling SENSE_PORT for virtual functions by mistake. Signed-off-by: Roland Dreier <roland@purestorage.com>
Diffstat (limited to 'drivers/net/ethernet/mellanox/mlx4/main.c')
-rw-r--r--drivers/net/ethernet/mellanox/mlx4/main.c28
1 files changed, 14 insertions, 14 deletions
diff --git a/drivers/net/ethernet/mellanox/mlx4/main.c b/drivers/net/ethernet/mellanox/mlx4/main.c
index c9732ca4191e..877d1122f787 100644
--- a/drivers/net/ethernet/mellanox/mlx4/main.c
+++ b/drivers/net/ethernet/mellanox/mlx4/main.c
@@ -297,8 +297,8 @@ static int mlx4_dev_cap(struct mlx4_dev *dev, struct mlx4_dev_cap *dev_cap)
297 mlx4_dbg(dev, "Steering mode is: %s\n", 297 mlx4_dbg(dev, "Steering mode is: %s\n",
298 mlx4_steering_mode_str(dev->caps.steering_mode)); 298 mlx4_steering_mode_str(dev->caps.steering_mode));
299 299
300 /* Sense port always allowed on supported devices for ConnectX1 and 2 */ 300 /* Sense port always allowed on supported devices for ConnectX-1 and -2 */
301 if (dev->pdev->device != 0x1003) 301 if (mlx4_priv(dev)->pci_dev_data & MLX4_PCI_DEV_FORCE_SENSE_PORT)
302 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT; 302 dev->caps.flags |= MLX4_DEV_CAP_FLAG_SENSE_SUPPORT;
303 303
304 dev->caps.log_num_macs = log_num_mac; 304 dev->caps.log_num_macs = log_num_mac;
@@ -2314,29 +2314,29 @@ int mlx4_restart_one(struct pci_dev *pdev)
2314 2314
2315static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = { 2315static DEFINE_PCI_DEVICE_TABLE(mlx4_pci_table) = {
2316 /* MT25408 "Hermon" SDR */ 2316 /* MT25408 "Hermon" SDR */
2317 { PCI_VDEVICE(MELLANOX, 0x6340), 0 }, 2317 { PCI_VDEVICE(MELLANOX, 0x6340), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2318 /* MT25408 "Hermon" DDR */ 2318 /* MT25408 "Hermon" DDR */
2319 { PCI_VDEVICE(MELLANOX, 0x634a), 0 }, 2319 { PCI_VDEVICE(MELLANOX, 0x634a), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2320 /* MT25408 "Hermon" QDR */ 2320 /* MT25408 "Hermon" QDR */
2321 { PCI_VDEVICE(MELLANOX, 0x6354), 0 }, 2321 { PCI_VDEVICE(MELLANOX, 0x6354), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2322 /* MT25408 "Hermon" DDR PCIe gen2 */ 2322 /* MT25408 "Hermon" DDR PCIe gen2 */
2323 { PCI_VDEVICE(MELLANOX, 0x6732), 0 }, 2323 { PCI_VDEVICE(MELLANOX, 0x6732), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2324 /* MT25408 "Hermon" QDR PCIe gen2 */ 2324 /* MT25408 "Hermon" QDR PCIe gen2 */
2325 { PCI_VDEVICE(MELLANOX, 0x673c), 0 }, 2325 { PCI_VDEVICE(MELLANOX, 0x673c), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2326 /* MT25408 "Hermon" EN 10GigE */ 2326 /* MT25408 "Hermon" EN 10GigE */
2327 { PCI_VDEVICE(MELLANOX, 0x6368), 0 }, 2327 { PCI_VDEVICE(MELLANOX, 0x6368), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2328 /* MT25408 "Hermon" EN 10GigE PCIe gen2 */ 2328 /* MT25408 "Hermon" EN 10GigE PCIe gen2 */
2329 { PCI_VDEVICE(MELLANOX, 0x6750), 0 }, 2329 { PCI_VDEVICE(MELLANOX, 0x6750), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2330 /* MT25458 ConnectX EN 10GBASE-T 10GigE */ 2330 /* MT25458 ConnectX EN 10GBASE-T 10GigE */
2331 { PCI_VDEVICE(MELLANOX, 0x6372), 0 }, 2331 { PCI_VDEVICE(MELLANOX, 0x6372), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2332 /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */ 2332 /* MT25458 ConnectX EN 10GBASE-T+Gen2 10GigE */
2333 { PCI_VDEVICE(MELLANOX, 0x675a), 0 }, 2333 { PCI_VDEVICE(MELLANOX, 0x675a), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2334 /* MT26468 ConnectX EN 10GigE PCIe gen2*/ 2334 /* MT26468 ConnectX EN 10GigE PCIe gen2*/
2335 { PCI_VDEVICE(MELLANOX, 0x6764), 0 }, 2335 { PCI_VDEVICE(MELLANOX, 0x6764), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2336 /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */ 2336 /* MT26438 ConnectX EN 40GigE PCIe gen2 5GT/s */
2337 { PCI_VDEVICE(MELLANOX, 0x6746), 0 }, 2337 { PCI_VDEVICE(MELLANOX, 0x6746), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2338 /* MT26478 ConnectX2 40GigE PCIe gen2 */ 2338 /* MT26478 ConnectX2 40GigE PCIe gen2 */
2339 { PCI_VDEVICE(MELLANOX, 0x676e), 0 }, 2339 { PCI_VDEVICE(MELLANOX, 0x676e), MLX4_PCI_DEV_FORCE_SENSE_PORT },
2340 /* MT25400 Family [ConnectX-2 Virtual Function] */ 2340 /* MT25400 Family [ConnectX-2 Virtual Function] */
2341 { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_PCI_DEV_IS_VF }, 2341 { PCI_VDEVICE(MELLANOX, 0x1002), MLX4_PCI_DEV_IS_VF },
2342 /* MT27500 Family [ConnectX-3] */ 2342 /* MT27500 Family [ConnectX-3] */