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authorBruce Allan <bruce.w.allan@intel.com>2012-10-08 21:11:26 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2012-10-09 06:03:01 -0400
commit16e310ae6ed352c4963b1f2413fcd88fa693eeda (patch)
tree61d7b40d4c39979ae7e3e302e9adf6a5a6b47bcd /drivers/net/ethernet/intel
parentc88887e09099b7f77659cb6aa1b9d670a7632f4b (diff)
e1000e: add device IDs for i218
i218 is the next-generation LOM that will be available on systems with the Lynx Point LP Platform Controller Hub (PCH) chipset from Intel. This patch provides the initial support of those devices. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/e1000e/hw.h2
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c2
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/hw.h b/drivers/net/ethernet/intel/e1000e/hw.h
index ed5b40985edb..d37bfd96c987 100644
--- a/drivers/net/ethernet/intel/e1000e/hw.h
+++ b/drivers/net/ethernet/intel/e1000e/hw.h
@@ -412,6 +412,8 @@ enum e1e_registers {
412#define E1000_DEV_ID_PCH2_LV_V 0x1503 412#define E1000_DEV_ID_PCH2_LV_V 0x1503
413#define E1000_DEV_ID_PCH_LPT_I217_LM 0x153A 413#define E1000_DEV_ID_PCH_LPT_I217_LM 0x153A
414#define E1000_DEV_ID_PCH_LPT_I217_V 0x153B 414#define E1000_DEV_ID_PCH_LPT_I217_V 0x153B
415#define E1000_DEV_ID_PCH_LPTLP_I218_LM 0x155A
416#define E1000_DEV_ID_PCH_LPTLP_I218_V 0x1559
415 417
416#define E1000_REVISION_4 4 418#define E1000_REVISION_4 4
417 419
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index fb659dd8db03..de57a2ba6bde 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -6558,6 +6558,8 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6558 6558
6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
6561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
6562 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
6561 6563
6562 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6564 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
6563}; 6565};