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authorAlexander Duyck <alexander.h.duyck@intel.com>2011-08-30 20:01:06 -0400
committerJeff Kirsher <jeffrey.t.kirsher@intel.com>2011-09-15 23:29:14 -0400
commit592245559e9007845ef6603cc930c784031eb076 (patch)
treec13aaa610a880da25c26313ec0136caa840a0ecd /drivers/net/ethernet/intel
parent4bc71cb983fd2844e603bf633df2bb53385182d2 (diff)
ixgbe: Change default Tx work limit size to 256 buffers
This change makes it so that the default Tx work limit is 256 buffers or 1/2 of an entire ring instead of a full ring size so that it is much more likely that we will be able to actually reach the work limit value. Previously with the value set to an entire ring it would not have been possible for us to trigger an event due to the fact that the Tx work is stopped at the point where we cannot place one more buffer on the ring and it is not restarted until cleanup is complete. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Phil Schmitt <phillip.j.schmitt@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/ethernet/intel')
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe.h1
-rw-r--r--drivers/net/ethernet/intel/ixgbe/ixgbe_main.c8
2 files changed, 5 insertions, 4 deletions
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe.h b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
index 58482fc3024b..3f5a744f7099 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe.h
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe.h
@@ -53,6 +53,7 @@
53 53
54/* TX/RX descriptor defines */ 54/* TX/RX descriptor defines */
55#define IXGBE_DEFAULT_TXD 512 55#define IXGBE_DEFAULT_TXD 512
56#define IXGBE_DEFAULT_TX_WORK 256
56#define IXGBE_MAX_TXD 4096 57#define IXGBE_MAX_TXD 4096
57#define IXGBE_MIN_TXD 64 58#define IXGBE_MIN_TXD 64
58 59
diff --git a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
index a30f8266df00..0f633ad9e8cd 100644
--- a/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
+++ b/drivers/net/ethernet/intel/ixgbe/ixgbe_main.c
@@ -804,7 +804,7 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
804 struct ixgbe_tx_buffer *tx_buffer; 804 struct ixgbe_tx_buffer *tx_buffer;
805 union ixgbe_adv_tx_desc *tx_desc; 805 union ixgbe_adv_tx_desc *tx_desc;
806 unsigned int total_bytes = 0, total_packets = 0; 806 unsigned int total_bytes = 0, total_packets = 0;
807 u16 budget = q_vector->tx.work_limit; 807 unsigned int budget = q_vector->tx.work_limit;
808 u16 i = tx_ring->next_to_clean; 808 u16 i = tx_ring->next_to_clean;
809 809
810 tx_buffer = &tx_ring->tx_buffer_info[i]; 810 tx_buffer = &tx_ring->tx_buffer_info[i];
@@ -891,7 +891,7 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
891 ixgbe_tx_timeout_reset(adapter); 891 ixgbe_tx_timeout_reset(adapter);
892 892
893 /* the adapter is about to reset, no point in enabling stuff */ 893 /* the adapter is about to reset, no point in enabling stuff */
894 return budget; 894 return true;
895 } 895 }
896 896
897#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2) 897#define TX_WAKE_THRESHOLD (DESC_NEEDED * 2)
@@ -908,7 +908,7 @@ static bool ixgbe_clean_tx_irq(struct ixgbe_q_vector *q_vector,
908 } 908 }
909 } 909 }
910 910
911 return budget; 911 return !!budget;
912} 912}
913 913
914#ifdef CONFIG_IXGBE_DCA 914#ifdef CONFIG_IXGBE_DCA
@@ -5091,7 +5091,7 @@ static int __devinit ixgbe_sw_init(struct ixgbe_adapter *adapter)
5091 adapter->rx_ring_count = IXGBE_DEFAULT_RXD; 5091 adapter->rx_ring_count = IXGBE_DEFAULT_RXD;
5092 5092
5093 /* set default work limits */ 5093 /* set default work limits */
5094 adapter->tx_work_limit = adapter->tx_ring_count; 5094 adapter->tx_work_limit = IXGBE_DEFAULT_TX_WORK;
5095 5095
5096 /* initialize eeprom parameters */ 5096 /* initialize eeprom parameters */
5097 if (ixgbe_init_eeprom_params_generic(hw)) { 5097 if (ixgbe_init_eeprom_params_generic(hw)) {