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authorDavid Woodhouse <David.Woodhouse@intel.com>2012-11-21 05:38:13 -0500
committerDavid Woodhouse <David.Woodhouse@intel.com>2012-11-21 05:38:13 -0500
commit851462444d421c223965b12b836bef63da61b57f (patch)
tree495baa14e638817941496c36e1443aed7dae0ea0 /drivers/net/ethernet/intel/e1000e/netdev.c
parent5a6ea4af0907f995dc06df21a9c9ef764c7cd3bc (diff)
parent6924d99fcdf1a688538a3cdebd1f135c22eec191 (diff)
Merge branch 'for-3.7' of git://git.infradead.org/users/dedekind/l2-mtd
Conflicts: drivers/mtd/nand/nand_base.c
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/netdev.c')
-rw-r--r--drivers/net/ethernet/intel/e1000e/netdev.c4
1 files changed, 3 insertions, 1 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/netdev.c b/drivers/net/ethernet/intel/e1000e/netdev.c
index fb659dd8db03..f444eb0b76d8 100644
--- a/drivers/net/ethernet/intel/e1000e/netdev.c
+++ b/drivers/net/ethernet/intel/e1000e/netdev.c
@@ -2831,7 +2831,7 @@ static void e1000_configure_tx(struct e1000_adapter *adapter)
2831 * set up some performance related parameters to encourage the 2831 * set up some performance related parameters to encourage the
2832 * hardware to use the bus more efficiently in bursts, depends 2832 * hardware to use the bus more efficiently in bursts, depends
2833 * on the tx_int_delay to be enabled, 2833 * on the tx_int_delay to be enabled,
2834 * wthresh = 5 ==> burst write a cacheline (64 bytes) at a time 2834 * wthresh = 1 ==> burst write is disabled to avoid Tx stalls
2835 * hthresh = 1 ==> prefetch when one or more available 2835 * hthresh = 1 ==> prefetch when one or more available
2836 * pthresh = 0x1f ==> prefetch if internal cache 31 or less 2836 * pthresh = 0x1f ==> prefetch if internal cache 31 or less
2837 * BEWARE: this seems to work but should be considered first if 2837 * BEWARE: this seems to work but should be considered first if
@@ -6558,6 +6558,8 @@ static DEFINE_PCI_DEVICE_TABLE(e1000_pci_tbl) = {
6558 6558
6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt }, 6559 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_LM), board_pch_lpt },
6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt }, 6560 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPT_I217_V), board_pch_lpt },
6561 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_LM), board_pch_lpt },
6562 { PCI_VDEVICE(INTEL, E1000_DEV_ID_PCH_LPTLP_I218_V), board_pch_lpt },
6561 6563
6562 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */ 6564 { 0, 0, 0, 0, 0, 0, 0 } /* terminate list */
6563}; 6565};