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authorDavid S. Miller <davem@davemloft.net>2011-08-20 13:39:12 -0400
committerDavid S. Miller <davem@davemloft.net>2011-08-20 13:39:12 -0400
commit823dcd2506fa369aeb8cbd26da5663efe2fda9a9 (patch)
tree853b3e3c05f0b9ee1b5df8464db19b7acc57150c /drivers/net/ethernet/intel/e1000e/ich8lan.c
parenteaa36660de7e174498618d69d7277d44a2f24c3d (diff)
parent98e77438aed3cd3343cbb86825127b1d9d2bea33 (diff)
Merge branch 'master' of master.kernel.org:/pub/scm/linux/kernel/git/davem/net
Diffstat (limited to 'drivers/net/ethernet/intel/e1000e/ich8lan.c')
-rw-r--r--drivers/net/ethernet/intel/e1000e/ich8lan.c65
1 files changed, 52 insertions, 13 deletions
diff --git a/drivers/net/ethernet/intel/e1000e/ich8lan.c b/drivers/net/ethernet/intel/e1000e/ich8lan.c
index 4e36978b8fd8..54add27c8f76 100644
--- a/drivers/net/ethernet/intel/e1000e/ich8lan.c
+++ b/drivers/net/ethernet/intel/e1000e/ich8lan.c
@@ -137,8 +137,9 @@
137#define HV_PM_CTRL PHY_REG(770, 17) 137#define HV_PM_CTRL PHY_REG(770, 17)
138 138
139/* PHY Low Power Idle Control */ 139/* PHY Low Power Idle Control */
140#define I82579_LPI_CTRL PHY_REG(772, 20) 140#define I82579_LPI_CTRL PHY_REG(772, 20)
141#define I82579_LPI_CTRL_ENABLE_MASK 0x6000 141#define I82579_LPI_CTRL_ENABLE_MASK 0x6000
142#define I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT 0x80
142 143
143/* EMI Registers */ 144/* EMI Registers */
144#define I82579_EMI_ADDR 0x10 145#define I82579_EMI_ADDR 0x10
@@ -163,6 +164,11 @@
163#define HV_KMRN_MODE_CTRL PHY_REG(769, 16) 164#define HV_KMRN_MODE_CTRL PHY_REG(769, 16)
164#define HV_KMRN_MDIO_SLOW 0x0400 165#define HV_KMRN_MDIO_SLOW 0x0400
165 166
167/* KMRN FIFO Control and Status */
168#define HV_KMRN_FIFO_CTRLSTA PHY_REG(770, 16)
169#define HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK 0x7000
170#define HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT 12
171
166/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */ 172/* ICH GbE Flash Hardware Sequencing Flash Status Register bit breakdown */
167/* Offset 04h HSFSTS */ 173/* Offset 04h HSFSTS */
168union ich8_hws_flash_status { 174union ich8_hws_flash_status {
@@ -657,6 +663,7 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
657 struct e1000_mac_info *mac = &hw->mac; 663 struct e1000_mac_info *mac = &hw->mac;
658 s32 ret_val; 664 s32 ret_val;
659 bool link; 665 bool link;
666 u16 phy_reg;
660 667
661 /* 668 /*
662 * We only want to go out to the PHY registers to see if Auto-Neg 669 * We only want to go out to the PHY registers to see if Auto-Neg
@@ -689,16 +696,35 @@ static s32 e1000_check_for_copper_link_ich8lan(struct e1000_hw *hw)
689 696
690 mac->get_link_status = false; 697 mac->get_link_status = false;
691 698
692 if (hw->phy.type == e1000_phy_82578) { 699 switch (hw->mac.type) {
693 ret_val = e1000_link_stall_workaround_hv(hw); 700 case e1000_pch2lan:
694 if (ret_val)
695 goto out;
696 }
697
698 if (hw->mac.type == e1000_pch2lan) {
699 ret_val = e1000_k1_workaround_lv(hw); 701 ret_val = e1000_k1_workaround_lv(hw);
700 if (ret_val) 702 if (ret_val)
701 goto out; 703 goto out;
704 /* fall-thru */
705 case e1000_pchlan:
706 if (hw->phy.type == e1000_phy_82578) {
707 ret_val = e1000_link_stall_workaround_hv(hw);
708 if (ret_val)
709 goto out;
710 }
711
712 /*
713 * Workaround for PCHx parts in half-duplex:
714 * Set the number of preambles removed from the packet
715 * when it is passed from the PHY to the MAC to prevent
716 * the MAC from misinterpreting the packet type.
717 */
718 e1e_rphy(hw, HV_KMRN_FIFO_CTRLSTA, &phy_reg);
719 phy_reg &= ~HV_KMRN_FIFO_CTRLSTA_PREAMBLE_MASK;
720
721 if ((er32(STATUS) & E1000_STATUS_FD) != E1000_STATUS_FD)
722 phy_reg |= (1 << HV_KMRN_FIFO_CTRLSTA_PREAMBLE_SHIFT);
723
724 e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, phy_reg);
725 break;
726 default:
727 break;
702 } 728 }
703 729
704 /* 730 /*
@@ -788,6 +814,11 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter)
788 (adapter->hw.phy.type == e1000_phy_igp_3)) 814 (adapter->hw.phy.type == e1000_phy_igp_3))
789 adapter->flags |= FLAG_LSC_GIG_SPEED_DROP; 815 adapter->flags |= FLAG_LSC_GIG_SPEED_DROP;
790 816
817 /* Enable workaround for 82579 w/ ME enabled */
818 if ((adapter->hw.mac.type == e1000_pch2lan) &&
819 (er32(FWSM) & E1000_ICH_FWSM_FW_VALID))
820 adapter->flags2 |= FLAG2_PCIM2PCI_ARBITER_WA;
821
791 /* Disable EEE by default until IEEE802.3az spec is finalized */ 822 /* Disable EEE by default until IEEE802.3az spec is finalized */
792 if (adapter->flags2 & FLAG2_HAS_EEE) 823 if (adapter->flags2 & FLAG2_HAS_EEE)
793 adapter->hw.dev_spec.ich8lan.eee_disable = true; 824 adapter->hw.dev_spec.ich8lan.eee_disable = true;
@@ -1355,7 +1386,7 @@ static s32 e1000_hv_phy_workarounds_ich8lan(struct e1000_hw *hw)
1355 return ret_val; 1386 return ret_val;
1356 1387
1357 /* Preamble tuning for SSC */ 1388 /* Preamble tuning for SSC */
1358 ret_val = e1e_wphy(hw, PHY_REG(770, 16), 0xA204); 1389 ret_val = e1e_wphy(hw, HV_KMRN_FIFO_CTRLSTA, 0xA204);
1359 if (ret_val) 1390 if (ret_val)
1360 return ret_val; 1391 return ret_val;
1361 } 1392 }
@@ -1645,6 +1676,7 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
1645 s32 ret_val = 0; 1676 s32 ret_val = 0;
1646 u16 status_reg = 0; 1677 u16 status_reg = 0;
1647 u32 mac_reg; 1678 u32 mac_reg;
1679 u16 phy_reg;
1648 1680
1649 if (hw->mac.type != e1000_pch2lan) 1681 if (hw->mac.type != e1000_pch2lan)
1650 goto out; 1682 goto out;
@@ -1659,12 +1691,19 @@ static s32 e1000_k1_workaround_lv(struct e1000_hw *hw)
1659 mac_reg = er32(FEXTNVM4); 1691 mac_reg = er32(FEXTNVM4);
1660 mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK; 1692 mac_reg &= ~E1000_FEXTNVM4_BEACON_DURATION_MASK;
1661 1693
1662 if (status_reg & HV_M_STATUS_SPEED_1000) 1694 ret_val = e1e_rphy(hw, I82579_LPI_CTRL, &phy_reg);
1695 if (ret_val)
1696 goto out;
1697
1698 if (status_reg & HV_M_STATUS_SPEED_1000) {
1663 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC; 1699 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_8USEC;
1664 else 1700 phy_reg &= ~I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;
1701 } else {
1665 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC; 1702 mac_reg |= E1000_FEXTNVM4_BEACON_DURATION_16USEC;
1666 1703 phy_reg |= I82579_LPI_CTRL_FORCE_PLL_LOCK_COUNT;
1704 }
1667 ew32(FEXTNVM4, mac_reg); 1705 ew32(FEXTNVM4, mac_reg);
1706 ret_val = e1e_wphy(hw, I82579_LPI_CTRL, phy_reg);
1668 } 1707 }
1669 1708
1670out: 1709out: