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authorNimrod Andy <B38611@freescale.com>2014-08-21 05:09:38 -0400
committerDavid S. Miller <davem@davemloft.net>2014-08-22 13:45:56 -0400
commit91c0d987a9788dcc5fe26baafd73bf9242b68900 (patch)
tree82ccf2f5b675f2a65a362772b8875817d15ce13a /drivers/net/ethernet/freescale/fec_ptp.c
parent08f1a1b9d1a9902498f7c4bd93b14899dda18708 (diff)
net: fec: ptp: avoid register access when ipg clock is disabled
The current kernel hang on i.MX6SX with rootfs mount from MMC. The root cause is that ptp uses a periodic timer to access enet register even if ipg clock is disabled. FEC ptp driver start one period timer to read 1588 counter register in the ptp init function that is called after FEC driver is probed. To save power, after FEC probe finish, FEC driver disable all clocks including ipg clock that is needed for register access. i.MX5x, i.MX6q/dl/sl FEC register access don't cause system hang when ipg clock is disabled, just return zero value. But for i.MX6sx SOC, it cause system hang. To avoid the issue, we need to check ptp clock status before ptp timer count access. Signed-off-by: Fugang Duan <B38611@freescale.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/freescale/fec_ptp.c')
-rw-r--r--drivers/net/ethernet/freescale/fec_ptp.c33
1 files changed, 22 insertions, 11 deletions
diff --git a/drivers/net/ethernet/freescale/fec_ptp.c b/drivers/net/ethernet/freescale/fec_ptp.c
index 82386b29914a..cca3617a2321 100644
--- a/drivers/net/ethernet/freescale/fec_ptp.c
+++ b/drivers/net/ethernet/freescale/fec_ptp.c
@@ -245,12 +245,20 @@ static int fec_ptp_settime(struct ptp_clock_info *ptp,
245 u64 ns; 245 u64 ns;
246 unsigned long flags; 246 unsigned long flags;
247 247
248 mutex_lock(&fep->ptp_clk_mutex);
249 /* Check the ptp clock */
250 if (!fep->ptp_clk_on) {
251 mutex_unlock(&fep->ptp_clk_mutex);
252 return -EINVAL;
253 }
254
248 ns = ts->tv_sec * 1000000000ULL; 255 ns = ts->tv_sec * 1000000000ULL;
249 ns += ts->tv_nsec; 256 ns += ts->tv_nsec;
250 257
251 spin_lock_irqsave(&fep->tmreg_lock, flags); 258 spin_lock_irqsave(&fep->tmreg_lock, flags);
252 timecounter_init(&fep->tc, &fep->cc, ns); 259 timecounter_init(&fep->tc, &fep->cc, ns);
253 spin_unlock_irqrestore(&fep->tmreg_lock, flags); 260 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
261 mutex_unlock(&fep->ptp_clk_mutex);
254 return 0; 262 return 0;
255} 263}
256 264
@@ -338,17 +346,22 @@ int fec_ptp_get(struct net_device *ndev, struct ifreq *ifr)
338 * fec_time_keep - call timecounter_read every second to avoid timer overrun 346 * fec_time_keep - call timecounter_read every second to avoid timer overrun
339 * because ENET just support 32bit counter, will timeout in 4s 347 * because ENET just support 32bit counter, will timeout in 4s
340 */ 348 */
341static void fec_time_keep(unsigned long _data) 349static void fec_time_keep(struct work_struct *work)
342{ 350{
343 struct fec_enet_private *fep = (struct fec_enet_private *)_data; 351 struct delayed_work *dwork = to_delayed_work(work);
352 struct fec_enet_private *fep = container_of(dwork, struct fec_enet_private, time_keep);
344 u64 ns; 353 u64 ns;
345 unsigned long flags; 354 unsigned long flags;
346 355
347 spin_lock_irqsave(&fep->tmreg_lock, flags); 356 mutex_lock(&fep->ptp_clk_mutex);
348 ns = timecounter_read(&fep->tc); 357 if (fep->ptp_clk_on) {
349 spin_unlock_irqrestore(&fep->tmreg_lock, flags); 358 spin_lock_irqsave(&fep->tmreg_lock, flags);
359 ns = timecounter_read(&fep->tc);
360 spin_unlock_irqrestore(&fep->tmreg_lock, flags);
361 }
362 mutex_unlock(&fep->ptp_clk_mutex);
350 363
351 mod_timer(&fep->time_keep, jiffies + HZ); 364 schedule_delayed_work(&fep->time_keep, HZ);
352} 365}
353 366
354/** 367/**
@@ -386,15 +399,13 @@ void fec_ptp_init(struct platform_device *pdev)
386 399
387 fec_ptp_start_cyclecounter(ndev); 400 fec_ptp_start_cyclecounter(ndev);
388 401
389 init_timer(&fep->time_keep); 402 INIT_DELAYED_WORK(&fep->time_keep, fec_time_keep);
390 fep->time_keep.data = (unsigned long)fep;
391 fep->time_keep.function = fec_time_keep;
392 fep->time_keep.expires = jiffies + HZ;
393 add_timer(&fep->time_keep);
394 403
395 fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev); 404 fep->ptp_clock = ptp_clock_register(&fep->ptp_caps, &pdev->dev);
396 if (IS_ERR(fep->ptp_clock)) { 405 if (IS_ERR(fep->ptp_clock)) {
397 fep->ptp_clock = NULL; 406 fep->ptp_clock = NULL;
398 pr_err("ptp_clock_register failed\n"); 407 pr_err("ptp_clock_register failed\n");
399 } 408 }
409
410 schedule_delayed_work(&fep->time_keep, HZ);
400} 411}