diff options
author | Francois Romieu <romieu@fr.zoreil.com> | 2012-03-13 04:27:47 -0400 |
---|---|---|
committer | Francois Romieu <romieu@fr.zoreil.com> | 2012-04-07 05:47:16 -0400 |
commit | ebaf7f8f78e8600b56010121766ed832f2f57b0f (patch) | |
tree | fccabfd9201e6d0e5a3030050c7dc531d3f3aef6 /drivers/net/ethernet/dec | |
parent | d59a1881c0ff63f9edbc7f4ad5a5e593fe779e1b (diff) |
xircom_cb: stop using net_device.{base_addr, irq} and convert to __iomem.
Signed-off-by: Francois Romieu <romieu@fr.zoreil.com>
Acked-by: Grant Grundler <grundler@parisc-linux.org>
Diffstat (limited to 'drivers/net/ethernet/dec')
-rw-r--r-- | drivers/net/ethernet/dec/tulip/xircom_cb.c | 227 |
1 files changed, 124 insertions, 103 deletions
diff --git a/drivers/net/ethernet/dec/tulip/xircom_cb.c b/drivers/net/ethernet/dec/tulip/xircom_cb.c index cbcc6d6f3f31..138bf83bc98e 100644 --- a/drivers/net/ethernet/dec/tulip/xircom_cb.c +++ b/drivers/net/ethernet/dec/tulip/xircom_cb.c | |||
@@ -41,7 +41,9 @@ MODULE_DESCRIPTION("Xircom Cardbus ethernet driver"); | |||
41 | MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); | 41 | MODULE_AUTHOR("Arjan van de Ven <arjanv@redhat.com>"); |
42 | MODULE_LICENSE("GPL"); | 42 | MODULE_LICENSE("GPL"); |
43 | 43 | ||
44 | 44 | #define xw32(reg, val) iowrite32(val, ioaddr + (reg)) | |
45 | #define xr32(reg) ioread32(ioaddr + (reg)) | ||
46 | #define xr8(reg) ioread8(ioaddr + (reg)) | ||
45 | 47 | ||
46 | /* IO registers on the card, offsets */ | 48 | /* IO registers on the card, offsets */ |
47 | #define CSR0 0x00 | 49 | #define CSR0 0x00 |
@@ -83,7 +85,7 @@ struct xircom_private { | |||
83 | 85 | ||
84 | struct sk_buff *tx_skb[4]; | 86 | struct sk_buff *tx_skb[4]; |
85 | 87 | ||
86 | unsigned long io_port; | 88 | void __iomem *ioaddr; |
87 | int open; | 89 | int open; |
88 | 90 | ||
89 | /* transmit_used is the rotating counter that indicates which transmit | 91 | /* transmit_used is the rotating counter that indicates which transmit |
@@ -137,7 +139,7 @@ static int link_status(struct xircom_private *card); | |||
137 | 139 | ||
138 | 140 | ||
139 | static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = { | 141 | static DEFINE_PCI_DEVICE_TABLE(xircom_pci_table) = { |
140 | {0x115D, 0x0003, PCI_ANY_ID, PCI_ANY_ID,}, | 142 | { PCI_VDEVICE(XIRCOM, 0x0003), }, |
141 | {0,}, | 143 | {0,}, |
142 | }; | 144 | }; |
143 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); | 145 | MODULE_DEVICE_TABLE(pci, xircom_pci_table); |
@@ -146,9 +148,7 @@ static struct pci_driver xircom_ops = { | |||
146 | .name = "xircom_cb", | 148 | .name = "xircom_cb", |
147 | .id_table = xircom_pci_table, | 149 | .id_table = xircom_pci_table, |
148 | .probe = xircom_probe, | 150 | .probe = xircom_probe, |
149 | .remove = xircom_remove, | 151 | .remove = __devexit_p(xircom_remove), |
150 | .suspend =NULL, | ||
151 | .resume =NULL | ||
152 | }; | 152 | }; |
153 | 153 | ||
154 | 154 | ||
@@ -253,10 +253,13 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
253 | 253 | ||
254 | private->dev = dev; | 254 | private->dev = dev; |
255 | private->pdev = pdev; | 255 | private->pdev = pdev; |
256 | private->io_port = pci_resource_start(pdev, 0); | 256 | |
257 | /* IO range. */ | ||
258 | private->ioaddr = pci_iomap(pdev, 0, 0); | ||
259 | if (!private->ioaddr) | ||
260 | goto reg_fail; | ||
261 | |||
257 | spin_lock_init(&private->lock); | 262 | spin_lock_init(&private->lock); |
258 | dev->irq = pdev->irq; | ||
259 | dev->base_addr = private->io_port; | ||
260 | 263 | ||
261 | initialize_card(private); | 264 | initialize_card(private); |
262 | read_mac_address(private); | 265 | read_mac_address(private); |
@@ -268,7 +271,7 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
268 | rc = register_netdev(dev); | 271 | rc = register_netdev(dev); |
269 | if (rc < 0) { | 272 | if (rc < 0) { |
270 | pr_err("%s: netdevice registration failed\n", __func__); | 273 | pr_err("%s: netdevice registration failed\n", __func__); |
271 | goto reg_fail; | 274 | goto err_unmap; |
272 | } | 275 | } |
273 | 276 | ||
274 | netdev_info(dev, "Xircom cardbus revision %i at irq %i\n", | 277 | netdev_info(dev, "Xircom cardbus revision %i at irq %i\n", |
@@ -286,6 +289,8 @@ static int __devinit xircom_probe(struct pci_dev *pdev, const struct pci_device_ | |||
286 | out: | 289 | out: |
287 | return rc; | 290 | return rc; |
288 | 291 | ||
292 | err_unmap: | ||
293 | pci_iounmap(pdev, private->ioaddr); | ||
289 | reg_fail: | 294 | reg_fail: |
290 | pci_set_drvdata(pdev, NULL); | 295 | pci_set_drvdata(pdev, NULL); |
291 | dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle); | 296 | dma_free_coherent(d, 8192, private->tx_buffer, private->tx_dma_handle); |
@@ -314,6 +319,7 @@ static void __devexit xircom_remove(struct pci_dev *pdev) | |||
314 | struct device *d = &pdev->dev; | 319 | struct device *d = &pdev->dev; |
315 | 320 | ||
316 | unregister_netdev(dev); | 321 | unregister_netdev(dev); |
322 | pci_iounmap(pdev, card->ioaddr); | ||
317 | pci_set_drvdata(pdev, NULL); | 323 | pci_set_drvdata(pdev, NULL); |
318 | dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle); | 324 | dma_free_coherent(d, 8192, card->tx_buffer, card->tx_dma_handle); |
319 | dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle); | 325 | dma_free_coherent(d, 8192, card->rx_buffer, card->rx_dma_handle); |
@@ -326,11 +332,12 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance) | |||
326 | { | 332 | { |
327 | struct net_device *dev = (struct net_device *) dev_instance; | 333 | struct net_device *dev = (struct net_device *) dev_instance; |
328 | struct xircom_private *card = netdev_priv(dev); | 334 | struct xircom_private *card = netdev_priv(dev); |
335 | void __iomem *ioaddr = card->ioaddr; | ||
329 | unsigned int status; | 336 | unsigned int status; |
330 | int i; | 337 | int i; |
331 | 338 | ||
332 | spin_lock(&card->lock); | 339 | spin_lock(&card->lock); |
333 | status = inl(card->io_port+CSR5); | 340 | status = xr32(CSR5); |
334 | 341 | ||
335 | #if defined DEBUG && DEBUG > 1 | 342 | #if defined DEBUG && DEBUG > 1 |
336 | print_binary(status); | 343 | print_binary(status); |
@@ -360,7 +367,7 @@ static irqreturn_t xircom_interrupt(int irq, void *dev_instance) | |||
360 | /* Clear all remaining interrupts */ | 367 | /* Clear all remaining interrupts */ |
361 | status |= 0xffffffff; /* FIXME: make this clear only the | 368 | status |= 0xffffffff; /* FIXME: make this clear only the |
362 | real existing bits */ | 369 | real existing bits */ |
363 | outl(status,card->io_port+CSR5); | 370 | xw32(CSR5, status); |
364 | 371 | ||
365 | 372 | ||
366 | for (i=0;i<NUMDESCRIPTORS;i++) | 373 | for (i=0;i<NUMDESCRIPTORS;i++) |
@@ -438,11 +445,11 @@ static netdev_tx_t xircom_start_xmit(struct sk_buff *skb, | |||
438 | static int xircom_open(struct net_device *dev) | 445 | static int xircom_open(struct net_device *dev) |
439 | { | 446 | { |
440 | struct xircom_private *xp = netdev_priv(dev); | 447 | struct xircom_private *xp = netdev_priv(dev); |
448 | const int irq = xp->pdev->irq; | ||
441 | int retval; | 449 | int retval; |
442 | 450 | ||
443 | netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", | 451 | netdev_info(dev, "xircom cardbus adaptor found, using irq %i\n", irq); |
444 | dev->irq); | 452 | retval = request_irq(irq, xircom_interrupt, IRQF_SHARED, dev->name, dev); |
445 | retval = request_irq(dev->irq, xircom_interrupt, IRQF_SHARED, dev->name, dev); | ||
446 | if (retval) | 453 | if (retval) |
447 | return retval; | 454 | return retval; |
448 | 455 | ||
@@ -474,7 +481,7 @@ static int xircom_close(struct net_device *dev) | |||
474 | spin_unlock_irqrestore(&card->lock,flags); | 481 | spin_unlock_irqrestore(&card->lock,flags); |
475 | 482 | ||
476 | card->open = 0; | 483 | card->open = 0; |
477 | free_irq(dev->irq,dev); | 484 | free_irq(card->pdev->irq, dev); |
478 | 485 | ||
479 | return 0; | 486 | return 0; |
480 | 487 | ||
@@ -484,35 +491,39 @@ static int xircom_close(struct net_device *dev) | |||
484 | #ifdef CONFIG_NET_POLL_CONTROLLER | 491 | #ifdef CONFIG_NET_POLL_CONTROLLER |
485 | static void xircom_poll_controller(struct net_device *dev) | 492 | static void xircom_poll_controller(struct net_device *dev) |
486 | { | 493 | { |
487 | disable_irq(dev->irq); | 494 | struct xircom_private *xp = netdev_priv(dev); |
488 | xircom_interrupt(dev->irq, dev); | 495 | const int irq = xp->pdev->irq; |
489 | enable_irq(dev->irq); | 496 | |
497 | disable_irq(irq); | ||
498 | xircom_interrupt(irq, dev); | ||
499 | enable_irq(irq); | ||
490 | } | 500 | } |
491 | #endif | 501 | #endif |
492 | 502 | ||
493 | 503 | ||
494 | static void initialize_card(struct xircom_private *card) | 504 | static void initialize_card(struct xircom_private *card) |
495 | { | 505 | { |
496 | unsigned int val; | 506 | void __iomem *ioaddr = card->ioaddr; |
497 | unsigned long flags; | 507 | unsigned long flags; |
508 | u32 val; | ||
498 | 509 | ||
499 | spin_lock_irqsave(&card->lock, flags); | 510 | spin_lock_irqsave(&card->lock, flags); |
500 | 511 | ||
501 | /* First: reset the card */ | 512 | /* First: reset the card */ |
502 | val = inl(card->io_port + CSR0); | 513 | val = xr32(CSR0); |
503 | val |= 0x01; /* Software reset */ | 514 | val |= 0x01; /* Software reset */ |
504 | outl(val, card->io_port + CSR0); | 515 | xw32(CSR0, val); |
505 | 516 | ||
506 | udelay(100); /* give the card some time to reset */ | 517 | udelay(100); /* give the card some time to reset */ |
507 | 518 | ||
508 | val = inl(card->io_port + CSR0); | 519 | val = xr32(CSR0); |
509 | val &= ~0x01; /* disable Software reset */ | 520 | val &= ~0x01; /* disable Software reset */ |
510 | outl(val, card->io_port + CSR0); | 521 | xw32(CSR0, val); |
511 | 522 | ||
512 | 523 | ||
513 | val = 0; /* Value 0x00 is a safe and conservative value | 524 | val = 0; /* Value 0x00 is a safe and conservative value |
514 | for the PCI configuration settings */ | 525 | for the PCI configuration settings */ |
515 | outl(val, card->io_port + CSR0); | 526 | xw32(CSR0, val); |
516 | 527 | ||
517 | 528 | ||
518 | disable_all_interrupts(card); | 529 | disable_all_interrupts(card); |
@@ -530,10 +541,9 @@ ignored; I chose zero. | |||
530 | */ | 541 | */ |
531 | static void trigger_transmit(struct xircom_private *card) | 542 | static void trigger_transmit(struct xircom_private *card) |
532 | { | 543 | { |
533 | unsigned int val; | 544 | void __iomem *ioaddr = card->ioaddr; |
534 | 545 | ||
535 | val = 0; | 546 | xw32(CSR1, 0); |
536 | outl(val, card->io_port + CSR1); | ||
537 | } | 547 | } |
538 | 548 | ||
539 | /* | 549 | /* |
@@ -545,10 +555,9 @@ ignored; I chose zero. | |||
545 | */ | 555 | */ |
546 | static void trigger_receive(struct xircom_private *card) | 556 | static void trigger_receive(struct xircom_private *card) |
547 | { | 557 | { |
548 | unsigned int val; | 558 | void __iomem *ioaddr = card->ioaddr; |
549 | 559 | ||
550 | val = 0; | 560 | xw32(CSR2, 0); |
551 | outl(val, card->io_port + CSR2); | ||
552 | } | 561 | } |
553 | 562 | ||
554 | /* | 563 | /* |
@@ -557,6 +566,7 @@ descriptors and programs the addresses into the card. | |||
557 | */ | 566 | */ |
558 | static void setup_descriptors(struct xircom_private *card) | 567 | static void setup_descriptors(struct xircom_private *card) |
559 | { | 568 | { |
569 | void __iomem *ioaddr = card->ioaddr; | ||
560 | u32 address; | 570 | u32 address; |
561 | int i; | 571 | int i; |
562 | 572 | ||
@@ -586,7 +596,7 @@ static void setup_descriptors(struct xircom_private *card) | |||
586 | wmb(); | 596 | wmb(); |
587 | /* Write the receive descriptor ring address to the card */ | 597 | /* Write the receive descriptor ring address to the card */ |
588 | address = card->rx_dma_handle; | 598 | address = card->rx_dma_handle; |
589 | outl(address, card->io_port + CSR3); /* Receive descr list address */ | 599 | xw32(CSR3, address); /* Receive descr list address */ |
590 | 600 | ||
591 | 601 | ||
592 | /* transmit descriptors */ | 602 | /* transmit descriptors */ |
@@ -611,7 +621,7 @@ static void setup_descriptors(struct xircom_private *card) | |||
611 | wmb(); | 621 | wmb(); |
612 | /* wite the transmit descriptor ring to the card */ | 622 | /* wite the transmit descriptor ring to the card */ |
613 | address = card->tx_dma_handle; | 623 | address = card->tx_dma_handle; |
614 | outl(address, card->io_port + CSR4); /* xmit descr list address */ | 624 | xw32(CSR4, address); /* xmit descr list address */ |
615 | } | 625 | } |
616 | 626 | ||
617 | /* | 627 | /* |
@@ -620,11 +630,12 @@ valid by setting the address in the card to 0x00. | |||
620 | */ | 630 | */ |
621 | static void remove_descriptors(struct xircom_private *card) | 631 | static void remove_descriptors(struct xircom_private *card) |
622 | { | 632 | { |
633 | void __iomem *ioaddr = card->ioaddr; | ||
623 | unsigned int val; | 634 | unsigned int val; |
624 | 635 | ||
625 | val = 0; | 636 | val = 0; |
626 | outl(val, card->io_port + CSR3); /* Receive descriptor address */ | 637 | xw32(CSR3, val); /* Receive descriptor address */ |
627 | outl(val, card->io_port + CSR4); /* Send descriptor address */ | 638 | xw32(CSR4, val); /* Send descriptor address */ |
628 | } | 639 | } |
629 | 640 | ||
630 | /* | 641 | /* |
@@ -635,17 +646,17 @@ This function also clears the status-bit. | |||
635 | */ | 646 | */ |
636 | static int link_status_changed(struct xircom_private *card) | 647 | static int link_status_changed(struct xircom_private *card) |
637 | { | 648 | { |
649 | void __iomem *ioaddr = card->ioaddr; | ||
638 | unsigned int val; | 650 | unsigned int val; |
639 | 651 | ||
640 | val = inl(card->io_port + CSR5); /* Status register */ | 652 | val = xr32(CSR5); /* Status register */ |
641 | 653 | if (!(val & (1 << 27))) /* no change */ | |
642 | if ((val & (1 << 27)) == 0) /* no change */ | ||
643 | return 0; | 654 | return 0; |
644 | 655 | ||
645 | /* clear the event by writing a 1 to the bit in the | 656 | /* clear the event by writing a 1 to the bit in the |
646 | status register. */ | 657 | status register. */ |
647 | val = (1 << 27); | 658 | val = (1 << 27); |
648 | outl(val, card->io_port + CSR5); | 659 | xw32(CSR5, val); |
649 | 660 | ||
650 | return 1; | 661 | return 1; |
651 | } | 662 | } |
@@ -657,11 +668,9 @@ in a non-stopped state. | |||
657 | */ | 668 | */ |
658 | static int transmit_active(struct xircom_private *card) | 669 | static int transmit_active(struct xircom_private *card) |
659 | { | 670 | { |
660 | unsigned int val; | 671 | void __iomem *ioaddr = card->ioaddr; |
661 | 672 | ||
662 | val = inl(card->io_port + CSR5); /* Status register */ | 673 | if (!(xr32(CSR5) & (7 << 20))) /* transmitter disabled */ |
663 | |||
664 | if ((val & (7 << 20)) == 0) /* transmitter disabled */ | ||
665 | return 0; | 674 | return 0; |
666 | 675 | ||
667 | return 1; | 676 | return 1; |
@@ -673,11 +682,9 @@ in a non-stopped state. | |||
673 | */ | 682 | */ |
674 | static int receive_active(struct xircom_private *card) | 683 | static int receive_active(struct xircom_private *card) |
675 | { | 684 | { |
676 | unsigned int val; | 685 | void __iomem *ioaddr = card->ioaddr; |
677 | |||
678 | val = inl(card->io_port + CSR5); /* Status register */ | ||
679 | 686 | ||
680 | if ((val & (7 << 17)) == 0) /* receiver disabled */ | 687 | if (!(xr32(CSR5) & (7 << 17))) /* receiver disabled */ |
681 | return 0; | 688 | return 0; |
682 | 689 | ||
683 | return 1; | 690 | return 1; |
@@ -695,10 +702,11 @@ must be called with the lock held and interrupts disabled. | |||
695 | */ | 702 | */ |
696 | static void activate_receiver(struct xircom_private *card) | 703 | static void activate_receiver(struct xircom_private *card) |
697 | { | 704 | { |
705 | void __iomem *ioaddr = card->ioaddr; | ||
698 | unsigned int val; | 706 | unsigned int val; |
699 | int counter; | 707 | int counter; |
700 | 708 | ||
701 | val = inl(card->io_port + CSR6); /* Operation mode */ | 709 | val = xr32(CSR6); /* Operation mode */ |
702 | 710 | ||
703 | /* If the "active" bit is set and the receiver is already | 711 | /* If the "active" bit is set and the receiver is already |
704 | active, no need to do the expensive thing */ | 712 | active, no need to do the expensive thing */ |
@@ -707,7 +715,7 @@ static void activate_receiver(struct xircom_private *card) | |||
707 | 715 | ||
708 | 716 | ||
709 | val = val & ~2; /* disable the receiver */ | 717 | val = val & ~2; /* disable the receiver */ |
710 | outl(val, card->io_port + CSR6); | 718 | xw32(CSR6, val); |
711 | 719 | ||
712 | counter = 10; | 720 | counter = 10; |
713 | while (counter > 0) { | 721 | while (counter > 0) { |
@@ -721,9 +729,9 @@ static void activate_receiver(struct xircom_private *card) | |||
721 | } | 729 | } |
722 | 730 | ||
723 | /* enable the receiver */ | 731 | /* enable the receiver */ |
724 | val = inl(card->io_port + CSR6); /* Operation mode */ | 732 | val = xr32(CSR6); /* Operation mode */ |
725 | val = val | 2; /* enable the receiver */ | 733 | val = val | 2; /* enable the receiver */ |
726 | outl(val, card->io_port + CSR6); | 734 | xw32(CSR6, val); |
727 | 735 | ||
728 | /* now wait for the card to activate again */ | 736 | /* now wait for the card to activate again */ |
729 | counter = 10; | 737 | counter = 10; |
@@ -748,12 +756,13 @@ must be called with the lock held and interrupts disabled. | |||
748 | */ | 756 | */ |
749 | static void deactivate_receiver(struct xircom_private *card) | 757 | static void deactivate_receiver(struct xircom_private *card) |
750 | { | 758 | { |
759 | void __iomem *ioaddr = card->ioaddr; | ||
751 | unsigned int val; | 760 | unsigned int val; |
752 | int counter; | 761 | int counter; |
753 | 762 | ||
754 | val = inl(card->io_port + CSR6); /* Operation mode */ | 763 | val = xr32(CSR6); /* Operation mode */ |
755 | val = val & ~2; /* disable the receiver */ | 764 | val = val & ~2; /* disable the receiver */ |
756 | outl(val, card->io_port + CSR6); | 765 | xw32(CSR6, val); |
757 | 766 | ||
758 | counter = 10; | 767 | counter = 10; |
759 | while (counter > 0) { | 768 | while (counter > 0) { |
@@ -780,10 +789,11 @@ must be called with the lock held and interrupts disabled. | |||
780 | */ | 789 | */ |
781 | static void activate_transmitter(struct xircom_private *card) | 790 | static void activate_transmitter(struct xircom_private *card) |
782 | { | 791 | { |
792 | void __iomem *ioaddr = card->ioaddr; | ||
783 | unsigned int val; | 793 | unsigned int val; |
784 | int counter; | 794 | int counter; |
785 | 795 | ||
786 | val = inl(card->io_port + CSR6); /* Operation mode */ | 796 | val = xr32(CSR6); /* Operation mode */ |
787 | 797 | ||
788 | /* If the "active" bit is set and the receiver is already | 798 | /* If the "active" bit is set and the receiver is already |
789 | active, no need to do the expensive thing */ | 799 | active, no need to do the expensive thing */ |
@@ -791,7 +801,7 @@ static void activate_transmitter(struct xircom_private *card) | |||
791 | return; | 801 | return; |
792 | 802 | ||
793 | val = val & ~(1 << 13); /* disable the transmitter */ | 803 | val = val & ~(1 << 13); /* disable the transmitter */ |
794 | outl(val, card->io_port + CSR6); | 804 | xw32(CSR6, val); |
795 | 805 | ||
796 | counter = 10; | 806 | counter = 10; |
797 | while (counter > 0) { | 807 | while (counter > 0) { |
@@ -806,9 +816,9 @@ static void activate_transmitter(struct xircom_private *card) | |||
806 | } | 816 | } |
807 | 817 | ||
808 | /* enable the transmitter */ | 818 | /* enable the transmitter */ |
809 | val = inl(card->io_port + CSR6); /* Operation mode */ | 819 | val = xr32(CSR6); /* Operation mode */ |
810 | val = val | (1 << 13); /* enable the transmitter */ | 820 | val = val | (1 << 13); /* enable the transmitter */ |
811 | outl(val, card->io_port + CSR6); | 821 | xw32(CSR6, val); |
812 | 822 | ||
813 | /* now wait for the card to activate again */ | 823 | /* now wait for the card to activate again */ |
814 | counter = 10; | 824 | counter = 10; |
@@ -833,12 +843,13 @@ must be called with the lock held and interrupts disabled. | |||
833 | */ | 843 | */ |
834 | static void deactivate_transmitter(struct xircom_private *card) | 844 | static void deactivate_transmitter(struct xircom_private *card) |
835 | { | 845 | { |
846 | void __iomem *ioaddr = card->ioaddr; | ||
836 | unsigned int val; | 847 | unsigned int val; |
837 | int counter; | 848 | int counter; |
838 | 849 | ||
839 | val = inl(card->io_port + CSR6); /* Operation mode */ | 850 | val = xr32(CSR6); /* Operation mode */ |
840 | val = val & ~2; /* disable the transmitter */ | 851 | val = val & ~2; /* disable the transmitter */ |
841 | outl(val, card->io_port + CSR6); | 852 | xw32(CSR6, val); |
842 | 853 | ||
843 | counter = 20; | 854 | counter = 20; |
844 | while (counter > 0) { | 855 | while (counter > 0) { |
@@ -861,11 +872,12 @@ must be called with the lock held and interrupts disabled. | |||
861 | */ | 872 | */ |
862 | static void enable_transmit_interrupt(struct xircom_private *card) | 873 | static void enable_transmit_interrupt(struct xircom_private *card) |
863 | { | 874 | { |
875 | void __iomem *ioaddr = card->ioaddr; | ||
864 | unsigned int val; | 876 | unsigned int val; |
865 | 877 | ||
866 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | 878 | val = xr32(CSR7); /* Interrupt enable register */ |
867 | val |= 1; /* enable the transmit interrupt */ | 879 | val |= 1; /* enable the transmit interrupt */ |
868 | outl(val, card->io_port + CSR7); | 880 | xw32(CSR7, val); |
869 | } | 881 | } |
870 | 882 | ||
871 | 883 | ||
@@ -876,11 +888,12 @@ must be called with the lock held and interrupts disabled. | |||
876 | */ | 888 | */ |
877 | static void enable_receive_interrupt(struct xircom_private *card) | 889 | static void enable_receive_interrupt(struct xircom_private *card) |
878 | { | 890 | { |
891 | void __iomem *ioaddr = card->ioaddr; | ||
879 | unsigned int val; | 892 | unsigned int val; |
880 | 893 | ||
881 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | 894 | val = xr32(CSR7); /* Interrupt enable register */ |
882 | val = val | (1 << 6); /* enable the receive interrupt */ | 895 | val = val | (1 << 6); /* enable the receive interrupt */ |
883 | outl(val, card->io_port + CSR7); | 896 | xw32(CSR7, val); |
884 | } | 897 | } |
885 | 898 | ||
886 | /* | 899 | /* |
@@ -890,11 +903,12 @@ must be called with the lock held and interrupts disabled. | |||
890 | */ | 903 | */ |
891 | static void enable_link_interrupt(struct xircom_private *card) | 904 | static void enable_link_interrupt(struct xircom_private *card) |
892 | { | 905 | { |
906 | void __iomem *ioaddr = card->ioaddr; | ||
893 | unsigned int val; | 907 | unsigned int val; |
894 | 908 | ||
895 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | 909 | val = xr32(CSR7); /* Interrupt enable register */ |
896 | val = val | (1 << 27); /* enable the link status chage interrupt */ | 910 | val = val | (1 << 27); /* enable the link status chage interrupt */ |
897 | outl(val, card->io_port + CSR7); | 911 | xw32(CSR7, val); |
898 | } | 912 | } |
899 | 913 | ||
900 | 914 | ||
@@ -906,10 +920,9 @@ must be called with the lock held and interrupts disabled. | |||
906 | */ | 920 | */ |
907 | static void disable_all_interrupts(struct xircom_private *card) | 921 | static void disable_all_interrupts(struct xircom_private *card) |
908 | { | 922 | { |
909 | unsigned int val; | 923 | void __iomem *ioaddr = card->ioaddr; |
910 | 924 | ||
911 | val = 0; /* disable all interrupts */ | 925 | xw32(CSR7, 0); |
912 | outl(val, card->io_port + CSR7); | ||
913 | } | 926 | } |
914 | 927 | ||
915 | /* | 928 | /* |
@@ -919,9 +932,10 @@ must be called with the lock held and interrupts disabled. | |||
919 | */ | 932 | */ |
920 | static void enable_common_interrupts(struct xircom_private *card) | 933 | static void enable_common_interrupts(struct xircom_private *card) |
921 | { | 934 | { |
935 | void __iomem *ioaddr = card->ioaddr; | ||
922 | unsigned int val; | 936 | unsigned int val; |
923 | 937 | ||
924 | val = inl(card->io_port + CSR7); /* Interrupt enable register */ | 938 | val = xr32(CSR7); /* Interrupt enable register */ |
925 | val |= (1<<16); /* Normal Interrupt Summary */ | 939 | val |= (1<<16); /* Normal Interrupt Summary */ |
926 | val |= (1<<15); /* Abnormal Interrupt Summary */ | 940 | val |= (1<<15); /* Abnormal Interrupt Summary */ |
927 | val |= (1<<13); /* Fatal bus error */ | 941 | val |= (1<<13); /* Fatal bus error */ |
@@ -930,7 +944,7 @@ static void enable_common_interrupts(struct xircom_private *card) | |||
930 | val |= (1<<5); /* Transmit Underflow */ | 944 | val |= (1<<5); /* Transmit Underflow */ |
931 | val |= (1<<2); /* Transmit Buffer Unavailable */ | 945 | val |= (1<<2); /* Transmit Buffer Unavailable */ |
932 | val |= (1<<1); /* Transmit Process Stopped */ | 946 | val |= (1<<1); /* Transmit Process Stopped */ |
933 | outl(val, card->io_port + CSR7); | 947 | xw32(CSR7, val); |
934 | } | 948 | } |
935 | 949 | ||
936 | /* | 950 | /* |
@@ -940,11 +954,12 @@ must be called with the lock held and interrupts disabled. | |||
940 | */ | 954 | */ |
941 | static int enable_promisc(struct xircom_private *card) | 955 | static int enable_promisc(struct xircom_private *card) |
942 | { | 956 | { |
957 | void __iomem *ioaddr = card->ioaddr; | ||
943 | unsigned int val; | 958 | unsigned int val; |
944 | 959 | ||
945 | val = inl(card->io_port + CSR6); | 960 | val = xr32(CSR6); |
946 | val = val | (1 << 6); | 961 | val = val | (1 << 6); |
947 | outl(val, card->io_port + CSR6); | 962 | xw32(CSR6, val); |
948 | 963 | ||
949 | return 1; | 964 | return 1; |
950 | } | 965 | } |
@@ -959,13 +974,16 @@ Must be called in locked state with interrupts disabled | |||
959 | */ | 974 | */ |
960 | static int link_status(struct xircom_private *card) | 975 | static int link_status(struct xircom_private *card) |
961 | { | 976 | { |
962 | unsigned int val; | 977 | void __iomem *ioaddr = card->ioaddr; |
978 | u8 val; | ||
963 | 979 | ||
964 | val = inb(card->io_port + CSR12); | 980 | val = xr8(CSR12); |
965 | 981 | ||
966 | if (!(val&(1<<2))) /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ | 982 | /* bit 2 is 0 for 10mbit link, 1 for not an 10mbit link */ |
983 | if (!(val & (1 << 2))) | ||
967 | return 10; | 984 | return 10; |
968 | if (!(val&(1<<1))) /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ | 985 | /* bit 1 is 0 for 100mbit link, 1 for not an 100mbit link */ |
986 | if (!(val & (1 << 1))) | ||
969 | return 100; | 987 | return 100; |
970 | 988 | ||
971 | /* If we get here -> no link at all */ | 989 | /* If we get here -> no link at all */ |
@@ -984,29 +1002,31 @@ static int link_status(struct xircom_private *card) | |||
984 | */ | 1002 | */ |
985 | static void read_mac_address(struct xircom_private *card) | 1003 | static void read_mac_address(struct xircom_private *card) |
986 | { | 1004 | { |
987 | unsigned char j, tuple, link, data_id, data_count; | 1005 | void __iomem *ioaddr = card->ioaddr; |
988 | unsigned long flags; | 1006 | unsigned long flags; |
1007 | u8 link; | ||
989 | int i; | 1008 | int i; |
990 | 1009 | ||
991 | spin_lock_irqsave(&card->lock, flags); | 1010 | spin_lock_irqsave(&card->lock, flags); |
992 | 1011 | ||
993 | outl(1 << 12, card->io_port + CSR9); /* enable boot rom access */ | 1012 | xw32(CSR9, 1 << 12); /* enable boot rom access */ |
994 | for (i = 0x100; i < 0x1f7; i += link + 2) { | 1013 | for (i = 0x100; i < 0x1f7; i += link + 2) { |
995 | outl(i, card->io_port + CSR10); | 1014 | u8 tuple, data_id, data_count; |
996 | tuple = inl(card->io_port + CSR9) & 0xff; | 1015 | |
997 | outl(i + 1, card->io_port + CSR10); | 1016 | xw32(CSR10, i); |
998 | link = inl(card->io_port + CSR9) & 0xff; | 1017 | tuple = xr32(CSR9); |
999 | outl(i + 2, card->io_port + CSR10); | 1018 | xw32(CSR10, i + 1); |
1000 | data_id = inl(card->io_port + CSR9) & 0xff; | 1019 | link = xr32(CSR9); |
1001 | outl(i + 3, card->io_port + CSR10); | 1020 | xw32(CSR10, i + 2); |
1002 | data_count = inl(card->io_port + CSR9) & 0xff; | 1021 | data_id = xr32(CSR9); |
1022 | xw32(CSR10, i + 3); | ||
1023 | data_count = xr32(CSR9); | ||
1003 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { | 1024 | if ((tuple == 0x22) && (data_id == 0x04) && (data_count == 0x06)) { |
1004 | /* | 1025 | int j; |
1005 | * This is it. We have the data we want. | 1026 | |
1006 | */ | ||
1007 | for (j = 0; j < 6; j++) { | 1027 | for (j = 0; j < 6; j++) { |
1008 | outl(i + j + 4, card->io_port + CSR10); | 1028 | xw32(CSR10, i + j + 4); |
1009 | card->dev->dev_addr[j] = inl(card->io_port + CSR9) & 0xff; | 1029 | card->dev->dev_addr[j] = xr32(CSR9) & 0xff; |
1010 | } | 1030 | } |
1011 | break; | 1031 | break; |
1012 | } else if (link == 0) { | 1032 | } else if (link == 0) { |
@@ -1025,6 +1045,7 @@ static void read_mac_address(struct xircom_private *card) | |||
1025 | */ | 1045 | */ |
1026 | static void transceiver_voodoo(struct xircom_private *card) | 1046 | static void transceiver_voodoo(struct xircom_private *card) |
1027 | { | 1047 | { |
1048 | void __iomem *ioaddr = card->ioaddr; | ||
1028 | unsigned long flags; | 1049 | unsigned long flags; |
1029 | 1050 | ||
1030 | /* disable all powermanagement */ | 1051 | /* disable all powermanagement */ |
@@ -1034,14 +1055,14 @@ static void transceiver_voodoo(struct xircom_private *card) | |||
1034 | 1055 | ||
1035 | spin_lock_irqsave(&card->lock, flags); | 1056 | spin_lock_irqsave(&card->lock, flags); |
1036 | 1057 | ||
1037 | outl(0x0008, card->io_port + CSR15); | 1058 | xw32(CSR15, 0x0008); |
1038 | udelay(25); | 1059 | udelay(25); |
1039 | outl(0xa8050000, card->io_port + CSR15); | 1060 | xw32(CSR15, 0xa8050000); |
1040 | udelay(25); | 1061 | udelay(25); |
1041 | outl(0xa00f0000, card->io_port + CSR15); | 1062 | xw32(CSR15, 0xa00f0000); |
1042 | udelay(25); | 1063 | udelay(25); |
1043 | 1064 | ||
1044 | spin_unlock_irqrestore(&card->lock, flags); | 1065 | spin_unlock_irqrestore(&card->lock, flags); |
1045 | 1066 | ||
1046 | netif_start_queue(card->dev); | 1067 | netif_start_queue(card->dev); |
1047 | } | 1068 | } |