diff options
author | Jamie Iles <jamie.iles@mathembedded.com> | 2011-11-08 05:12:32 -0500 |
---|---|---|
committer | Jamie Iles <jamie@jamieiles.com> | 2011-11-22 10:21:17 -0500 |
commit | f75ba50bdc2bcfab591bdf903312557033d0ac68 (patch) | |
tree | 4ccc618be2fb9f998eed75549ca69b31712b0d0e /drivers/net/ethernet/cadence/macb.h | |
parent | c220f8cd01198552a616c4216f2a8e719fdb5fd9 (diff) |
macb: initial support for Cadence GEM
The Cadence GEM is based on the MACB Ethernet controller but has a few
small changes with regards to register and bitfield placement. This
patch detects the presence of a GEM by reading the module ID register
and setting a flag appropriately.
This handles the new HW address, USRIO and hash register base register
locations in GEM.
v3: - convert to macb_is_gem() inline rather than storing a boolean
flag
- handle rx_overrun stats for gem
Acked-by: David S. Miller <davem@davemloft.net>
Acked-by: Nicolas Ferre <nicolas.ferre@atmel.com>
Cc: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Signed-off-by: Jamie Iles <jamie@jamieiles.com>
Tested-by: Jean-Christophe PLAGNIOL-VILLARD <plagnioj@jcrosoft.com>
Diffstat (limited to 'drivers/net/ethernet/cadence/macb.h')
-rw-r--r-- | drivers/net/ethernet/cadence/macb.h | 61 |
1 files changed, 61 insertions, 0 deletions
diff --git a/drivers/net/ethernet/cadence/macb.h b/drivers/net/ethernet/cadence/macb.h index d3212f6db703..d50057c244b2 100644 --- a/drivers/net/ethernet/cadence/macb.h +++ b/drivers/net/ethernet/cadence/macb.h | |||
@@ -59,6 +59,15 @@ | |||
59 | #define MACB_TPQ 0x00bc | 59 | #define MACB_TPQ 0x00bc |
60 | #define MACB_USRIO 0x00c0 | 60 | #define MACB_USRIO 0x00c0 |
61 | #define MACB_WOL 0x00c4 | 61 | #define MACB_WOL 0x00c4 |
62 | #define MACB_MID 0x00fc | ||
63 | |||
64 | /* GEM register offsets. */ | ||
65 | #define GEM_NCFGR 0x0004 | ||
66 | #define GEM_USRIO 0x000c | ||
67 | #define GEM_HRB 0x0080 | ||
68 | #define GEM_HRT 0x0084 | ||
69 | #define GEM_SA1B 0x0088 | ||
70 | #define GEM_SA1T 0x008C | ||
62 | 71 | ||
63 | /* Bitfields in NCR */ | 72 | /* Bitfields in NCR */ |
64 | #define MACB_LB_OFFSET 0 | 73 | #define MACB_LB_OFFSET 0 |
@@ -228,6 +237,12 @@ | |||
228 | #define MACB_WOL_MTI_OFFSET 19 | 237 | #define MACB_WOL_MTI_OFFSET 19 |
229 | #define MACB_WOL_MTI_SIZE 1 | 238 | #define MACB_WOL_MTI_SIZE 1 |
230 | 239 | ||
240 | /* Bitfields in MID */ | ||
241 | #define MACB_IDNUM_OFFSET 16 | ||
242 | #define MACB_IDNUM_SIZE 16 | ||
243 | #define MACB_REV_OFFSET 0 | ||
244 | #define MACB_REV_SIZE 16 | ||
245 | |||
231 | /* Constants for CLK */ | 246 | /* Constants for CLK */ |
232 | #define MACB_CLK_DIV8 0 | 247 | #define MACB_CLK_DIV8 0 |
233 | #define MACB_CLK_DIV16 1 | 248 | #define MACB_CLK_DIV16 1 |
@@ -254,11 +269,52 @@ | |||
254 | << MACB_##name##_OFFSET)) \ | 269 | << MACB_##name##_OFFSET)) \ |
255 | | MACB_BF(name,value)) | 270 | | MACB_BF(name,value)) |
256 | 271 | ||
272 | #define GEM_BIT(name) \ | ||
273 | (1 << GEM_##name##_OFFSET) | ||
274 | #define GEM_BF(name, value) \ | ||
275 | (((value) & ((1 << GEM_##name##_SIZE) - 1)) \ | ||
276 | << GEM_##name##_OFFSET) | ||
277 | #define GEM_BFEXT(name, value)\ | ||
278 | (((value) >> GEM_##name##_OFFSET) \ | ||
279 | & ((1 << GEM_##name##_SIZE) - 1)) | ||
280 | #define GEM_BFINS(name, value, old) \ | ||
281 | (((old) & ~(((1 << GEM_##name##_SIZE) - 1) \ | ||
282 | << GEM_##name##_OFFSET)) \ | ||
283 | | GEM_BF(name, value)) | ||
284 | |||
257 | /* Register access macros */ | 285 | /* Register access macros */ |
258 | #define macb_readl(port,reg) \ | 286 | #define macb_readl(port,reg) \ |
259 | __raw_readl((port)->regs + MACB_##reg) | 287 | __raw_readl((port)->regs + MACB_##reg) |
260 | #define macb_writel(port,reg,value) \ | 288 | #define macb_writel(port,reg,value) \ |
261 | __raw_writel((value), (port)->regs + MACB_##reg) | 289 | __raw_writel((value), (port)->regs + MACB_##reg) |
290 | #define gem_readl(port, reg) \ | ||
291 | __raw_readl((port)->regs + GEM_##reg) | ||
292 | #define gem_writel(port, reg, value) \ | ||
293 | __raw_writel((value), (port)->regs + GEM_##reg) | ||
294 | |||
295 | /* | ||
296 | * Conditional GEM/MACB macros. These perform the operation to the correct | ||
297 | * register dependent on whether the device is a GEM or a MACB. For registers | ||
298 | * and bitfields that are common across both devices, use macb_{read,write}l | ||
299 | * to avoid the cost of the conditional. | ||
300 | */ | ||
301 | #define macb_or_gem_writel(__bp, __reg, __value) \ | ||
302 | ({ \ | ||
303 | if (macb_is_gem((__bp))) \ | ||
304 | gem_writel((__bp), __reg, __value); \ | ||
305 | else \ | ||
306 | macb_writel((__bp), __reg, __value); \ | ||
307 | }) | ||
308 | |||
309 | #define macb_or_gem_readl(__bp, __reg) \ | ||
310 | ({ \ | ||
311 | u32 __v; \ | ||
312 | if (macb_is_gem((__bp))) \ | ||
313 | __v = gem_readl((__bp), __reg); \ | ||
314 | else \ | ||
315 | __v = macb_readl((__bp), __reg); \ | ||
316 | __v; \ | ||
317 | }) | ||
262 | 318 | ||
263 | struct dma_desc { | 319 | struct dma_desc { |
264 | u32 addr; | 320 | u32 addr; |
@@ -391,4 +447,9 @@ struct macb { | |||
391 | unsigned int duplex; | 447 | unsigned int duplex; |
392 | }; | 448 | }; |
393 | 449 | ||
450 | static inline bool macb_is_gem(struct macb *bp) | ||
451 | { | ||
452 | return MACB_BFEXT(IDNUM, macb_readl(bp, MID)) == 0x2; | ||
453 | } | ||
454 | |||
394 | #endif /* _MACB_H */ | 455 | #endif /* _MACB_H */ |