diff options
author | Michael Chan <mchan@broadcom.com> | 2012-07-29 15:15:41 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2012-07-30 02:18:31 -0400 |
commit | 8151ad576d34a5ec1f1068edf25f3b7c47f6edab (patch) | |
tree | d751e4c95cac884b28374cb94db397581ff33a64 /drivers/net/ethernet/broadcom | |
parent | 8253947e2cdfb14717c9212b751b7aec9ea9ef5e (diff) |
tg3: Request APE_LOCK_PHY before PHY access
to prevent PHY access conflict with APE firmware.
Signed-off-by: Michael Chan <mchan@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom')
-rw-r--r-- | drivers/net/ethernet/broadcom/tg3.c | 37 | ||||
-rw-r--r-- | drivers/net/ethernet/broadcom/tg3.h | 1 |
2 files changed, 38 insertions, 0 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 9a009fd6ea1b..a528f9a6a893 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c | |||
@@ -672,6 +672,12 @@ static int tg3_ape_lock(struct tg3 *tp, int locknum) | |||
672 | else | 672 | else |
673 | bit = 1 << tp->pci_fn; | 673 | bit = 1 << tp->pci_fn; |
674 | break; | 674 | break; |
675 | case TG3_APE_LOCK_PHY0: | ||
676 | case TG3_APE_LOCK_PHY1: | ||
677 | case TG3_APE_LOCK_PHY2: | ||
678 | case TG3_APE_LOCK_PHY3: | ||
679 | bit = APE_LOCK_REQ_DRIVER; | ||
680 | break; | ||
675 | default: | 681 | default: |
676 | return -EINVAL; | 682 | return -EINVAL; |
677 | } | 683 | } |
@@ -723,6 +729,12 @@ static void tg3_ape_unlock(struct tg3 *tp, int locknum) | |||
723 | else | 729 | else |
724 | bit = 1 << tp->pci_fn; | 730 | bit = 1 << tp->pci_fn; |
725 | break; | 731 | break; |
732 | case TG3_APE_LOCK_PHY0: | ||
733 | case TG3_APE_LOCK_PHY1: | ||
734 | case TG3_APE_LOCK_PHY2: | ||
735 | case TG3_APE_LOCK_PHY3: | ||
736 | bit = APE_LOCK_GRANT_DRIVER; | ||
737 | break; | ||
726 | default: | 738 | default: |
727 | return; | 739 | return; |
728 | } | 740 | } |
@@ -1052,6 +1064,8 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) | |||
1052 | udelay(80); | 1064 | udelay(80); |
1053 | } | 1065 | } |
1054 | 1066 | ||
1067 | tg3_ape_lock(tp, tp->phy_ape_lock); | ||
1068 | |||
1055 | *val = 0x0; | 1069 | *val = 0x0; |
1056 | 1070 | ||
1057 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & | 1071 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & |
@@ -1086,6 +1100,8 @@ static int tg3_readphy(struct tg3 *tp, int reg, u32 *val) | |||
1086 | udelay(80); | 1100 | udelay(80); |
1087 | } | 1101 | } |
1088 | 1102 | ||
1103 | tg3_ape_unlock(tp, tp->phy_ape_lock); | ||
1104 | |||
1089 | return ret; | 1105 | return ret; |
1090 | } | 1106 | } |
1091 | 1107 | ||
@@ -1105,6 +1121,8 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val) | |||
1105 | udelay(80); | 1121 | udelay(80); |
1106 | } | 1122 | } |
1107 | 1123 | ||
1124 | tg3_ape_lock(tp, tp->phy_ape_lock); | ||
1125 | |||
1108 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & | 1126 | frame_val = ((tp->phy_addr << MI_COM_PHY_ADDR_SHIFT) & |
1109 | MI_COM_PHY_ADDR_MASK); | 1127 | MI_COM_PHY_ADDR_MASK); |
1110 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & | 1128 | frame_val |= ((reg << MI_COM_REG_ADDR_SHIFT) & |
@@ -1135,6 +1153,8 @@ static int tg3_writephy(struct tg3 *tp, int reg, u32 val) | |||
1135 | udelay(80); | 1153 | udelay(80); |
1136 | } | 1154 | } |
1137 | 1155 | ||
1156 | tg3_ape_unlock(tp, tp->phy_ape_lock); | ||
1157 | |||
1138 | return ret; | 1158 | return ret; |
1139 | } | 1159 | } |
1140 | 1160 | ||
@@ -13648,6 +13668,23 @@ static int __devinit tg3_phy_probe(struct tg3 *tp) | |||
13648 | tg3_flag_set(tp, PAUSE_AUTONEG); | 13668 | tg3_flag_set(tp, PAUSE_AUTONEG); |
13649 | tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; | 13669 | tp->link_config.flowctrl = FLOW_CTRL_TX | FLOW_CTRL_RX; |
13650 | 13670 | ||
13671 | if (tg3_flag(tp, ENABLE_APE)) { | ||
13672 | switch (tp->pci_fn) { | ||
13673 | case 0: | ||
13674 | tp->phy_ape_lock = TG3_APE_LOCK_PHY0; | ||
13675 | break; | ||
13676 | case 1: | ||
13677 | tp->phy_ape_lock = TG3_APE_LOCK_PHY1; | ||
13678 | break; | ||
13679 | case 2: | ||
13680 | tp->phy_ape_lock = TG3_APE_LOCK_PHY2; | ||
13681 | break; | ||
13682 | case 3: | ||
13683 | tp->phy_ape_lock = TG3_APE_LOCK_PHY3; | ||
13684 | break; | ||
13685 | } | ||
13686 | } | ||
13687 | |||
13651 | if (tg3_flag(tp, USE_PHYLIB)) | 13688 | if (tg3_flag(tp, USE_PHYLIB)) |
13652 | return tg3_phy_init(tp); | 13689 | return tg3_phy_init(tp); |
13653 | 13690 | ||
diff --git a/drivers/net/ethernet/broadcom/tg3.h b/drivers/net/ethernet/broadcom/tg3.h index a1b75cd67b9d..6fb45a500032 100644 --- a/drivers/net/ethernet/broadcom/tg3.h +++ b/drivers/net/ethernet/broadcom/tg3.h | |||
@@ -3107,6 +3107,7 @@ struct tg3 { | |||
3107 | int old_link; | 3107 | int old_link; |
3108 | 3108 | ||
3109 | u8 phy_addr; | 3109 | u8 phy_addr; |
3110 | u8 phy_ape_lock; | ||
3110 | 3111 | ||
3111 | /* PHY info */ | 3112 | /* PHY info */ |
3112 | u32 phy_id; | 3113 | u32 phy_id; |