diff options
author | Matt Carlson <mcarlson@broadcom.com> | 2011-12-14 06:10:01 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2011-12-15 13:09:11 -0500 |
commit | bcebcc468a6bcd3820fe9ad36b34220563efc93a (patch) | |
tree | 968e863623c8940b7bcac83dc3253609c44efd8d /drivers/net/ethernet/broadcom/tg3.c | |
parent | f88788f0da6326cbcaa837e12c8c074027891f07 (diff) |
tg3: Break out RSS indir table init and assignment
This patch creates a new device member to hold the RSS indirection table
and separates out the code that initializes the table from the code that
programs the table into device registers.
Signed-off-by: Matt Carlson <mcarlson@broadcom.com>
Reviewed-by: Michael Chan <mchan@broadcom.com>
Reviewed-by: Benjamin Li <benli@broadcom.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/ethernet/broadcom/tg3.c')
-rw-r--r-- | drivers/net/ethernet/broadcom/tg3.c | 57 |
1 files changed, 34 insertions, 23 deletions
diff --git a/drivers/net/ethernet/broadcom/tg3.c b/drivers/net/ethernet/broadcom/tg3.c index 0766d032bd9b..8bf11ca30efe 100644 --- a/drivers/net/ethernet/broadcom/tg3.c +++ b/drivers/net/ethernet/broadcom/tg3.c | |||
@@ -135,7 +135,6 @@ static inline void _tg3_flag_clear(enum TG3_FLAGS flag, unsigned long *bits) | |||
135 | (tg3_flag(tp, LRG_PROD_RING_CAP) ? \ | 135 | (tg3_flag(tp, LRG_PROD_RING_CAP) ? \ |
136 | TG3_RX_JMB_MAX_SIZE_5717 : TG3_RX_JMB_MAX_SIZE_5700) | 136 | TG3_RX_JMB_MAX_SIZE_5717 : TG3_RX_JMB_MAX_SIZE_5700) |
137 | #define TG3_DEF_RX_JUMBO_RING_PENDING 100 | 137 | #define TG3_DEF_RX_JUMBO_RING_PENDING 100 |
138 | #define TG3_RSS_INDIR_TBL_SIZE 128 | ||
139 | 138 | ||
140 | /* Do not place this n-ring entries value into the tp struct itself, | 139 | /* Do not place this n-ring entries value into the tp struct itself, |
141 | * we really want to expose these constants to GCC so that modulo et | 140 | * we really want to expose these constants to GCC so that modulo et |
@@ -8221,6 +8220,37 @@ static void tg3_setup_rxbd_thresholds(struct tg3 *tp) | |||
8221 | tw32(JMB_REPLENISH_LWM, bdcache_maxcnt); | 8220 | tw32(JMB_REPLENISH_LWM, bdcache_maxcnt); |
8222 | } | 8221 | } |
8223 | 8222 | ||
8223 | void tg3_rss_init_indir_tbl(struct tg3 *tp) | ||
8224 | { | ||
8225 | int i; | ||
8226 | |||
8227 | if (!tg3_flag(tp, SUPPORT_MSIX)) | ||
8228 | return; | ||
8229 | |||
8230 | if (tp->irq_cnt <= 2) | ||
8231 | memset(&tp->rss_ind_tbl[0], 0, sizeof(tp->rss_ind_tbl)); | ||
8232 | else | ||
8233 | for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i++) | ||
8234 | tp->rss_ind_tbl[i] = i % (tp->irq_cnt - 1); | ||
8235 | } | ||
8236 | |||
8237 | void tg3_rss_write_indir_tbl(struct tg3 *tp) | ||
8238 | { | ||
8239 | int i = 0; | ||
8240 | u32 reg = MAC_RSS_INDIR_TBL_0; | ||
8241 | |||
8242 | while (i < TG3_RSS_INDIR_TBL_SIZE) { | ||
8243 | u32 val = tp->rss_ind_tbl[i]; | ||
8244 | i++; | ||
8245 | for (; i % 8; i++) { | ||
8246 | val <<= 4; | ||
8247 | val |= tp->rss_ind_tbl[i]; | ||
8248 | } | ||
8249 | tw32(reg, val); | ||
8250 | reg += 4; | ||
8251 | } | ||
8252 | } | ||
8253 | |||
8224 | /* tp->lock is held. */ | 8254 | /* tp->lock is held. */ |
8225 | static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | 8255 | static int tg3_reset_hw(struct tg3 *tp, int reset_phy) |
8226 | { | 8256 | { |
@@ -8914,28 +8944,7 @@ static int tg3_reset_hw(struct tg3 *tp, int reset_phy) | |||
8914 | udelay(100); | 8944 | udelay(100); |
8915 | 8945 | ||
8916 | if (tg3_flag(tp, ENABLE_RSS)) { | 8946 | if (tg3_flag(tp, ENABLE_RSS)) { |
8917 | int i = 0; | 8947 | tg3_rss_write_indir_tbl(tp); |
8918 | u32 reg = MAC_RSS_INDIR_TBL_0; | ||
8919 | |||
8920 | if (tp->irq_cnt == 2) { | ||
8921 | for (i = 0; i < TG3_RSS_INDIR_TBL_SIZE; i += 8) { | ||
8922 | tw32(reg, 0x0); | ||
8923 | reg += 4; | ||
8924 | } | ||
8925 | } else { | ||
8926 | u32 val; | ||
8927 | |||
8928 | while (i < TG3_RSS_INDIR_TBL_SIZE) { | ||
8929 | val = i % (tp->irq_cnt - 1); | ||
8930 | i++; | ||
8931 | for (; i % 8; i++) { | ||
8932 | val <<= 4; | ||
8933 | val |= (i % (tp->irq_cnt - 1)); | ||
8934 | } | ||
8935 | tw32(reg, val); | ||
8936 | reg += 4; | ||
8937 | } | ||
8938 | } | ||
8939 | 8948 | ||
8940 | /* Setup the "secret" hash key. */ | 8949 | /* Setup the "secret" hash key. */ |
8941 | tw32(MAC_RSS_HASH_KEY_0, 0x5f865437); | 8950 | tw32(MAC_RSS_HASH_KEY_0, 0x5f865437); |
@@ -9659,6 +9668,8 @@ static int tg3_open(struct net_device *dev) | |||
9659 | */ | 9668 | */ |
9660 | tg3_ints_init(tp); | 9669 | tg3_ints_init(tp); |
9661 | 9670 | ||
9671 | tg3_rss_init_indir_tbl(tp); | ||
9672 | |||
9662 | /* The placement of this call is tied | 9673 | /* The placement of this call is tied |
9663 | * to the setup and use of Host TX descriptors. | 9674 | * to the setup and use of Host TX descriptors. |
9664 | */ | 9675 | */ |