diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2010-06-16 09:26:17 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-06-19 01:12:15 -0400 |
commit | 3f0c16e84438d657d29446f85fe375794a93f159 (patch) | |
tree | cc0eb3196920711aa42af3db58c7d35d4381611d /drivers/net/e1000e | |
parent | 3af50481eee6bb278da9050266ff31804e7a57d6 (diff) |
e1000e: cleanup e1000_sw_lcd_config_ich8lan()
Do not acquire and release the PHY unnecessarily for parts that return
from this workaround without actually accessing the PHY registers.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Tested-by: Jeff Pieper <jeffrey.e.pieper@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000e')
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 32 |
1 files changed, 19 insertions, 13 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index b2507d93de99..5d8fad3bb203 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -820,14 +820,6 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) | |||
820 | s32 ret_val = 0; | 820 | s32 ret_val = 0; |
821 | u16 word_addr, reg_data, reg_addr, phy_page = 0; | 821 | u16 word_addr, reg_data, reg_addr, phy_page = 0; |
822 | 822 | ||
823 | if (!(hw->mac.type == e1000_ich8lan && phy->type == e1000_phy_igp_3) && | ||
824 | !(hw->mac.type == e1000_pchlan)) | ||
825 | return ret_val; | ||
826 | |||
827 | ret_val = hw->phy.ops.acquire(hw); | ||
828 | if (ret_val) | ||
829 | return ret_val; | ||
830 | |||
831 | /* | 823 | /* |
832 | * Initialize the PHY from the NVM on ICH platforms. This | 824 | * Initialize the PHY from the NVM on ICH platforms. This |
833 | * is needed due to an issue where the NVM configuration is | 825 | * is needed due to an issue where the NVM configuration is |
@@ -835,12 +827,26 @@ static s32 e1000_sw_lcd_config_ich8lan(struct e1000_hw *hw) | |||
835 | * Therefore, after each PHY reset, we will load the | 827 | * Therefore, after each PHY reset, we will load the |
836 | * configuration data out of the NVM manually. | 828 | * configuration data out of the NVM manually. |
837 | */ | 829 | */ |
838 | if ((adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M_AMT) || | 830 | switch (hw->mac.type) { |
839 | (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_M) || | 831 | case e1000_ich8lan: |
840 | (hw->mac.type == e1000_pchlan)) | 832 | if (phy->type != e1000_phy_igp_3) |
833 | return ret_val; | ||
834 | |||
835 | if (adapter->pdev->device == E1000_DEV_ID_ICH8_IGP_AMT) { | ||
836 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | ||
837 | break; | ||
838 | } | ||
839 | /* Fall-thru */ | ||
840 | case e1000_pchlan: | ||
841 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; | 841 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG_ICH8M; |
842 | else | 842 | break; |
843 | sw_cfg_mask = E1000_FEXTNVM_SW_CONFIG; | 843 | default: |
844 | return ret_val; | ||
845 | } | ||
846 | |||
847 | ret_val = hw->phy.ops.acquire(hw); | ||
848 | if (ret_val) | ||
849 | return ret_val; | ||
844 | 850 | ||
845 | data = er32(FEXTNVM); | 851 | data = er32(FEXTNVM); |
846 | if (!(data & sw_cfg_mask)) | 852 | if (!(data & sw_cfg_mask)) |