diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2009-11-20 18:25:26 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-11-21 14:34:08 -0500 |
commit | 94d8186a693284344ee5cb9734086c7a2370241a (patch) | |
tree | 3d6b76940aa7756820207e0eb34cfb44e55926df /drivers/net/e1000e/phy.c | |
parent | 3bb99fe226ead584a4db674dab546689f705201f (diff) |
e1000e: cleanup ops function pointers
The phy and nvm operations structures have function pointers that contain
"phy" and "nvm" in the pointer names which are redundant since the
structures are already obviously in phy and nvm structures.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000e/phy.c')
-rw-r--r-- | drivers/net/e1000e/phy.c | 110 |
1 files changed, 55 insertions, 55 deletions
diff --git a/drivers/net/e1000e/phy.c b/drivers/net/e1000e/phy.c index cff1df204031..765dc389561b 100644 --- a/drivers/net/e1000e/phy.c +++ b/drivers/net/e1000e/phy.c | |||
@@ -131,7 +131,7 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw) | |||
131 | u16 phy_id; | 131 | u16 phy_id; |
132 | u16 retry_count = 0; | 132 | u16 retry_count = 0; |
133 | 133 | ||
134 | if (!(phy->ops.read_phy_reg)) | 134 | if (!(phy->ops.read_reg)) |
135 | goto out; | 135 | goto out; |
136 | 136 | ||
137 | while (retry_count < 2) { | 137 | while (retry_count < 2) { |
@@ -157,24 +157,24 @@ s32 e1000e_get_phy_id(struct e1000_hw *hw) | |||
157 | * MDIC mode. No harm in trying again in this case since | 157 | * MDIC mode. No harm in trying again in this case since |
158 | * the PHY ID is unknown at this point anyway | 158 | * the PHY ID is unknown at this point anyway |
159 | */ | 159 | */ |
160 | ret_val = phy->ops.acquire_phy(hw); | 160 | ret_val = phy->ops.acquire(hw); |
161 | if (ret_val) | 161 | if (ret_val) |
162 | goto out; | 162 | goto out; |
163 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); | 163 | ret_val = e1000_set_mdio_slow_mode_hv(hw, true); |
164 | if (ret_val) | 164 | if (ret_val) |
165 | goto out; | 165 | goto out; |
166 | phy->ops.release_phy(hw); | 166 | phy->ops.release(hw); |
167 | 167 | ||
168 | retry_count++; | 168 | retry_count++; |
169 | } | 169 | } |
170 | out: | 170 | out: |
171 | /* Revert to MDIO fast mode, if applicable */ | 171 | /* Revert to MDIO fast mode, if applicable */ |
172 | if (retry_count) { | 172 | if (retry_count) { |
173 | ret_val = phy->ops.acquire_phy(hw); | 173 | ret_val = phy->ops.acquire(hw); |
174 | if (ret_val) | 174 | if (ret_val) |
175 | return ret_val; | 175 | return ret_val; |
176 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 176 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
177 | phy->ops.release_phy(hw); | 177 | phy->ops.release(hw); |
178 | } | 178 | } |
179 | 179 | ||
180 | return ret_val; | 180 | return ret_val; |
@@ -318,14 +318,14 @@ s32 e1000e_read_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 *data) | |||
318 | { | 318 | { |
319 | s32 ret_val; | 319 | s32 ret_val; |
320 | 320 | ||
321 | ret_val = hw->phy.ops.acquire_phy(hw); | 321 | ret_val = hw->phy.ops.acquire(hw); |
322 | if (ret_val) | 322 | if (ret_val) |
323 | return ret_val; | 323 | return ret_val; |
324 | 324 | ||
325 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 325 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
326 | data); | 326 | data); |
327 | 327 | ||
328 | hw->phy.ops.release_phy(hw); | 328 | hw->phy.ops.release(hw); |
329 | 329 | ||
330 | return ret_val; | 330 | return ret_val; |
331 | } | 331 | } |
@@ -343,14 +343,14 @@ s32 e1000e_write_phy_reg_m88(struct e1000_hw *hw, u32 offset, u16 data) | |||
343 | { | 343 | { |
344 | s32 ret_val; | 344 | s32 ret_val; |
345 | 345 | ||
346 | ret_val = hw->phy.ops.acquire_phy(hw); | 346 | ret_val = hw->phy.ops.acquire(hw); |
347 | if (ret_val) | 347 | if (ret_val) |
348 | return ret_val; | 348 | return ret_val; |
349 | 349 | ||
350 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 350 | ret_val = e1000e_write_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
351 | data); | 351 | data); |
352 | 352 | ||
353 | hw->phy.ops.release_phy(hw); | 353 | hw->phy.ops.release(hw); |
354 | 354 | ||
355 | return ret_val; | 355 | return ret_val; |
356 | } | 356 | } |
@@ -372,10 +372,10 @@ static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, | |||
372 | s32 ret_val = 0; | 372 | s32 ret_val = 0; |
373 | 373 | ||
374 | if (!locked) { | 374 | if (!locked) { |
375 | if (!(hw->phy.ops.acquire_phy)) | 375 | if (!(hw->phy.ops.acquire)) |
376 | goto out; | 376 | goto out; |
377 | 377 | ||
378 | ret_val = hw->phy.ops.acquire_phy(hw); | 378 | ret_val = hw->phy.ops.acquire(hw); |
379 | if (ret_val) | 379 | if (ret_val) |
380 | goto out; | 380 | goto out; |
381 | } | 381 | } |
@@ -393,7 +393,7 @@ static s32 __e1000e_read_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 *data, | |||
393 | 393 | ||
394 | release: | 394 | release: |
395 | if (!locked) | 395 | if (!locked) |
396 | hw->phy.ops.release_phy(hw); | 396 | hw->phy.ops.release(hw); |
397 | out: | 397 | out: |
398 | return ret_val; | 398 | return ret_val; |
399 | } | 399 | } |
@@ -443,10 +443,10 @@ static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, | |||
443 | s32 ret_val = 0; | 443 | s32 ret_val = 0; |
444 | 444 | ||
445 | if (!locked) { | 445 | if (!locked) { |
446 | if (!(hw->phy.ops.acquire_phy)) | 446 | if (!(hw->phy.ops.acquire)) |
447 | goto out; | 447 | goto out; |
448 | 448 | ||
449 | ret_val = hw->phy.ops.acquire_phy(hw); | 449 | ret_val = hw->phy.ops.acquire(hw); |
450 | if (ret_val) | 450 | if (ret_val) |
451 | goto out; | 451 | goto out; |
452 | } | 452 | } |
@@ -464,7 +464,7 @@ static s32 __e1000e_write_phy_reg_igp(struct e1000_hw *hw, u32 offset, u16 data, | |||
464 | 464 | ||
465 | release: | 465 | release: |
466 | if (!locked) | 466 | if (!locked) |
467 | hw->phy.ops.release_phy(hw); | 467 | hw->phy.ops.release(hw); |
468 | 468 | ||
469 | out: | 469 | out: |
470 | return ret_val; | 470 | return ret_val; |
@@ -516,10 +516,10 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, | |||
516 | s32 ret_val = 0; | 516 | s32 ret_val = 0; |
517 | 517 | ||
518 | if (!locked) { | 518 | if (!locked) { |
519 | if (!(hw->phy.ops.acquire_phy)) | 519 | if (!(hw->phy.ops.acquire)) |
520 | goto out; | 520 | goto out; |
521 | 521 | ||
522 | ret_val = hw->phy.ops.acquire_phy(hw); | 522 | ret_val = hw->phy.ops.acquire(hw); |
523 | if (ret_val) | 523 | if (ret_val) |
524 | goto out; | 524 | goto out; |
525 | } | 525 | } |
@@ -534,7 +534,7 @@ static s32 __e1000_read_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 *data, | |||
534 | *data = (u16)kmrnctrlsta; | 534 | *data = (u16)kmrnctrlsta; |
535 | 535 | ||
536 | if (!locked) | 536 | if (!locked) |
537 | hw->phy.ops.release_phy(hw); | 537 | hw->phy.ops.release(hw); |
538 | 538 | ||
539 | out: | 539 | out: |
540 | return ret_val; | 540 | return ret_val; |
@@ -588,10 +588,10 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, | |||
588 | s32 ret_val = 0; | 588 | s32 ret_val = 0; |
589 | 589 | ||
590 | if (!locked) { | 590 | if (!locked) { |
591 | if (!(hw->phy.ops.acquire_phy)) | 591 | if (!(hw->phy.ops.acquire)) |
592 | goto out; | 592 | goto out; |
593 | 593 | ||
594 | ret_val = hw->phy.ops.acquire_phy(hw); | 594 | ret_val = hw->phy.ops.acquire(hw); |
595 | if (ret_val) | 595 | if (ret_val) |
596 | goto out; | 596 | goto out; |
597 | } | 597 | } |
@@ -603,7 +603,7 @@ static s32 __e1000_write_kmrn_reg(struct e1000_hw *hw, u32 offset, u16 data, | |||
603 | udelay(2); | 603 | udelay(2); |
604 | 604 | ||
605 | if (!locked) | 605 | if (!locked) |
606 | hw->phy.ops.release_phy(hw); | 606 | hw->phy.ops.release(hw); |
607 | 607 | ||
608 | out: | 608 | out: |
609 | return ret_val; | 609 | return ret_val; |
@@ -650,7 +650,7 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw) | |||
650 | u16 phy_data; | 650 | u16 phy_data; |
651 | 651 | ||
652 | /* Enable CRS on TX. This must be set for half-duplex operation. */ | 652 | /* Enable CRS on TX. This must be set for half-duplex operation. */ |
653 | ret_val = phy->ops.read_phy_reg(hw, I82577_CFG_REG, &phy_data); | 653 | ret_val = phy->ops.read_reg(hw, I82577_CFG_REG, &phy_data); |
654 | if (ret_val) | 654 | if (ret_val) |
655 | goto out; | 655 | goto out; |
656 | 656 | ||
@@ -659,16 +659,16 @@ s32 e1000_copper_link_setup_82577(struct e1000_hw *hw) | |||
659 | /* Enable downshift */ | 659 | /* Enable downshift */ |
660 | phy_data |= I82577_CFG_ENABLE_DOWNSHIFT; | 660 | phy_data |= I82577_CFG_ENABLE_DOWNSHIFT; |
661 | 661 | ||
662 | ret_val = phy->ops.write_phy_reg(hw, I82577_CFG_REG, phy_data); | 662 | ret_val = phy->ops.write_reg(hw, I82577_CFG_REG, phy_data); |
663 | if (ret_val) | 663 | if (ret_val) |
664 | goto out; | 664 | goto out; |
665 | 665 | ||
666 | /* Set number of link attempts before downshift */ | 666 | /* Set number of link attempts before downshift */ |
667 | ret_val = phy->ops.read_phy_reg(hw, I82577_CTRL_REG, &phy_data); | 667 | ret_val = phy->ops.read_reg(hw, I82577_CTRL_REG, &phy_data); |
668 | if (ret_val) | 668 | if (ret_val) |
669 | goto out; | 669 | goto out; |
670 | phy_data &= ~I82577_CTRL_DOWNSHIFT_MASK; | 670 | phy_data &= ~I82577_CTRL_DOWNSHIFT_MASK; |
671 | ret_val = phy->ops.write_phy_reg(hw, I82577_CTRL_REG, phy_data); | 671 | ret_val = phy->ops.write_reg(hw, I82577_CTRL_REG, phy_data); |
672 | 672 | ||
673 | out: | 673 | out: |
674 | return ret_val; | 674 | return ret_val; |
@@ -791,7 +791,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw) | |||
791 | } | 791 | } |
792 | 792 | ||
793 | if (phy->type == e1000_phy_82578) { | 793 | if (phy->type == e1000_phy_82578) { |
794 | ret_val = phy->ops.read_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, | 794 | ret_val = phy->ops.read_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, |
795 | &phy_data); | 795 | &phy_data); |
796 | if (ret_val) | 796 | if (ret_val) |
797 | return ret_val; | 797 | return ret_val; |
@@ -799,7 +799,7 @@ s32 e1000e_copper_link_setup_m88(struct e1000_hw *hw) | |||
799 | /* 82578 PHY - set the downshift count to 1x. */ | 799 | /* 82578 PHY - set the downshift count to 1x. */ |
800 | phy_data |= I82578_EPSCR_DOWNSHIFT_ENABLE; | 800 | phy_data |= I82578_EPSCR_DOWNSHIFT_ENABLE; |
801 | phy_data &= ~I82578_EPSCR_DOWNSHIFT_COUNTER_MASK; | 801 | phy_data &= ~I82578_EPSCR_DOWNSHIFT_COUNTER_MASK; |
802 | ret_val = phy->ops.write_phy_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, | 802 | ret_val = phy->ops.write_reg(hw, M88E1000_EXT_PHY_SPEC_CTRL, |
803 | phy_data); | 803 | phy_data); |
804 | if (ret_val) | 804 | if (ret_val) |
805 | return ret_val; | 805 | return ret_val; |
@@ -1990,7 +1990,7 @@ s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw) | |||
1990 | if (ret_val) | 1990 | if (ret_val) |
1991 | return 0; | 1991 | return 0; |
1992 | 1992 | ||
1993 | ret_val = phy->ops.acquire_phy(hw); | 1993 | ret_val = phy->ops.acquire(hw); |
1994 | if (ret_val) | 1994 | if (ret_val) |
1995 | return ret_val; | 1995 | return ret_val; |
1996 | 1996 | ||
@@ -2005,7 +2005,7 @@ s32 e1000e_phy_hw_reset_generic(struct e1000_hw *hw) | |||
2005 | 2005 | ||
2006 | udelay(150); | 2006 | udelay(150); |
2007 | 2007 | ||
2008 | phy->ops.release_phy(hw); | 2008 | phy->ops.release(hw); |
2009 | 2009 | ||
2010 | return e1000_get_phy_cfg_done(hw); | 2010 | return e1000_get_phy_cfg_done(hw); |
2011 | } | 2011 | } |
@@ -2256,7 +2256,7 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2256 | u32 page = offset >> IGP_PAGE_SHIFT; | 2256 | u32 page = offset >> IGP_PAGE_SHIFT; |
2257 | u32 page_shift = 0; | 2257 | u32 page_shift = 0; |
2258 | 2258 | ||
2259 | ret_val = hw->phy.ops.acquire_phy(hw); | 2259 | ret_val = hw->phy.ops.acquire(hw); |
2260 | if (ret_val) | 2260 | if (ret_val) |
2261 | return ret_val; | 2261 | return ret_val; |
2262 | 2262 | ||
@@ -2294,7 +2294,7 @@ s32 e1000e_write_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 data) | |||
2294 | data); | 2294 | data); |
2295 | 2295 | ||
2296 | out: | 2296 | out: |
2297 | hw->phy.ops.release_phy(hw); | 2297 | hw->phy.ops.release(hw); |
2298 | return ret_val; | 2298 | return ret_val; |
2299 | } | 2299 | } |
2300 | 2300 | ||
@@ -2315,7 +2315,7 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2315 | u32 page = offset >> IGP_PAGE_SHIFT; | 2315 | u32 page = offset >> IGP_PAGE_SHIFT; |
2316 | u32 page_shift = 0; | 2316 | u32 page_shift = 0; |
2317 | 2317 | ||
2318 | ret_val = hw->phy.ops.acquire_phy(hw); | 2318 | ret_val = hw->phy.ops.acquire(hw); |
2319 | if (ret_val) | 2319 | if (ret_val) |
2320 | return ret_val; | 2320 | return ret_val; |
2321 | 2321 | ||
@@ -2352,7 +2352,7 @@ s32 e1000e_read_phy_reg_bm(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2352 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2352 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2353 | data); | 2353 | data); |
2354 | out: | 2354 | out: |
2355 | hw->phy.ops.release_phy(hw); | 2355 | hw->phy.ops.release(hw); |
2356 | return ret_val; | 2356 | return ret_val; |
2357 | } | 2357 | } |
2358 | 2358 | ||
@@ -2371,7 +2371,7 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2371 | s32 ret_val; | 2371 | s32 ret_val; |
2372 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2372 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2373 | 2373 | ||
2374 | ret_val = hw->phy.ops.acquire_phy(hw); | 2374 | ret_val = hw->phy.ops.acquire(hw); |
2375 | if (ret_val) | 2375 | if (ret_val) |
2376 | return ret_val; | 2376 | return ret_val; |
2377 | 2377 | ||
@@ -2397,7 +2397,7 @@ s32 e1000e_read_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 *data) | |||
2397 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, | 2397 | ret_val = e1000e_read_phy_reg_mdic(hw, MAX_PHY_REG_ADDRESS & offset, |
2398 | data); | 2398 | data); |
2399 | out: | 2399 | out: |
2400 | hw->phy.ops.release_phy(hw); | 2400 | hw->phy.ops.release(hw); |
2401 | return ret_val; | 2401 | return ret_val; |
2402 | } | 2402 | } |
2403 | 2403 | ||
@@ -2415,7 +2415,7 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2415 | s32 ret_val; | 2415 | s32 ret_val; |
2416 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); | 2416 | u16 page = (u16)(offset >> IGP_PAGE_SHIFT); |
2417 | 2417 | ||
2418 | ret_val = hw->phy.ops.acquire_phy(hw); | 2418 | ret_val = hw->phy.ops.acquire(hw); |
2419 | if (ret_val) | 2419 | if (ret_val) |
2420 | return ret_val; | 2420 | return ret_val; |
2421 | 2421 | ||
@@ -2441,7 +2441,7 @@ s32 e1000e_write_phy_reg_bm2(struct e1000_hw *hw, u32 offset, u16 data) | |||
2441 | data); | 2441 | data); |
2442 | 2442 | ||
2443 | out: | 2443 | out: |
2444 | hw->phy.ops.release_phy(hw); | 2444 | hw->phy.ops.release(hw); |
2445 | return ret_val; | 2445 | return ret_val; |
2446 | } | 2446 | } |
2447 | 2447 | ||
@@ -2544,8 +2544,8 @@ out: | |||
2544 | **/ | 2544 | **/ |
2545 | s32 e1000e_commit_phy(struct e1000_hw *hw) | 2545 | s32 e1000e_commit_phy(struct e1000_hw *hw) |
2546 | { | 2546 | { |
2547 | if (hw->phy.ops.commit_phy) | 2547 | if (hw->phy.ops.commit) |
2548 | return hw->phy.ops.commit_phy(hw); | 2548 | return hw->phy.ops.commit(hw); |
2549 | 2549 | ||
2550 | return 0; | 2550 | return 0; |
2551 | } | 2551 | } |
@@ -2624,7 +2624,7 @@ static s32 __e1000_read_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 *data, | |||
2624 | bool in_slow_mode = false; | 2624 | bool in_slow_mode = false; |
2625 | 2625 | ||
2626 | if (!locked) { | 2626 | if (!locked) { |
2627 | ret_val = hw->phy.ops.acquire_phy(hw); | 2627 | ret_val = hw->phy.ops.acquire(hw); |
2628 | if (ret_val) | 2628 | if (ret_val) |
2629 | return ret_val; | 2629 | return ret_val; |
2630 | } | 2630 | } |
@@ -2681,7 +2681,7 @@ out: | |||
2681 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2681 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2682 | 2682 | ||
2683 | if (!locked) | 2683 | if (!locked) |
2684 | hw->phy.ops.release_phy(hw); | 2684 | hw->phy.ops.release(hw); |
2685 | 2685 | ||
2686 | return ret_val; | 2686 | return ret_val; |
2687 | } | 2687 | } |
@@ -2734,7 +2734,7 @@ static s32 __e1000_write_phy_reg_hv(struct e1000_hw *hw, u32 offset, u16 data, | |||
2734 | bool in_slow_mode = false; | 2734 | bool in_slow_mode = false; |
2735 | 2735 | ||
2736 | if (!locked) { | 2736 | if (!locked) { |
2737 | ret_val = hw->phy.ops.acquire_phy(hw); | 2737 | ret_val = hw->phy.ops.acquire(hw); |
2738 | if (ret_val) | 2738 | if (ret_val) |
2739 | return ret_val; | 2739 | return ret_val; |
2740 | } | 2740 | } |
@@ -2808,7 +2808,7 @@ out: | |||
2808 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); | 2808 | ret_val = e1000_set_mdio_slow_mode_hv(hw, false); |
2809 | 2809 | ||
2810 | if (!locked) | 2810 | if (!locked) |
2811 | hw->phy.ops.release_phy(hw); | 2811 | hw->phy.ops.release(hw); |
2812 | 2812 | ||
2813 | return ret_val; | 2813 | return ret_val; |
2814 | } | 2814 | } |
@@ -2923,12 +2923,12 @@ s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw) | |||
2923 | goto out; | 2923 | goto out; |
2924 | 2924 | ||
2925 | /* Do not apply workaround if in PHY loopback bit 14 set */ | 2925 | /* Do not apply workaround if in PHY loopback bit 14 set */ |
2926 | hw->phy.ops.read_phy_reg(hw, PHY_CONTROL, &data); | 2926 | hw->phy.ops.read_reg(hw, PHY_CONTROL, &data); |
2927 | if (data & PHY_CONTROL_LB) | 2927 | if (data & PHY_CONTROL_LB) |
2928 | goto out; | 2928 | goto out; |
2929 | 2929 | ||
2930 | /* check if link is up and at 1Gbps */ | 2930 | /* check if link is up and at 1Gbps */ |
2931 | ret_val = hw->phy.ops.read_phy_reg(hw, BM_CS_STATUS, &data); | 2931 | ret_val = hw->phy.ops.read_reg(hw, BM_CS_STATUS, &data); |
2932 | if (ret_val) | 2932 | if (ret_val) |
2933 | goto out; | 2933 | goto out; |
2934 | 2934 | ||
@@ -2944,13 +2944,13 @@ s32 e1000_link_stall_workaround_hv(struct e1000_hw *hw) | |||
2944 | mdelay(200); | 2944 | mdelay(200); |
2945 | 2945 | ||
2946 | /* flush the packets in the fifo buffer */ | 2946 | /* flush the packets in the fifo buffer */ |
2947 | ret_val = hw->phy.ops.write_phy_reg(hw, HV_MUX_DATA_CTRL, | 2947 | ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL, |
2948 | HV_MUX_DATA_CTRL_GEN_TO_MAC | | 2948 | HV_MUX_DATA_CTRL_GEN_TO_MAC | |
2949 | HV_MUX_DATA_CTRL_FORCE_SPEED); | 2949 | HV_MUX_DATA_CTRL_FORCE_SPEED); |
2950 | if (ret_val) | 2950 | if (ret_val) |
2951 | goto out; | 2951 | goto out; |
2952 | 2952 | ||
2953 | ret_val = hw->phy.ops.write_phy_reg(hw, HV_MUX_DATA_CTRL, | 2953 | ret_val = hw->phy.ops.write_reg(hw, HV_MUX_DATA_CTRL, |
2954 | HV_MUX_DATA_CTRL_GEN_TO_MAC); | 2954 | HV_MUX_DATA_CTRL_GEN_TO_MAC); |
2955 | 2955 | ||
2956 | out: | 2956 | out: |
@@ -2971,7 +2971,7 @@ s32 e1000_check_polarity_82577(struct e1000_hw *hw) | |||
2971 | s32 ret_val; | 2971 | s32 ret_val; |
2972 | u16 data; | 2972 | u16 data; |
2973 | 2973 | ||
2974 | ret_val = phy->ops.read_phy_reg(hw, I82577_PHY_STATUS_2, &data); | 2974 | ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data); |
2975 | 2975 | ||
2976 | if (!ret_val) | 2976 | if (!ret_val) |
2977 | phy->cable_polarity = (data & I82577_PHY_STATUS2_REV_POLARITY) | 2977 | phy->cable_polarity = (data & I82577_PHY_STATUS2_REV_POLARITY) |
@@ -2996,13 +2996,13 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw) | |||
2996 | u16 phy_data; | 2996 | u16 phy_data; |
2997 | bool link; | 2997 | bool link; |
2998 | 2998 | ||
2999 | ret_val = phy->ops.read_phy_reg(hw, PHY_CONTROL, &phy_data); | 2999 | ret_val = phy->ops.read_reg(hw, PHY_CONTROL, &phy_data); |
3000 | if (ret_val) | 3000 | if (ret_val) |
3001 | goto out; | 3001 | goto out; |
3002 | 3002 | ||
3003 | e1000e_phy_force_speed_duplex_setup(hw, &phy_data); | 3003 | e1000e_phy_force_speed_duplex_setup(hw, &phy_data); |
3004 | 3004 | ||
3005 | ret_val = phy->ops.write_phy_reg(hw, PHY_CONTROL, phy_data); | 3005 | ret_val = phy->ops.write_reg(hw, PHY_CONTROL, phy_data); |
3006 | if (ret_val) | 3006 | if (ret_val) |
3007 | goto out; | 3007 | goto out; |
3008 | 3008 | ||
@@ -3010,14 +3010,14 @@ s32 e1000_phy_force_speed_duplex_82577(struct e1000_hw *hw) | |||
3010 | * Clear Auto-Crossover to force MDI manually. 82577 requires MDI | 3010 | * Clear Auto-Crossover to force MDI manually. 82577 requires MDI |
3011 | * forced whenever speed and duplex are forced. | 3011 | * forced whenever speed and duplex are forced. |
3012 | */ | 3012 | */ |
3013 | ret_val = phy->ops.read_phy_reg(hw, I82577_PHY_CTRL_2, &phy_data); | 3013 | ret_val = phy->ops.read_reg(hw, I82577_PHY_CTRL_2, &phy_data); |
3014 | if (ret_val) | 3014 | if (ret_val) |
3015 | goto out; | 3015 | goto out; |
3016 | 3016 | ||
3017 | phy_data &= ~I82577_PHY_CTRL2_AUTO_MDIX; | 3017 | phy_data &= ~I82577_PHY_CTRL2_AUTO_MDIX; |
3018 | phy_data &= ~I82577_PHY_CTRL2_FORCE_MDI_MDIX; | 3018 | phy_data &= ~I82577_PHY_CTRL2_FORCE_MDI_MDIX; |
3019 | 3019 | ||
3020 | ret_val = phy->ops.write_phy_reg(hw, I82577_PHY_CTRL_2, phy_data); | 3020 | ret_val = phy->ops.write_reg(hw, I82577_PHY_CTRL_2, phy_data); |
3021 | if (ret_val) | 3021 | if (ret_val) |
3022 | goto out; | 3022 | goto out; |
3023 | 3023 | ||
@@ -3083,7 +3083,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw) | |||
3083 | if (ret_val) | 3083 | if (ret_val) |
3084 | goto out; | 3084 | goto out; |
3085 | 3085 | ||
3086 | ret_val = phy->ops.read_phy_reg(hw, I82577_PHY_STATUS_2, &data); | 3086 | ret_val = phy->ops.read_reg(hw, I82577_PHY_STATUS_2, &data); |
3087 | if (ret_val) | 3087 | if (ret_val) |
3088 | goto out; | 3088 | goto out; |
3089 | 3089 | ||
@@ -3095,7 +3095,7 @@ s32 e1000_get_phy_info_82577(struct e1000_hw *hw) | |||
3095 | if (ret_val) | 3095 | if (ret_val) |
3096 | goto out; | 3096 | goto out; |
3097 | 3097 | ||
3098 | ret_val = phy->ops.read_phy_reg(hw, PHY_1000T_STATUS, &data); | 3098 | ret_val = phy->ops.read_reg(hw, PHY_1000T_STATUS, &data); |
3099 | if (ret_val) | 3099 | if (ret_val) |
3100 | goto out; | 3100 | goto out; |
3101 | 3101 | ||
@@ -3129,7 +3129,7 @@ s32 e1000_get_cable_length_82577(struct e1000_hw *hw) | |||
3129 | s32 ret_val; | 3129 | s32 ret_val; |
3130 | u16 phy_data, length; | 3130 | u16 phy_data, length; |
3131 | 3131 | ||
3132 | ret_val = phy->ops.read_phy_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data); | 3132 | ret_val = phy->ops.read_reg(hw, I82577_PHY_DIAG_STATUS, &phy_data); |
3133 | if (ret_val) | 3133 | if (ret_val) |
3134 | goto out; | 3134 | goto out; |
3135 | 3135 | ||