diff options
author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2008-04-02 16:48:13 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-04-16 20:41:36 -0400 |
commit | e9ec2c0f4bfbe0632b22a2c0b74d5e1e96aeab66 (patch) | |
tree | e65a632498dad6f7eaf77f1d2b00aa0c237d60a5 /drivers/net/e1000e/netdev.c | |
parent | 8d7c294cae6fd1474d88267810d1965f60a903af (diff) |
e1000e: Make arrays out of these Rx/Tx registers
With multiple queues coming into the code these base control
registers need to be made into arrays.
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/e1000e/netdev.c')
-rw-r--r-- | drivers/net/e1000e/netdev.c | 16 |
1 files changed, 8 insertions, 8 deletions
diff --git a/drivers/net/e1000e/netdev.c b/drivers/net/e1000e/netdev.c index d70bde03619e..b8bb4fedb2ba 100644 --- a/drivers/net/e1000e/netdev.c +++ b/drivers/net/e1000e/netdev.c | |||
@@ -1639,24 +1639,24 @@ static void e1000_configure_tx(struct e1000_adapter *adapter) | |||
1639 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); | 1639 | (E1000_COLLISION_THRESHOLD << E1000_CT_SHIFT); |
1640 | 1640 | ||
1641 | if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { | 1641 | if (adapter->flags & FLAG_TARC_SPEED_MODE_BIT) { |
1642 | tarc = er32(TARC0); | 1642 | tarc = er32(TARC(0)); |
1643 | /* | 1643 | /* |
1644 | * set the speed mode bit, we'll clear it if we're not at | 1644 | * set the speed mode bit, we'll clear it if we're not at |
1645 | * gigabit link later | 1645 | * gigabit link later |
1646 | */ | 1646 | */ |
1647 | #define SPEED_MODE_BIT (1 << 21) | 1647 | #define SPEED_MODE_BIT (1 << 21) |
1648 | tarc |= SPEED_MODE_BIT; | 1648 | tarc |= SPEED_MODE_BIT; |
1649 | ew32(TARC0, tarc); | 1649 | ew32(TARC(0), tarc); |
1650 | } | 1650 | } |
1651 | 1651 | ||
1652 | /* errata: program both queues to unweighted RR */ | 1652 | /* errata: program both queues to unweighted RR */ |
1653 | if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { | 1653 | if (adapter->flags & FLAG_TARC_SET_BIT_ZERO) { |
1654 | tarc = er32(TARC0); | 1654 | tarc = er32(TARC(0)); |
1655 | tarc |= 1; | 1655 | tarc |= 1; |
1656 | ew32(TARC0, tarc); | 1656 | ew32(TARC(0), tarc); |
1657 | tarc = er32(TARC1); | 1657 | tarc = er32(TARC(1)); |
1658 | tarc |= 1; | 1658 | tarc |= 1; |
1659 | ew32(TARC1, tarc); | 1659 | ew32(TARC(1), tarc); |
1660 | } | 1660 | } |
1661 | 1661 | ||
1662 | e1000e_config_collision_dist(hw); | 1662 | e1000e_config_collision_dist(hw); |
@@ -2775,9 +2775,9 @@ static void e1000_watchdog_task(struct work_struct *work) | |||
2775 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && | 2775 | if ((adapter->flags & FLAG_TARC_SPEED_MODE_BIT) && |
2776 | !txb2b) { | 2776 | !txb2b) { |
2777 | u32 tarc0; | 2777 | u32 tarc0; |
2778 | tarc0 = er32(TARC0); | 2778 | tarc0 = er32(TARC(0)); |
2779 | tarc0 &= ~SPEED_MODE_BIT; | 2779 | tarc0 &= ~SPEED_MODE_BIT; |
2780 | ew32(TARC0, tarc0); | 2780 | ew32(TARC(0), tarc0); |
2781 | } | 2781 | } |
2782 | 2782 | ||
2783 | /* | 2783 | /* |