diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2008-03-28 12:15:03 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2008-03-28 22:14:56 -0400 |
commit | ad68076e07fa01bd0c98278a959d0fd2bb26f1ac (patch) | |
tree | f0b664ecdb38478f9b995aff10dcb39a09221fb6 /drivers/net/e1000e/lib.c | |
parent | 652f093fdf14c7ca1e13c052da429ae385e4dc21 (diff) |
e1000e: reformat comment blocks, cosmetic changes only
Adjusting the comment blocks here to be code-style compliant. no
code changes.
Changed some copyright dates to 2008.
Indentation fixes.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/e1000e/lib.c')
-rw-r--r-- | drivers/net/e1000e/lib.c | 213 |
1 files changed, 134 insertions, 79 deletions
diff --git a/drivers/net/e1000e/lib.c b/drivers/net/e1000e/lib.c index 073934c7f73a..b7eaff0a20ba 100644 --- a/drivers/net/e1000e/lib.c +++ b/drivers/net/e1000e/lib.c | |||
@@ -1,7 +1,7 @@ | |||
1 | /******************************************************************************* | 1 | /******************************************************************************* |
2 | 2 | ||
3 | Intel PRO/1000 Linux driver | 3 | Intel PRO/1000 Linux driver |
4 | Copyright(c) 1999 - 2007 Intel Corporation. | 4 | Copyright(c) 1999 - 2008 Intel Corporation. |
5 | 5 | ||
6 | This program is free software; you can redistribute it and/or modify it | 6 | This program is free software; you can redistribute it and/or modify it |
7 | under the terms and conditions of the GNU General Public License, | 7 | under the terms and conditions of the GNU General Public License, |
@@ -43,8 +43,8 @@ enum e1000_mng_mode { | |||
43 | 43 | ||
44 | #define E1000_FACTPS_MNGCG 0x20000000 | 44 | #define E1000_FACTPS_MNGCG 0x20000000 |
45 | 45 | ||
46 | #define E1000_IAMT_SIGNATURE 0x544D4149 /* Intel(R) Active Management | 46 | /* Intel(R) Active Management Technology signature */ |
47 | * Technology signature */ | 47 | #define E1000_IAMT_SIGNATURE 0x544D4149 |
48 | 48 | ||
49 | /** | 49 | /** |
50 | * e1000e_get_bus_info_pcie - Get PCIe bus information | 50 | * e1000e_get_bus_info_pcie - Get PCIe bus information |
@@ -142,7 +142,8 @@ void e1000e_rar_set(struct e1000_hw *hw, u8 *addr, u32 index) | |||
142 | { | 142 | { |
143 | u32 rar_low, rar_high; | 143 | u32 rar_low, rar_high; |
144 | 144 | ||
145 | /* HW expects these in little endian so we reverse the byte order | 145 | /* |
146 | * HW expects these in little endian so we reverse the byte order | ||
146 | * from network order (big endian) to little endian | 147 | * from network order (big endian) to little endian |
147 | */ | 148 | */ |
148 | rar_low = ((u32) addr[0] | | 149 | rar_low = ((u32) addr[0] | |
@@ -171,7 +172,8 @@ static void e1000_mta_set(struct e1000_hw *hw, u32 hash_value) | |||
171 | { | 172 | { |
172 | u32 hash_bit, hash_reg, mta; | 173 | u32 hash_bit, hash_reg, mta; |
173 | 174 | ||
174 | /* The MTA is a register array of 32-bit registers. It is | 175 | /* |
176 | * The MTA is a register array of 32-bit registers. It is | ||
175 | * treated like an array of (32*mta_reg_count) bits. We want to | 177 | * treated like an array of (32*mta_reg_count) bits. We want to |
176 | * set bit BitArray[hash_value]. So we figure out what register | 178 | * set bit BitArray[hash_value]. So we figure out what register |
177 | * the bit is in, read it, OR in the new bit, then write | 179 | * the bit is in, read it, OR in the new bit, then write |
@@ -208,12 +210,15 @@ static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) | |||
208 | /* Register count multiplied by bits per register */ | 210 | /* Register count multiplied by bits per register */ |
209 | hash_mask = (hw->mac.mta_reg_count * 32) - 1; | 211 | hash_mask = (hw->mac.mta_reg_count * 32) - 1; |
210 | 212 | ||
211 | /* For a mc_filter_type of 0, bit_shift is the number of left-shifts | 213 | /* |
212 | * where 0xFF would still fall within the hash mask. */ | 214 | * For a mc_filter_type of 0, bit_shift is the number of left-shifts |
215 | * where 0xFF would still fall within the hash mask. | ||
216 | */ | ||
213 | while (hash_mask >> bit_shift != 0xFF) | 217 | while (hash_mask >> bit_shift != 0xFF) |
214 | bit_shift++; | 218 | bit_shift++; |
215 | 219 | ||
216 | /* The portion of the address that is used for the hash table | 220 | /* |
221 | * The portion of the address that is used for the hash table | ||
217 | * is determined by the mc_filter_type setting. | 222 | * is determined by the mc_filter_type setting. |
218 | * The algorithm is such that there is a total of 8 bits of shifting. | 223 | * The algorithm is such that there is a total of 8 bits of shifting. |
219 | * The bit_shift for a mc_filter_type of 0 represents the number of | 224 | * The bit_shift for a mc_filter_type of 0 represents the number of |
@@ -224,8 +229,8 @@ static u32 e1000_hash_mc_addr(struct e1000_hw *hw, u8 *mc_addr) | |||
224 | * cases are a variation of this algorithm...essentially raising the | 229 | * cases are a variation of this algorithm...essentially raising the |
225 | * number of bits to shift mc_addr[5] left, while still keeping the | 230 | * number of bits to shift mc_addr[5] left, while still keeping the |
226 | * 8-bit shifting total. | 231 | * 8-bit shifting total. |
227 | */ | 232 | * |
228 | /* For example, given the following Destination MAC Address and an | 233 | * For example, given the following Destination MAC Address and an |
229 | * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask), | 234 | * mta register count of 128 (thus a 4096-bit vector and 0xFFF mask), |
230 | * we can see that the bit_shift for case 0 is 4. These are the hash | 235 | * we can see that the bit_shift for case 0 is 4. These are the hash |
231 | * values resulting from each mc_filter_type... | 236 | * values resulting from each mc_filter_type... |
@@ -279,7 +284,8 @@ void e1000e_mc_addr_list_update_generic(struct e1000_hw *hw, | |||
279 | u32 hash_value; | 284 | u32 hash_value; |
280 | u32 i; | 285 | u32 i; |
281 | 286 | ||
282 | /* Load the first set of multicast addresses into the exact | 287 | /* |
288 | * Load the first set of multicast addresses into the exact | ||
283 | * filters (RAR). If there are not enough to fill the RAR | 289 | * filters (RAR). If there are not enough to fill the RAR |
284 | * array, clear the filters. | 290 | * array, clear the filters. |
285 | */ | 291 | */ |
@@ -375,7 +381,8 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw) | |||
375 | s32 ret_val; | 381 | s32 ret_val; |
376 | bool link; | 382 | bool link; |
377 | 383 | ||
378 | /* We only want to go out to the PHY registers to see if Auto-Neg | 384 | /* |
385 | * We only want to go out to the PHY registers to see if Auto-Neg | ||
379 | * has completed and/or if our link status has changed. The | 386 | * has completed and/or if our link status has changed. The |
380 | * get_link_status flag is set upon receiving a Link Status | 387 | * get_link_status flag is set upon receiving a Link Status |
381 | * Change or Rx Sequence Error interrupt. | 388 | * Change or Rx Sequence Error interrupt. |
@@ -383,7 +390,8 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw) | |||
383 | if (!mac->get_link_status) | 390 | if (!mac->get_link_status) |
384 | return 0; | 391 | return 0; |
385 | 392 | ||
386 | /* First we want to see if the MII Status Register reports | 393 | /* |
394 | * First we want to see if the MII Status Register reports | ||
387 | * link. If so, then we want to get the current speed/duplex | 395 | * link. If so, then we want to get the current speed/duplex |
388 | * of the PHY. | 396 | * of the PHY. |
389 | */ | 397 | */ |
@@ -396,11 +404,14 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw) | |||
396 | 404 | ||
397 | mac->get_link_status = 0; | 405 | mac->get_link_status = 0; |
398 | 406 | ||
399 | /* Check if there was DownShift, must be checked | 407 | /* |
400 | * immediately after link-up */ | 408 | * Check if there was DownShift, must be checked |
409 | * immediately after link-up | ||
410 | */ | ||
401 | e1000e_check_downshift(hw); | 411 | e1000e_check_downshift(hw); |
402 | 412 | ||
403 | /* If we are forcing speed/duplex, then we simply return since | 413 | /* |
414 | * If we are forcing speed/duplex, then we simply return since | ||
404 | * we have already determined whether we have link or not. | 415 | * we have already determined whether we have link or not. |
405 | */ | 416 | */ |
406 | if (!mac->autoneg) { | 417 | if (!mac->autoneg) { |
@@ -408,13 +419,15 @@ s32 e1000e_check_for_copper_link(struct e1000_hw *hw) | |||
408 | return ret_val; | 419 | return ret_val; |
409 | } | 420 | } |
410 | 421 | ||
411 | /* Auto-Neg is enabled. Auto Speed Detection takes care | 422 | /* |
423 | * Auto-Neg is enabled. Auto Speed Detection takes care | ||
412 | * of MAC speed/duplex configuration. So we only need to | 424 | * of MAC speed/duplex configuration. So we only need to |
413 | * configure Collision Distance in the MAC. | 425 | * configure Collision Distance in the MAC. |
414 | */ | 426 | */ |
415 | e1000e_config_collision_dist(hw); | 427 | e1000e_config_collision_dist(hw); |
416 | 428 | ||
417 | /* Configure Flow Control now that Auto-Neg has completed. | 429 | /* |
430 | * Configure Flow Control now that Auto-Neg has completed. | ||
418 | * First, we need to restore the desired flow control | 431 | * First, we need to restore the desired flow control |
419 | * settings because we may have had to re-autoneg with a | 432 | * settings because we may have had to re-autoneg with a |
420 | * different link partner. | 433 | * different link partner. |
@@ -446,7 +459,8 @@ s32 e1000e_check_for_fiber_link(struct e1000_hw *hw) | |||
446 | status = er32(STATUS); | 459 | status = er32(STATUS); |
447 | rxcw = er32(RXCW); | 460 | rxcw = er32(RXCW); |
448 | 461 | ||
449 | /* If we don't have link (auto-negotiation failed or link partner | 462 | /* |
463 | * If we don't have link (auto-negotiation failed or link partner | ||
450 | * cannot auto-negotiate), the cable is plugged in (we have signal), | 464 | * cannot auto-negotiate), the cable is plugged in (we have signal), |
451 | * and our link partner is not trying to auto-negotiate with us (we | 465 | * and our link partner is not trying to auto-negotiate with us (we |
452 | * are receiving idles or data), we need to force link up. We also | 466 | * are receiving idles or data), we need to force link up. We also |
@@ -477,7 +491,8 @@ s32 e1000e_check_for_fiber_link(struct e1000_hw *hw) | |||
477 | return ret_val; | 491 | return ret_val; |
478 | } | 492 | } |
479 | } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { | 493 | } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { |
480 | /* If we are forcing link and we are receiving /C/ ordered | 494 | /* |
495 | * If we are forcing link and we are receiving /C/ ordered | ||
481 | * sets, re-enable auto-negotiation in the TXCW register | 496 | * sets, re-enable auto-negotiation in the TXCW register |
482 | * and disable forced link in the Device Control register | 497 | * and disable forced link in the Device Control register |
483 | * in an attempt to auto-negotiate with our link partner. | 498 | * in an attempt to auto-negotiate with our link partner. |
@@ -511,7 +526,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) | |||
511 | status = er32(STATUS); | 526 | status = er32(STATUS); |
512 | rxcw = er32(RXCW); | 527 | rxcw = er32(RXCW); |
513 | 528 | ||
514 | /* If we don't have link (auto-negotiation failed or link partner | 529 | /* |
530 | * If we don't have link (auto-negotiation failed or link partner | ||
515 | * cannot auto-negotiate), and our link partner is not trying to | 531 | * cannot auto-negotiate), and our link partner is not trying to |
516 | * auto-negotiate with us (we are receiving idles or data), | 532 | * auto-negotiate with us (we are receiving idles or data), |
517 | * we need to force link up. We also need to give auto-negotiation | 533 | * we need to force link up. We also need to give auto-negotiation |
@@ -540,7 +556,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) | |||
540 | return ret_val; | 556 | return ret_val; |
541 | } | 557 | } |
542 | } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { | 558 | } else if ((ctrl & E1000_CTRL_SLU) && (rxcw & E1000_RXCW_C)) { |
543 | /* If we are forcing link and we are receiving /C/ ordered | 559 | /* |
560 | * If we are forcing link and we are receiving /C/ ordered | ||
544 | * sets, re-enable auto-negotiation in the TXCW register | 561 | * sets, re-enable auto-negotiation in the TXCW register |
545 | * and disable forced link in the Device Control register | 562 | * and disable forced link in the Device Control register |
546 | * in an attempt to auto-negotiate with our link partner. | 563 | * in an attempt to auto-negotiate with our link partner. |
@@ -551,7 +568,8 @@ s32 e1000e_check_for_serdes_link(struct e1000_hw *hw) | |||
551 | 568 | ||
552 | mac->serdes_has_link = 1; | 569 | mac->serdes_has_link = 1; |
553 | } else if (!(E1000_TXCW_ANE & er32(TXCW))) { | 570 | } else if (!(E1000_TXCW_ANE & er32(TXCW))) { |
554 | /* If we force link for non-auto-negotiation switch, check | 571 | /* |
572 | * If we force link for non-auto-negotiation switch, check | ||
555 | * link status based on MAC synchronization for internal | 573 | * link status based on MAC synchronization for internal |
556 | * serdes media type. | 574 | * serdes media type. |
557 | */ | 575 | */ |
@@ -589,7 +607,8 @@ static s32 e1000_set_default_fc_generic(struct e1000_hw *hw) | |||
589 | s32 ret_val; | 607 | s32 ret_val; |
590 | u16 nvm_data; | 608 | u16 nvm_data; |
591 | 609 | ||
592 | /* Read and store word 0x0F of the EEPROM. This word contains bits | 610 | /* |
611 | * Read and store word 0x0F of the EEPROM. This word contains bits | ||
593 | * that determine the hardware's default PAUSE (flow control) mode, | 612 | * that determine the hardware's default PAUSE (flow control) mode, |
594 | * a bit that determines whether the HW defaults to enabling or | 613 | * a bit that determines whether the HW defaults to enabling or |
595 | * disabling auto-negotiation, and the direction of the | 614 | * disabling auto-negotiation, and the direction of the |
@@ -630,7 +649,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
630 | struct e1000_mac_info *mac = &hw->mac; | 649 | struct e1000_mac_info *mac = &hw->mac; |
631 | s32 ret_val; | 650 | s32 ret_val; |
632 | 651 | ||
633 | /* In the case of the phy reset being blocked, we already have a link. | 652 | /* |
653 | * In the case of the phy reset being blocked, we already have a link. | ||
634 | * We do not need to set it up again. | 654 | * We do not need to set it up again. |
635 | */ | 655 | */ |
636 | if (e1000_check_reset_block(hw)) | 656 | if (e1000_check_reset_block(hw)) |
@@ -646,7 +666,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
646 | return ret_val; | 666 | return ret_val; |
647 | } | 667 | } |
648 | 668 | ||
649 | /* We want to save off the original Flow Control configuration just | 669 | /* |
670 | * We want to save off the original Flow Control configuration just | ||
650 | * in case we get disconnected and then reconnected into a different | 671 | * in case we get disconnected and then reconnected into a different |
651 | * hub or switch with different Flow Control capabilities. | 672 | * hub or switch with different Flow Control capabilities. |
652 | */ | 673 | */ |
@@ -659,7 +680,8 @@ s32 e1000e_setup_link(struct e1000_hw *hw) | |||
659 | if (ret_val) | 680 | if (ret_val) |
660 | return ret_val; | 681 | return ret_val; |
661 | 682 | ||
662 | /* Initialize the flow control address, type, and PAUSE timer | 683 | /* |
684 | * Initialize the flow control address, type, and PAUSE timer | ||
663 | * registers to their default values. This is done even if flow | 685 | * registers to their default values. This is done even if flow |
664 | * control is disabled, because it does not hurt anything to | 686 | * control is disabled, because it does not hurt anything to |
665 | * initialize these registers. | 687 | * initialize these registers. |
@@ -686,7 +708,8 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) | |||
686 | struct e1000_mac_info *mac = &hw->mac; | 708 | struct e1000_mac_info *mac = &hw->mac; |
687 | u32 txcw; | 709 | u32 txcw; |
688 | 710 | ||
689 | /* Check for a software override of the flow control settings, and | 711 | /* |
712 | * Check for a software override of the flow control settings, and | ||
690 | * setup the device accordingly. If auto-negotiation is enabled, then | 713 | * setup the device accordingly. If auto-negotiation is enabled, then |
691 | * software will have to set the "PAUSE" bits to the correct value in | 714 | * software will have to set the "PAUSE" bits to the correct value in |
692 | * the Transmit Config Word Register (TXCW) and re-start auto- | 715 | * the Transmit Config Word Register (TXCW) and re-start auto- |
@@ -700,7 +723,7 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) | |||
700 | * but not send pause frames). | 723 | * but not send pause frames). |
701 | * 2: Tx flow control is enabled (we can send pause frames but we | 724 | * 2: Tx flow control is enabled (we can send pause frames but we |
702 | * do not support receiving pause frames). | 725 | * do not support receiving pause frames). |
703 | * 3: Both Rx and TX flow control (symmetric) are enabled. | 726 | * 3: Both Rx and Tx flow control (symmetric) are enabled. |
704 | */ | 727 | */ |
705 | switch (mac->fc) { | 728 | switch (mac->fc) { |
706 | case e1000_fc_none: | 729 | case e1000_fc_none: |
@@ -708,23 +731,26 @@ static s32 e1000_commit_fc_settings_generic(struct e1000_hw *hw) | |||
708 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); | 731 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); |
709 | break; | 732 | break; |
710 | case e1000_fc_rx_pause: | 733 | case e1000_fc_rx_pause: |
711 | /* RX Flow control is enabled and TX Flow control is disabled | 734 | /* |
735 | * Rx Flow control is enabled and Tx Flow control is disabled | ||
712 | * by a software over-ride. Since there really isn't a way to | 736 | * by a software over-ride. Since there really isn't a way to |
713 | * advertise that we are capable of RX Pause ONLY, we will | 737 | * advertise that we are capable of Rx Pause ONLY, we will |
714 | * advertise that we support both symmetric and asymmetric RX | 738 | * advertise that we support both symmetric and asymmetric Rx |
715 | * PAUSE. Later, we will disable the adapter's ability to send | 739 | * PAUSE. Later, we will disable the adapter's ability to send |
716 | * PAUSE frames. | 740 | * PAUSE frames. |
717 | */ | 741 | */ |
718 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); | 742 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); |
719 | break; | 743 | break; |
720 | case e1000_fc_tx_pause: | 744 | case e1000_fc_tx_pause: |
721 | /* TX Flow control is enabled, and RX Flow control is disabled, | 745 | /* |
746 | * Tx Flow control is enabled, and Rx Flow control is disabled, | ||
722 | * by a software over-ride. | 747 | * by a software over-ride. |
723 | */ | 748 | */ |
724 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); | 749 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); |
725 | break; | 750 | break; |
726 | case e1000_fc_full: | 751 | case e1000_fc_full: |
727 | /* Flow control (both RX and TX) is enabled by a software | 752 | /* |
753 | * Flow control (both Rx and Tx) is enabled by a software | ||
728 | * over-ride. | 754 | * over-ride. |
729 | */ | 755 | */ |
730 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); | 756 | txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); |
@@ -754,7 +780,8 @@ static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) | |||
754 | u32 i, status; | 780 | u32 i, status; |
755 | s32 ret_val; | 781 | s32 ret_val; |
756 | 782 | ||
757 | /* If we have a signal (the cable is plugged in, or assumed true for | 783 | /* |
784 | * If we have a signal (the cable is plugged in, or assumed true for | ||
758 | * serdes media) then poll for a "Link-Up" indication in the Device | 785 | * serdes media) then poll for a "Link-Up" indication in the Device |
759 | * Status Register. Time-out if a link isn't seen in 500 milliseconds | 786 | * Status Register. Time-out if a link isn't seen in 500 milliseconds |
760 | * seconds (Auto-negotiation should complete in less than 500 | 787 | * seconds (Auto-negotiation should complete in less than 500 |
@@ -769,7 +796,8 @@ static s32 e1000_poll_fiber_serdes_link_generic(struct e1000_hw *hw) | |||
769 | if (i == FIBER_LINK_UP_LIMIT) { | 796 | if (i == FIBER_LINK_UP_LIMIT) { |
770 | hw_dbg(hw, "Never got a valid link from auto-neg!!!\n"); | 797 | hw_dbg(hw, "Never got a valid link from auto-neg!!!\n"); |
771 | mac->autoneg_failed = 1; | 798 | mac->autoneg_failed = 1; |
772 | /* AutoNeg failed to achieve a link, so we'll call | 799 | /* |
800 | * AutoNeg failed to achieve a link, so we'll call | ||
773 | * mac->check_for_link. This routine will force the | 801 | * mac->check_for_link. This routine will force the |
774 | * link up if we detect a signal. This will allow us to | 802 | * link up if we detect a signal. This will allow us to |
775 | * communicate with non-autonegotiating link partners. | 803 | * communicate with non-autonegotiating link partners. |
@@ -811,7 +839,8 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
811 | if (ret_val) | 839 | if (ret_val) |
812 | return ret_val; | 840 | return ret_val; |
813 | 841 | ||
814 | /* Since auto-negotiation is enabled, take the link out of reset (the | 842 | /* |
843 | * Since auto-negotiation is enabled, take the link out of reset (the | ||
815 | * link will be in reset, because we previously reset the chip). This | 844 | * link will be in reset, because we previously reset the chip). This |
816 | * will restart auto-negotiation. If auto-negotiation is successful | 845 | * will restart auto-negotiation. If auto-negotiation is successful |
817 | * then the link-up status bit will be set and the flow control enable | 846 | * then the link-up status bit will be set and the flow control enable |
@@ -823,7 +852,8 @@ s32 e1000e_setup_fiber_serdes_link(struct e1000_hw *hw) | |||
823 | e1e_flush(); | 852 | e1e_flush(); |
824 | msleep(1); | 853 | msleep(1); |
825 | 854 | ||
826 | /* For these adapters, the SW defineable pin 1 is set when the optics | 855 | /* |
856 | * For these adapters, the SW definable pin 1 is set when the optics | ||
827 | * detect a signal. If we have a signal, then poll for a "Link-Up" | 857 | * detect a signal. If we have a signal, then poll for a "Link-Up" |
828 | * indication. | 858 | * indication. |
829 | */ | 859 | */ |
@@ -864,21 +894,23 @@ void e1000e_config_collision_dist(struct e1000_hw *hw) | |||
864 | * | 894 | * |
865 | * Sets the flow control high/low threshold (watermark) registers. If | 895 | * Sets the flow control high/low threshold (watermark) registers. If |
866 | * flow control XON frame transmission is enabled, then set XON frame | 896 | * flow control XON frame transmission is enabled, then set XON frame |
867 | * tansmission as well. | 897 | * transmission as well. |
868 | **/ | 898 | **/ |
869 | s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) | 899 | s32 e1000e_set_fc_watermarks(struct e1000_hw *hw) |
870 | { | 900 | { |
871 | struct e1000_mac_info *mac = &hw->mac; | 901 | struct e1000_mac_info *mac = &hw->mac; |
872 | u32 fcrtl = 0, fcrth = 0; | 902 | u32 fcrtl = 0, fcrth = 0; |
873 | 903 | ||
874 | /* Set the flow control receive threshold registers. Normally, | 904 | /* |
905 | * Set the flow control receive threshold registers. Normally, | ||
875 | * these registers will be set to a default threshold that may be | 906 | * these registers will be set to a default threshold that may be |
876 | * adjusted later by the driver's runtime code. However, if the | 907 | * adjusted later by the driver's runtime code. However, if the |
877 | * ability to transmit pause frames is not enabled, then these | 908 | * ability to transmit pause frames is not enabled, then these |
878 | * registers will be set to 0. | 909 | * registers will be set to 0. |
879 | */ | 910 | */ |
880 | if (mac->fc & e1000_fc_tx_pause) { | 911 | if (mac->fc & e1000_fc_tx_pause) { |
881 | /* We need to set up the Receive Threshold high and low water | 912 | /* |
913 | * We need to set up the Receive Threshold high and low water | ||
882 | * marks as well as (optionally) enabling the transmission of | 914 | * marks as well as (optionally) enabling the transmission of |
883 | * XON frames. | 915 | * XON frames. |
884 | */ | 916 | */ |
@@ -909,7 +941,8 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw) | |||
909 | 941 | ||
910 | ctrl = er32(CTRL); | 942 | ctrl = er32(CTRL); |
911 | 943 | ||
912 | /* Because we didn't get link via the internal auto-negotiation | 944 | /* |
945 | * Because we didn't get link via the internal auto-negotiation | ||
913 | * mechanism (we either forced link or we got link via PHY | 946 | * mechanism (we either forced link or we got link via PHY |
914 | * auto-neg), we have to manually enable/disable transmit an | 947 | * auto-neg), we have to manually enable/disable transmit an |
915 | * receive flow control. | 948 | * receive flow control. |
@@ -923,7 +956,7 @@ s32 e1000e_force_mac_fc(struct e1000_hw *hw) | |||
923 | * frames but not send pause frames). | 956 | * frames but not send pause frames). |
924 | * 2: Tx flow control is enabled (we can send pause frames | 957 | * 2: Tx flow control is enabled (we can send pause frames |
925 | * frames but we do not receive pause frames). | 958 | * frames but we do not receive pause frames). |
926 | * 3: Both Rx and TX flow control (symmetric) is enabled. | 959 | * 3: Both Rx and Tx flow control (symmetric) is enabled. |
927 | * other: No other values should be possible at this point. | 960 | * other: No other values should be possible at this point. |
928 | */ | 961 | */ |
929 | hw_dbg(hw, "mac->fc = %u\n", mac->fc); | 962 | hw_dbg(hw, "mac->fc = %u\n", mac->fc); |
@@ -970,7 +1003,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
970 | u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg; | 1003 | u16 mii_status_reg, mii_nway_adv_reg, mii_nway_lp_ability_reg; |
971 | u16 speed, duplex; | 1004 | u16 speed, duplex; |
972 | 1005 | ||
973 | /* Check for the case where we have fiber media and auto-neg failed | 1006 | /* |
1007 | * Check for the case where we have fiber media and auto-neg failed | ||
974 | * so we had to force link. In this case, we need to force the | 1008 | * so we had to force link. In this case, we need to force the |
975 | * configuration of the MAC to match the "fc" parameter. | 1009 | * configuration of the MAC to match the "fc" parameter. |
976 | */ | 1010 | */ |
@@ -988,13 +1022,15 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
988 | return ret_val; | 1022 | return ret_val; |
989 | } | 1023 | } |
990 | 1024 | ||
991 | /* Check for the case where we have copper media and auto-neg is | 1025 | /* |
1026 | * Check for the case where we have copper media and auto-neg is | ||
992 | * enabled. In this case, we need to check and see if Auto-Neg | 1027 | * enabled. In this case, we need to check and see if Auto-Neg |
993 | * has completed, and if so, how the PHY and link partner has | 1028 | * has completed, and if so, how the PHY and link partner has |
994 | * flow control configured. | 1029 | * flow control configured. |
995 | */ | 1030 | */ |
996 | if ((hw->media_type == e1000_media_type_copper) && mac->autoneg) { | 1031 | if ((hw->media_type == e1000_media_type_copper) && mac->autoneg) { |
997 | /* Read the MII Status Register and check to see if AutoNeg | 1032 | /* |
1033 | * Read the MII Status Register and check to see if AutoNeg | ||
998 | * has completed. We read this twice because this reg has | 1034 | * has completed. We read this twice because this reg has |
999 | * some "sticky" (latched) bits. | 1035 | * some "sticky" (latched) bits. |
1000 | */ | 1036 | */ |
@@ -1011,7 +1047,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1011 | return ret_val; | 1047 | return ret_val; |
1012 | } | 1048 | } |
1013 | 1049 | ||
1014 | /* The AutoNeg process has completed, so we now need to | 1050 | /* |
1051 | * The AutoNeg process has completed, so we now need to | ||
1015 | * read both the Auto Negotiation Advertisement | 1052 | * read both the Auto Negotiation Advertisement |
1016 | * Register (Address 4) and the Auto_Negotiation Base | 1053 | * Register (Address 4) and the Auto_Negotiation Base |
1017 | * Page Ability Register (Address 5) to determine how | 1054 | * Page Ability Register (Address 5) to determine how |
@@ -1024,7 +1061,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1024 | if (ret_val) | 1061 | if (ret_val) |
1025 | return ret_val; | 1062 | return ret_val; |
1026 | 1063 | ||
1027 | /* Two bits in the Auto Negotiation Advertisement Register | 1064 | /* |
1065 | * Two bits in the Auto Negotiation Advertisement Register | ||
1028 | * (Address 4) and two bits in the Auto Negotiation Base | 1066 | * (Address 4) and two bits in the Auto Negotiation Base |
1029 | * Page Ability Register (Address 5) determine flow control | 1067 | * Page Ability Register (Address 5) determine flow control |
1030 | * for both the PHY and the link partner. The following | 1068 | * for both the PHY and the link partner. The following |
@@ -1045,8 +1083,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1045 | * 1 | 1 | 0 | 0 | e1000_fc_none | 1083 | * 1 | 1 | 0 | 0 | e1000_fc_none |
1046 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause | 1084 | * 1 | 1 | 0 | 1 | e1000_fc_rx_pause |
1047 | * | 1085 | * |
1048 | */ | 1086 | * |
1049 | /* Are both PAUSE bits set to 1? If so, this implies | 1087 | * Are both PAUSE bits set to 1? If so, this implies |
1050 | * Symmetric Flow Control is enabled at both ends. The | 1088 | * Symmetric Flow Control is enabled at both ends. The |
1051 | * ASM_DIR bits are irrelevant per the spec. | 1089 | * ASM_DIR bits are irrelevant per the spec. |
1052 | * | 1090 | * |
@@ -1060,9 +1098,10 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1060 | */ | 1098 | */ |
1061 | if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && | 1099 | if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && |
1062 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) { | 1100 | (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE)) { |
1063 | /* Now we need to check if the user selected RX ONLY | 1101 | /* |
1102 | * Now we need to check if the user selected Rx ONLY | ||
1064 | * of pause frames. In this case, we had to advertise | 1103 | * of pause frames. In this case, we had to advertise |
1065 | * FULL flow control because we could not advertise RX | 1104 | * FULL flow control because we could not advertise Rx |
1066 | * ONLY. Hence, we must now check to see if we need to | 1105 | * ONLY. Hence, we must now check to see if we need to |
1067 | * turn OFF the TRANSMISSION of PAUSE frames. | 1106 | * turn OFF the TRANSMISSION of PAUSE frames. |
1068 | */ | 1107 | */ |
@@ -1075,7 +1114,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1075 | "RX PAUSE frames only.\r\n"); | 1114 | "RX PAUSE frames only.\r\n"); |
1076 | } | 1115 | } |
1077 | } | 1116 | } |
1078 | /* For receiving PAUSE frames ONLY. | 1117 | /* |
1118 | * For receiving PAUSE frames ONLY. | ||
1079 | * | 1119 | * |
1080 | * LOCAL DEVICE | LINK PARTNER | 1120 | * LOCAL DEVICE | LINK PARTNER |
1081 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | 1121 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result |
@@ -1090,7 +1130,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1090 | mac->fc = e1000_fc_tx_pause; | 1130 | mac->fc = e1000_fc_tx_pause; |
1091 | hw_dbg(hw, "Flow Control = TX PAUSE frames only.\r\n"); | 1131 | hw_dbg(hw, "Flow Control = TX PAUSE frames only.\r\n"); |
1092 | } | 1132 | } |
1093 | /* For transmitting PAUSE frames ONLY. | 1133 | /* |
1134 | * For transmitting PAUSE frames ONLY. | ||
1094 | * | 1135 | * |
1095 | * LOCAL DEVICE | LINK PARTNER | 1136 | * LOCAL DEVICE | LINK PARTNER |
1096 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result | 1137 | * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result |
@@ -1113,7 +1154,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1113 | hw_dbg(hw, "Flow Control = NONE.\r\n"); | 1154 | hw_dbg(hw, "Flow Control = NONE.\r\n"); |
1114 | } | 1155 | } |
1115 | 1156 | ||
1116 | /* Now we need to do one last check... If we auto- | 1157 | /* |
1158 | * Now we need to do one last check... If we auto- | ||
1117 | * negotiated to HALF DUPLEX, flow control should not be | 1159 | * negotiated to HALF DUPLEX, flow control should not be |
1118 | * enabled per IEEE 802.3 spec. | 1160 | * enabled per IEEE 802.3 spec. |
1119 | */ | 1161 | */ |
@@ -1126,7 +1168,8 @@ s32 e1000e_config_fc_after_link_up(struct e1000_hw *hw) | |||
1126 | if (duplex == HALF_DUPLEX) | 1168 | if (duplex == HALF_DUPLEX) |
1127 | mac->fc = e1000_fc_none; | 1169 | mac->fc = e1000_fc_none; |
1128 | 1170 | ||
1129 | /* Now we call a subroutine to actually force the MAC | 1171 | /* |
1172 | * Now we call a subroutine to actually force the MAC | ||
1130 | * controller to use the correct flow control settings. | 1173 | * controller to use the correct flow control settings. |
1131 | */ | 1174 | */ |
1132 | ret_val = e1000e_force_mac_fc(hw); | 1175 | ret_val = e1000e_force_mac_fc(hw); |
@@ -1398,8 +1441,10 @@ s32 e1000e_blink_led(struct e1000_hw *hw) | |||
1398 | ledctl_blink = E1000_LEDCTL_LED0_BLINK | | 1441 | ledctl_blink = E1000_LEDCTL_LED0_BLINK | |
1399 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT); | 1442 | (E1000_LEDCTL_MODE_LED_ON << E1000_LEDCTL_LED0_MODE_SHIFT); |
1400 | } else { | 1443 | } else { |
1401 | /* set the blink bit for each LED that's "on" (0x0E) | 1444 | /* |
1402 | * in ledctl_mode2 */ | 1445 | * set the blink bit for each LED that's "on" (0x0E) |
1446 | * in ledctl_mode2 | ||
1447 | */ | ||
1403 | ledctl_blink = hw->mac.ledctl_mode2; | 1448 | ledctl_blink = hw->mac.ledctl_mode2; |
1404 | for (i = 0; i < 4; i++) | 1449 | for (i = 0; i < 4; i++) |
1405 | if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) == | 1450 | if (((hw->mac.ledctl_mode2 >> (i * 8)) & 0xFF) == |
@@ -1562,8 +1607,7 @@ void e1000e_update_adaptive(struct e1000_hw *hw) | |||
1562 | else | 1607 | else |
1563 | mac->current_ifs_val += | 1608 | mac->current_ifs_val += |
1564 | mac->ifs_step_size; | 1609 | mac->ifs_step_size; |
1565 | ew32(AIT, | 1610 | ew32(AIT, mac->current_ifs_val); |
1566 | mac->current_ifs_val); | ||
1567 | } | 1611 | } |
1568 | } | 1612 | } |
1569 | } else { | 1613 | } else { |
@@ -1826,10 +1870,12 @@ static s32 e1000_ready_nvm_eeprom(struct e1000_hw *hw) | |||
1826 | udelay(1); | 1870 | udelay(1); |
1827 | timeout = NVM_MAX_RETRY_SPI; | 1871 | timeout = NVM_MAX_RETRY_SPI; |
1828 | 1872 | ||
1829 | /* Read "Status Register" repeatedly until the LSB is cleared. | 1873 | /* |
1874 | * Read "Status Register" repeatedly until the LSB is cleared. | ||
1830 | * The EEPROM will signal that the command has been completed | 1875 | * The EEPROM will signal that the command has been completed |
1831 | * by clearing bit 0 of the internal status register. If it's | 1876 | * by clearing bit 0 of the internal status register. If it's |
1832 | * not cleared within 'timeout', then error out. */ | 1877 | * not cleared within 'timeout', then error out. |
1878 | */ | ||
1833 | while (timeout) { | 1879 | while (timeout) { |
1834 | e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI, | 1880 | e1000_shift_out_eec_bits(hw, NVM_RDSR_OPCODE_SPI, |
1835 | hw->nvm.opcode_bits); | 1881 | hw->nvm.opcode_bits); |
@@ -1866,8 +1912,10 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
1866 | u32 i, eerd = 0; | 1912 | u32 i, eerd = 0; |
1867 | s32 ret_val = 0; | 1913 | s32 ret_val = 0; |
1868 | 1914 | ||
1869 | /* A check for invalid values: offset too large, too many words, | 1915 | /* |
1870 | * and not enough words. */ | 1916 | * A check for invalid values: offset too large, too many words, |
1917 | * too many words for the offset, and not enough words. | ||
1918 | */ | ||
1871 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || | 1919 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || |
1872 | (words == 0)) { | 1920 | (words == 0)) { |
1873 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); | 1921 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); |
@@ -1883,8 +1931,7 @@ s32 e1000e_read_nvm_eerd(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
1883 | if (ret_val) | 1931 | if (ret_val) |
1884 | break; | 1932 | break; |
1885 | 1933 | ||
1886 | data[i] = (er32(EERD) >> | 1934 | data[i] = (er32(EERD) >> E1000_NVM_RW_REG_DATA); |
1887 | E1000_NVM_RW_REG_DATA); | ||
1888 | } | 1935 | } |
1889 | 1936 | ||
1890 | return ret_val; | 1937 | return ret_val; |
@@ -1908,8 +1955,10 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
1908 | s32 ret_val; | 1955 | s32 ret_val; |
1909 | u16 widx = 0; | 1956 | u16 widx = 0; |
1910 | 1957 | ||
1911 | /* A check for invalid values: offset too large, too many words, | 1958 | /* |
1912 | * and not enough words. */ | 1959 | * A check for invalid values: offset too large, too many words, |
1960 | * and not enough words. | ||
1961 | */ | ||
1913 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || | 1962 | if ((offset >= nvm->word_size) || (words > (nvm->word_size - offset)) || |
1914 | (words == 0)) { | 1963 | (words == 0)) { |
1915 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); | 1964 | hw_dbg(hw, "nvm parameter(s) out of bounds\n"); |
@@ -1939,8 +1988,10 @@ s32 e1000e_write_nvm_spi(struct e1000_hw *hw, u16 offset, u16 words, u16 *data) | |||
1939 | 1988 | ||
1940 | e1000_standby_nvm(hw); | 1989 | e1000_standby_nvm(hw); |
1941 | 1990 | ||
1942 | /* Some SPI eeproms use the 8th address bit embedded in the | 1991 | /* |
1943 | * opcode */ | 1992 | * Some SPI eeproms use the 8th address bit embedded in the |
1993 | * opcode | ||
1994 | */ | ||
1944 | if ((nvm->address_bits == 8) && (offset >= 128)) | 1995 | if ((nvm->address_bits == 8) && (offset >= 128)) |
1945 | write_opcode |= NVM_A8_OPCODE_SPI; | 1996 | write_opcode |= NVM_A8_OPCODE_SPI; |
1946 | 1997 | ||
@@ -1985,9 +2036,9 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw) | |||
1985 | /* Check for an alternate MAC address. An alternate MAC | 2036 | /* Check for an alternate MAC address. An alternate MAC |
1986 | * address can be setup by pre-boot software and must be | 2037 | * address can be setup by pre-boot software and must be |
1987 | * treated like a permanent address and must override the | 2038 | * treated like a permanent address and must override the |
1988 | * actual permanent MAC address. */ | 2039 | * actual permanent MAC address.*/ |
1989 | ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1, | 2040 | ret_val = e1000_read_nvm(hw, NVM_ALT_MAC_ADDR_PTR, 1, |
1990 | &mac_addr_offset); | 2041 | &mac_addr_offset); |
1991 | if (ret_val) { | 2042 | if (ret_val) { |
1992 | hw_dbg(hw, "NVM Read Error\n"); | 2043 | hw_dbg(hw, "NVM Read Error\n"); |
1993 | return ret_val; | 2044 | return ret_val; |
@@ -2000,7 +2051,7 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw) | |||
2000 | mac_addr_offset += ETH_ALEN/sizeof(u16); | 2051 | mac_addr_offset += ETH_ALEN/sizeof(u16); |
2001 | 2052 | ||
2002 | /* make sure we have a valid mac address here | 2053 | /* make sure we have a valid mac address here |
2003 | * before using it */ | 2054 | * before using it */ |
2004 | ret_val = e1000_read_nvm(hw, mac_addr_offset, 1, | 2055 | ret_val = e1000_read_nvm(hw, mac_addr_offset, 1, |
2005 | &nvm_data); | 2056 | &nvm_data); |
2006 | if (ret_val) { | 2057 | if (ret_val) { |
@@ -2012,7 +2063,7 @@ s32 e1000e_read_mac_addr(struct e1000_hw *hw) | |||
2012 | } | 2063 | } |
2013 | 2064 | ||
2014 | if (mac_addr_offset) | 2065 | if (mac_addr_offset) |
2015 | hw->dev_spec.e82571.alt_mac_addr_is_present = 1; | 2066 | hw->dev_spec.e82571.alt_mac_addr_is_present = 1; |
2016 | } | 2067 | } |
2017 | 2068 | ||
2018 | for (i = 0; i < ETH_ALEN; i += 2) { | 2069 | for (i = 0; i < ETH_ALEN; i += 2) { |
@@ -2188,7 +2239,7 @@ bool e1000e_check_mng_mode(struct e1000_hw *hw) | |||
2188 | } | 2239 | } |
2189 | 2240 | ||
2190 | /** | 2241 | /** |
2191 | * e1000e_enable_tx_pkt_filtering - Enable packet filtering on TX | 2242 | * e1000e_enable_tx_pkt_filtering - Enable packet filtering on Tx |
2192 | * @hw: pointer to the HW structure | 2243 | * @hw: pointer to the HW structure |
2193 | * | 2244 | * |
2194 | * Enables packet filtering on transmit packets if manageability is enabled | 2245 | * Enables packet filtering on transmit packets if manageability is enabled |
@@ -2208,7 +2259,8 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw) | |||
2208 | return 0; | 2259 | return 0; |
2209 | } | 2260 | } |
2210 | 2261 | ||
2211 | /* If we can't read from the host interface for whatever | 2262 | /* |
2263 | * If we can't read from the host interface for whatever | ||
2212 | * reason, disable filtering. | 2264 | * reason, disable filtering. |
2213 | */ | 2265 | */ |
2214 | ret_val = e1000_mng_enable_host_if(hw); | 2266 | ret_val = e1000_mng_enable_host_if(hw); |
@@ -2226,7 +2278,8 @@ bool e1000e_enable_tx_pkt_filtering(struct e1000_hw *hw) | |||
2226 | hdr->checksum = 0; | 2278 | hdr->checksum = 0; |
2227 | csum = e1000_calculate_checksum((u8 *)hdr, | 2279 | csum = e1000_calculate_checksum((u8 *)hdr, |
2228 | E1000_MNG_DHCP_COOKIE_LENGTH); | 2280 | E1000_MNG_DHCP_COOKIE_LENGTH); |
2229 | /* If either the checksums or signature don't match, then | 2281 | /* |
2282 | * If either the checksums or signature don't match, then | ||
2230 | * the cookie area isn't considered valid, in which case we | 2283 | * the cookie area isn't considered valid, in which case we |
2231 | * take the safe route of assuming Tx filtering is enabled. | 2284 | * take the safe route of assuming Tx filtering is enabled. |
2232 | */ | 2285 | */ |
@@ -2318,8 +2371,10 @@ static s32 e1000_mng_host_if_write(struct e1000_hw *hw, u8 *buffer, | |||
2318 | /* Calculate length in DWORDs */ | 2371 | /* Calculate length in DWORDs */ |
2319 | length >>= 2; | 2372 | length >>= 2; |
2320 | 2373 | ||
2321 | /* The device driver writes the relevant command block into the | 2374 | /* |
2322 | * ram area. */ | 2375 | * The device driver writes the relevant command block into the |
2376 | * ram area. | ||
2377 | */ | ||
2323 | for (i = 0; i < length; i++) { | 2378 | for (i = 0; i < length; i++) { |
2324 | for (j = 0; j < sizeof(u32); j++) { | 2379 | for (j = 0; j < sizeof(u32); j++) { |
2325 | *(tmp + j) = *bufptr++; | 2380 | *(tmp + j) = *bufptr++; |