diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 19:29:25 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-03-16 19:29:25 -0400 |
commit | 7a6362800cb7d1d618a697a650c7aaed3eb39320 (patch) | |
tree | 087f9bc6c13ef1fad4b392c5cf9325cd28fa8523 /drivers/net/e1000e/ich8lan.c | |
parent | 6445ced8670f37cfc2c5e24a9de9b413dbfc788d (diff) | |
parent | ceda86a108671294052cbf51660097b6534672f5 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next-2.6: (1480 commits)
bonding: enable netpoll without checking link status
xfrm: Refcount destination entry on xfrm_lookup
net: introduce rx_handler results and logic around that
bonding: get rid of IFF_SLAVE_INACTIVE netdev->priv_flag
bonding: wrap slave state work
net: get rid of multiple bond-related netdevice->priv_flags
bonding: register slave pointer for rx_handler
be2net: Bump up the version number
be2net: Copyright notice change. Update to Emulex instead of ServerEngines
e1000e: fix kconfig for crc32 dependency
netfilter ebtables: fix xt_AUDIT to work with ebtables
xen network backend driver
bonding: Improve syslog message at device creation time
bonding: Call netif_carrier_off after register_netdevice
bonding: Incorrect TX queue offset
net_sched: fix ip_tos2prio
xfrm: fix __xfrm_route_forward()
be2net: Fix UDP packet detected status in RX compl
Phonet: fix aligned-mode pipe socket buffer header reserve
netxen: support for GbE port settings
...
Fix up conflicts in drivers/staging/brcm80211/brcmsmac/wl_mac80211.c
with the staging updates.
Diffstat (limited to 'drivers/net/e1000e/ich8lan.c')
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 48 |
1 files changed, 37 insertions, 11 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index fb46974cfec1..ce1dbfdca112 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -140,6 +140,11 @@ | |||
140 | #define I82579_LPI_CTRL PHY_REG(772, 20) | 140 | #define I82579_LPI_CTRL PHY_REG(772, 20) |
141 | #define I82579_LPI_CTRL_ENABLE_MASK 0x6000 | 141 | #define I82579_LPI_CTRL_ENABLE_MASK 0x6000 |
142 | 142 | ||
143 | /* EMI Registers */ | ||
144 | #define I82579_EMI_ADDR 0x10 | ||
145 | #define I82579_EMI_DATA 0x11 | ||
146 | #define I82579_LPI_UPDATE_TIMER 0x4805 /* in 40ns units + 40 ns base value */ | ||
147 | |||
143 | /* Strapping Option Register - RO */ | 148 | /* Strapping Option Register - RO */ |
144 | #define E1000_STRAP 0x0000C | 149 | #define E1000_STRAP 0x0000C |
145 | #define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000 | 150 | #define E1000_STRAP_SMBUS_ADDRESS_MASK 0x00FE0000 |
@@ -302,9 +307,9 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) | |||
302 | * the interconnect to PCIe mode. | 307 | * the interconnect to PCIe mode. |
303 | */ | 308 | */ |
304 | fwsm = er32(FWSM); | 309 | fwsm = er32(FWSM); |
305 | if (!(fwsm & E1000_ICH_FWSM_FW_VALID)) { | 310 | if (!(fwsm & E1000_ICH_FWSM_FW_VALID) && !e1000_check_reset_block(hw)) { |
306 | ctrl = er32(CTRL); | 311 | ctrl = er32(CTRL); |
307 | ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; | 312 | ctrl |= E1000_CTRL_LANPHYPC_OVERRIDE; |
308 | ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; | 313 | ctrl &= ~E1000_CTRL_LANPHYPC_VALUE; |
309 | ew32(CTRL, ctrl); | 314 | ew32(CTRL, ctrl); |
310 | udelay(10); | 315 | udelay(10); |
@@ -331,7 +336,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) | |||
331 | goto out; | 336 | goto out; |
332 | 337 | ||
333 | /* Ungate automatic PHY configuration on non-managed 82579 */ | 338 | /* Ungate automatic PHY configuration on non-managed 82579 */ |
334 | if ((hw->mac.type == e1000_pch2lan) && | 339 | if ((hw->mac.type == e1000_pch2lan) && |
335 | !(fwsm & E1000_ICH_FWSM_FW_VALID)) { | 340 | !(fwsm & E1000_ICH_FWSM_FW_VALID)) { |
336 | msleep(10); | 341 | msleep(10); |
337 | e1000_gate_hw_phy_config_ich8lan(hw, false); | 342 | e1000_gate_hw_phy_config_ich8lan(hw, false); |
@@ -366,7 +371,7 @@ static s32 e1000_init_phy_params_pchlan(struct e1000_hw *hw) | |||
366 | case e1000_phy_82579: | 371 | case e1000_phy_82579: |
367 | phy->ops.check_polarity = e1000_check_polarity_82577; | 372 | phy->ops.check_polarity = e1000_check_polarity_82577; |
368 | phy->ops.force_speed_duplex = | 373 | phy->ops.force_speed_duplex = |
369 | e1000_phy_force_speed_duplex_82577; | 374 | e1000_phy_force_speed_duplex_82577; |
370 | phy->ops.get_cable_length = e1000_get_cable_length_82577; | 375 | phy->ops.get_cable_length = e1000_get_cable_length_82577; |
371 | phy->ops.get_info = e1000_get_phy_info_82577; | 376 | phy->ops.get_info = e1000_get_phy_info_82577; |
372 | phy->ops.commit = e1000e_phy_sw_reset; | 377 | phy->ops.commit = e1000e_phy_sw_reset; |
@@ -753,7 +758,13 @@ static s32 e1000_get_variants_ich8lan(struct e1000_adapter *adapter) | |||
753 | if (rc) | 758 | if (rc) |
754 | return rc; | 759 | return rc; |
755 | 760 | ||
756 | if (adapter->hw.phy.type == e1000_phy_ife) { | 761 | /* |
762 | * Disable Jumbo Frame support on parts with Intel 10/100 PHY or | ||
763 | * on parts with MACsec enabled in NVM (reflected in CTRL_EXT). | ||
764 | */ | ||
765 | if ((adapter->hw.phy.type == e1000_phy_ife) || | ||
766 | ((adapter->hw.mac.type >= e1000_pch2lan) && | ||
767 | (!(er32(CTRL_EXT) & E1000_CTRL_EXT_LSECCK)))) { | ||
757 | adapter->flags &= ~FLAG_HAS_JUMBO_FRAMES; | 768 | adapter->flags &= ~FLAG_HAS_JUMBO_FRAMES; |
758 | adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN; | 769 | adapter->max_hw_frame_size = ETH_FRAME_LEN + ETH_FCS_LEN; |
759 | } | 770 | } |
@@ -1723,11 +1734,25 @@ static s32 e1000_post_phy_reset_ich8lan(struct e1000_hw *hw) | |||
1723 | /* Configure the LCD with the OEM bits in NVM */ | 1734 | /* Configure the LCD with the OEM bits in NVM */ |
1724 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); | 1735 | ret_val = e1000_oem_bits_config_ich8lan(hw, true); |
1725 | 1736 | ||
1726 | /* Ungate automatic PHY configuration on non-managed 82579 */ | 1737 | if (hw->mac.type == e1000_pch2lan) { |
1727 | if ((hw->mac.type == e1000_pch2lan) && | 1738 | /* Ungate automatic PHY configuration on non-managed 82579 */ |
1728 | !(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) { | 1739 | if (!(er32(FWSM) & E1000_ICH_FWSM_FW_VALID)) { |
1729 | msleep(10); | 1740 | msleep(10); |
1730 | e1000_gate_hw_phy_config_ich8lan(hw, false); | 1741 | e1000_gate_hw_phy_config_ich8lan(hw, false); |
1742 | } | ||
1743 | |||
1744 | /* Set EEE LPI Update Timer to 200usec */ | ||
1745 | ret_val = hw->phy.ops.acquire(hw); | ||
1746 | if (ret_val) | ||
1747 | goto out; | ||
1748 | ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_ADDR, | ||
1749 | I82579_LPI_UPDATE_TIMER); | ||
1750 | if (ret_val) | ||
1751 | goto release; | ||
1752 | ret_val = hw->phy.ops.write_reg_locked(hw, I82579_EMI_DATA, | ||
1753 | 0x1387); | ||
1754 | release: | ||
1755 | hw->phy.ops.release(hw); | ||
1731 | } | 1756 | } |
1732 | 1757 | ||
1733 | out: | 1758 | out: |
@@ -2104,7 +2129,6 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) | |||
2104 | { | 2129 | { |
2105 | union ich8_hws_flash_status hsfsts; | 2130 | union ich8_hws_flash_status hsfsts; |
2106 | s32 ret_val = -E1000_ERR_NVM; | 2131 | s32 ret_val = -E1000_ERR_NVM; |
2107 | s32 i = 0; | ||
2108 | 2132 | ||
2109 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); | 2133 | hsfsts.regval = er16flash(ICH_FLASH_HSFSTS); |
2110 | 2134 | ||
@@ -2140,6 +2164,8 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw) | |||
2140 | ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval); | 2164 | ew16flash(ICH_FLASH_HSFSTS, hsfsts.regval); |
2141 | ret_val = 0; | 2165 | ret_val = 0; |
2142 | } else { | 2166 | } else { |
2167 | s32 i = 0; | ||
2168 | |||
2143 | /* | 2169 | /* |
2144 | * Otherwise poll for sometime so the current | 2170 | * Otherwise poll for sometime so the current |
2145 | * cycle has a chance to end before giving up. | 2171 | * cycle has a chance to end before giving up. |