diff options
author | Jeff Kirsher <jeffrey.t.kirsher@intel.com> | 2008-04-02 16:48:13 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@redhat.com> | 2008-04-16 20:41:36 -0400 |
commit | e9ec2c0f4bfbe0632b22a2c0b74d5e1e96aeab66 (patch) | |
tree | e65a632498dad6f7eaf77f1d2b00aa0c237d60a5 /drivers/net/e1000e/ich8lan.c | |
parent | 8d7c294cae6fd1474d88267810d1965f60a903af (diff) |
e1000e: Make arrays out of these Rx/Tx registers
With multiple queues coming into the code these base control
registers need to be made into arrays.
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/e1000e/ich8lan.c')
-rw-r--r-- | drivers/net/e1000e/ich8lan.c | 24 |
1 files changed, 12 insertions, 12 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c index e358a773e67a..bbb51e1a83b4 100644 --- a/drivers/net/e1000e/ich8lan.c +++ b/drivers/net/e1000e/ich8lan.c | |||
@@ -1753,18 +1753,18 @@ static s32 e1000_init_hw_ich8lan(struct e1000_hw *hw) | |||
1753 | ret_val = e1000_setup_link_ich8lan(hw); | 1753 | ret_val = e1000_setup_link_ich8lan(hw); |
1754 | 1754 | ||
1755 | /* Set the transmit descriptor write-back policy for both queues */ | 1755 | /* Set the transmit descriptor write-back policy for both queues */ |
1756 | txdctl = er32(TXDCTL); | 1756 | txdctl = er32(TXDCTL(0)); |
1757 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | | 1757 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | |
1758 | E1000_TXDCTL_FULL_TX_DESC_WB; | 1758 | E1000_TXDCTL_FULL_TX_DESC_WB; |
1759 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | | 1759 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | |
1760 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; | 1760 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; |
1761 | ew32(TXDCTL, txdctl); | 1761 | ew32(TXDCTL(0), txdctl); |
1762 | txdctl = er32(TXDCTL1); | 1762 | txdctl = er32(TXDCTL(1)); |
1763 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | | 1763 | txdctl = (txdctl & ~E1000_TXDCTL_WTHRESH) | |
1764 | E1000_TXDCTL_FULL_TX_DESC_WB; | 1764 | E1000_TXDCTL_FULL_TX_DESC_WB; |
1765 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | | 1765 | txdctl = (txdctl & ~E1000_TXDCTL_PTHRESH) | |
1766 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; | 1766 | E1000_TXDCTL_MAX_TX_DESC_PREFETCH; |
1767 | ew32(TXDCTL1, txdctl); | 1767 | ew32(TXDCTL(1), txdctl); |
1768 | 1768 | ||
1769 | /* | 1769 | /* |
1770 | * ICH8 has opposite polarity of no_snoop bits. | 1770 | * ICH8 has opposite polarity of no_snoop bits. |
@@ -1807,30 +1807,30 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw) | |||
1807 | ew32(CTRL_EXT, reg); | 1807 | ew32(CTRL_EXT, reg); |
1808 | 1808 | ||
1809 | /* Transmit Descriptor Control 0 */ | 1809 | /* Transmit Descriptor Control 0 */ |
1810 | reg = er32(TXDCTL); | 1810 | reg = er32(TXDCTL(0)); |
1811 | reg |= (1 << 22); | 1811 | reg |= (1 << 22); |
1812 | ew32(TXDCTL, reg); | 1812 | ew32(TXDCTL(0), reg); |
1813 | 1813 | ||
1814 | /* Transmit Descriptor Control 1 */ | 1814 | /* Transmit Descriptor Control 1 */ |
1815 | reg = er32(TXDCTL1); | 1815 | reg = er32(TXDCTL(1)); |
1816 | reg |= (1 << 22); | 1816 | reg |= (1 << 22); |
1817 | ew32(TXDCTL1, reg); | 1817 | ew32(TXDCTL(1), reg); |
1818 | 1818 | ||
1819 | /* Transmit Arbitration Control 0 */ | 1819 | /* Transmit Arbitration Control 0 */ |
1820 | reg = er32(TARC0); | 1820 | reg = er32(TARC(0)); |
1821 | if (hw->mac.type == e1000_ich8lan) | 1821 | if (hw->mac.type == e1000_ich8lan) |
1822 | reg |= (1 << 28) | (1 << 29); | 1822 | reg |= (1 << 28) | (1 << 29); |
1823 | reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27); | 1823 | reg |= (1 << 23) | (1 << 24) | (1 << 26) | (1 << 27); |
1824 | ew32(TARC0, reg); | 1824 | ew32(TARC(0), reg); |
1825 | 1825 | ||
1826 | /* Transmit Arbitration Control 1 */ | 1826 | /* Transmit Arbitration Control 1 */ |
1827 | reg = er32(TARC1); | 1827 | reg = er32(TARC(1)); |
1828 | if (er32(TCTL) & E1000_TCTL_MULR) | 1828 | if (er32(TCTL) & E1000_TCTL_MULR) |
1829 | reg &= ~(1 << 28); | 1829 | reg &= ~(1 << 28); |
1830 | else | 1830 | else |
1831 | reg |= (1 << 28); | 1831 | reg |= (1 << 28); |
1832 | reg |= (1 << 24) | (1 << 26) | (1 << 30); | 1832 | reg |= (1 << 24) | (1 << 26) | (1 << 30); |
1833 | ew32(TARC1, reg); | 1833 | ew32(TARC(1), reg); |
1834 | 1834 | ||
1835 | /* Device Status */ | 1835 | /* Device Status */ |
1836 | if (hw->mac.type == e1000_ich8lan) { | 1836 | if (hw->mac.type == e1000_ich8lan) { |