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authorBruce Allan <bruce.w.allan@intel.com>2008-04-29 12:16:05 -0400
committerJeff Garzik <jgarzik@redhat.com>2008-05-06 12:04:14 -0400
commit97ac8caee238d2a81c23661916f7acd3a22c85fe (patch)
tree52723d8582162e862c78fecb5da2d4d13f7a9579 /drivers/net/e1000e/ich8lan.c
parente284e5c6601cbb16e48854be26aa57a8fa844e35 (diff)
e1000e: Add support for BM PHYs on ICH9
This patch adds support for the BM PHY, a new PHY model being used on ICH9-based implementations. This new PHY exposes issues in the ICH9 silicon when receiving jumbo frames large enough to use more than a certain part of the Rx FIFO, and this unfortunately breaks packet split jumbo receives. For this reason we re-introduce (for affected adapters only) the jumbo single-skb receive routine back so that people who do wish to use jumbo frames on these ich9 platforms can do so. Part of this problem has to do with CPU sleep states and to make sure that all the wake up timings are correctly we force them with the recently merged pm_qos infrastructure written by Mark Gross. (See http://lkml.org/lkml/2007/10/4/400). To make code read a bit easier we introduce a _IS_ICH flag so that we don't need to do mac type checks over the code. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Garzik <jgarzik@redhat.com>
Diffstat (limited to 'drivers/net/e1000e/ich8lan.c')
-rw-r--r--drivers/net/e1000e/ich8lan.c83
1 files changed, 82 insertions, 1 deletions
diff --git a/drivers/net/e1000e/ich8lan.c b/drivers/net/e1000e/ich8lan.c
index 768485dbb2c6..9e38452a738c 100644
--- a/drivers/net/e1000e/ich8lan.c
+++ b/drivers/net/e1000e/ich8lan.c
@@ -38,6 +38,12 @@
38 * 82566DM Gigabit Network Connection 38 * 82566DM Gigabit Network Connection
39 * 82566MC Gigabit Network Connection 39 * 82566MC Gigabit Network Connection
40 * 82566MM Gigabit Network Connection 40 * 82566MM Gigabit Network Connection
41 * 82567LM Gigabit Network Connection
42 * 82567LF Gigabit Network Connection
43 * 82567LM-2 Gigabit Network Connection
44 * 82567LF-2 Gigabit Network Connection
45 * 82567V-2 Gigabit Network Connection
46 * 82562GT-3 10/100 Network Connection
41 */ 47 */
42 48
43#include <linux/netdevice.h> 49#include <linux/netdevice.h>
@@ -198,6 +204,19 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)
198 phy->addr = 1; 204 phy->addr = 1;
199 phy->reset_delay_us = 100; 205 phy->reset_delay_us = 100;
200 206
207 /*
208 * We may need to do this twice - once for IGP and if that fails,
209 * we'll set BM func pointers and try again
210 */
211 ret_val = e1000e_determine_phy_address(hw);
212 if (ret_val) {
213 hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm;
214 hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm;
215 ret_val = e1000e_determine_phy_address(hw);
216 if (ret_val)
217 return ret_val;
218 }
219
201 phy->id = 0; 220 phy->id = 0;
202 while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) && 221 while ((e1000_phy_unknown == e1000e_get_phy_type_from_id(phy->id)) &&
203 (i++ < 100)) { 222 (i++ < 100)) {
@@ -219,6 +238,13 @@ static s32 e1000_init_phy_params_ich8lan(struct e1000_hw *hw)
219 phy->type = e1000_phy_ife; 238 phy->type = e1000_phy_ife;
220 phy->autoneg_mask = E1000_ALL_NOT_GIG; 239 phy->autoneg_mask = E1000_ALL_NOT_GIG;
221 break; 240 break;
241 case BME1000_E_PHY_ID:
242 phy->type = e1000_phy_bm;
243 phy->autoneg_mask = AUTONEG_ADVERTISE_SPEED_DEFAULT;
244 hw->phy.ops.read_phy_reg = e1000e_read_phy_reg_bm;
245 hw->phy.ops.write_phy_reg = e1000e_write_phy_reg_bm;
246 hw->phy.ops.commit_phy = e1000e_phy_sw_reset;
247 break;
222 default: 248 default:
223 return -E1000_ERR_PHY; 249 return -E1000_ERR_PHY;
224 break; 250 break;
@@ -664,6 +690,7 @@ static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw)
664 return e1000_get_phy_info_ife_ich8lan(hw); 690 return e1000_get_phy_info_ife_ich8lan(hw);
665 break; 691 break;
666 case e1000_phy_igp_3: 692 case e1000_phy_igp_3:
693 case e1000_phy_bm:
667 return e1000e_get_phy_info_igp(hw); 694 return e1000e_get_phy_info_igp(hw);
668 break; 695 break;
669 default: 696 default:
@@ -728,7 +755,7 @@ static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
728 s32 ret_val = 0; 755 s32 ret_val = 0;
729 u16 data; 756 u16 data;
730 757
731 if (phy->type != e1000_phy_igp_3) 758 if (phy->type == e1000_phy_ife)
732 return ret_val; 759 return ret_val;
733 760
734 phy_ctrl = er32(PHY_CTRL); 761 phy_ctrl = er32(PHY_CTRL);
@@ -1918,8 +1945,35 @@ static s32 e1000_setup_copper_link_ich8lan(struct e1000_hw *hw)
1918 ret_val = e1000e_copper_link_setup_igp(hw); 1945 ret_val = e1000e_copper_link_setup_igp(hw);
1919 if (ret_val) 1946 if (ret_val)
1920 return ret_val; 1947 return ret_val;
1948 } else if (hw->phy.type == e1000_phy_bm) {
1949 ret_val = e1000e_copper_link_setup_m88(hw);
1950 if (ret_val)
1951 return ret_val;
1921 } 1952 }
1922 1953
1954 if (hw->phy.type == e1000_phy_ife) {
1955 ret_val = e1e_rphy(hw, IFE_PHY_MDIX_CONTROL, &reg_data);
1956 if (ret_val)
1957 return ret_val;
1958
1959 reg_data &= ~IFE_PMC_AUTO_MDIX;
1960
1961 switch (hw->phy.mdix) {
1962 case 1:
1963 reg_data &= ~IFE_PMC_FORCE_MDIX;
1964 break;
1965 case 2:
1966 reg_data |= IFE_PMC_FORCE_MDIX;
1967 break;
1968 case 0:
1969 default:
1970 reg_data |= IFE_PMC_AUTO_MDIX;
1971 break;
1972 }
1973 ret_val = e1e_wphy(hw, IFE_PHY_MDIX_CONTROL, reg_data);
1974 if (ret_val)
1975 return ret_val;
1976 }
1923 return e1000e_setup_copper_link(hw); 1977 return e1000e_setup_copper_link(hw);
1924} 1978}
1925 1979
@@ -2127,6 +2181,31 @@ void e1000e_gig_downshift_workaround_ich8lan(struct e1000_hw *hw)
2127} 2181}
2128 2182
2129/** 2183/**
2184 * e1000e_disable_gig_wol_ich8lan - disable gig during WoL
2185 * @hw: pointer to the HW structure
2186 *
2187 * During S0 to Sx transition, it is possible the link remains at gig
2188 * instead of negotiating to a lower speed. Before going to Sx, set
2189 * 'LPLU Enabled' and 'Gig Disable' to force link speed negotiation
2190 * to a lower speed.
2191 *
2192 * Should only be called for ICH9 devices.
2193 **/
2194void e1000e_disable_gig_wol_ich8lan(struct e1000_hw *hw)
2195{
2196 u32 phy_ctrl;
2197
2198 if (hw->mac.type == e1000_ich9lan) {
2199 phy_ctrl = er32(PHY_CTRL);
2200 phy_ctrl |= E1000_PHY_CTRL_D0A_LPLU |
2201 E1000_PHY_CTRL_GBE_DISABLE;
2202 ew32(PHY_CTRL, phy_ctrl);
2203 }
2204
2205 return;
2206}
2207
2208/**
2130 * e1000_cleanup_led_ich8lan - Restore the default LED operation 2209 * e1000_cleanup_led_ich8lan - Restore the default LED operation
2131 * @hw: pointer to the HW structure 2210 * @hw: pointer to the HW structure
2132 * 2211 *
@@ -2247,6 +2326,7 @@ static struct e1000_nvm_operations ich8_nvm_ops = {
2247struct e1000_info e1000_ich8_info = { 2326struct e1000_info e1000_ich8_info = {
2248 .mac = e1000_ich8lan, 2327 .mac = e1000_ich8lan,
2249 .flags = FLAG_HAS_WOL 2328 .flags = FLAG_HAS_WOL
2329 | FLAG_IS_ICH
2250 | FLAG_RX_CSUM_ENABLED 2330 | FLAG_RX_CSUM_ENABLED
2251 | FLAG_HAS_CTRLEXT_ON_LOAD 2331 | FLAG_HAS_CTRLEXT_ON_LOAD
2252 | FLAG_HAS_AMT 2332 | FLAG_HAS_AMT
@@ -2262,6 +2342,7 @@ struct e1000_info e1000_ich8_info = {
2262struct e1000_info e1000_ich9_info = { 2342struct e1000_info e1000_ich9_info = {
2263 .mac = e1000_ich9lan, 2343 .mac = e1000_ich9lan,
2264 .flags = FLAG_HAS_JUMBO_FRAMES 2344 .flags = FLAG_HAS_JUMBO_FRAMES
2345 | FLAG_IS_ICH
2265 | FLAG_HAS_WOL 2346 | FLAG_HAS_WOL
2266 | FLAG_RX_CSUM_ENABLED 2347 | FLAG_RX_CSUM_ENABLED
2267 | FLAG_HAS_CTRLEXT_ON_LOAD 2348 | FLAG_HAS_CTRLEXT_ON_LOAD