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authorBruce Allan <bruce.w.allan@intel.com>2009-11-20 18:27:21 -0500
committerDavid S. Miller <davem@davemloft.net>2009-11-21 14:34:21 -0500
commit99673d9b5d48c81f2e9fe094c0d9e42815c60b3f (patch)
treee21e8f5149bb8a08497d97c3f0691dc81dbf2ac3 /drivers/net/e1000e/es2lan.c
parent3d5e33c9783d3e911e9aef0339663e887044f0df (diff)
e1000e: cleanup functions that clear hardware statistics
The e1000_clear_hw_cntrs_*() functions read the registers to clear them. There is no reason to save the register contents so the temp variable can be removed. Signed-off-by: Bruce Allan <bruce.w.allan@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000e/es2lan.c')
-rw-r--r--drivers/net/e1000e/es2lan.c70
1 files changed, 34 insertions, 36 deletions
diff --git a/drivers/net/e1000e/es2lan.c b/drivers/net/e1000e/es2lan.c
index 795d433e656f..8a089569c6e1 100644
--- a/drivers/net/e1000e/es2lan.c
+++ b/drivers/net/e1000e/es2lan.c
@@ -1304,44 +1304,42 @@ static s32 e1000_write_kmrn_reg_80003es2lan(struct e1000_hw *hw, u32 offset,
1304 **/ 1304 **/
1305static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw) 1305static void e1000_clear_hw_cntrs_80003es2lan(struct e1000_hw *hw)
1306{ 1306{
1307 u32 temp;
1308
1309 e1000e_clear_hw_cntrs_base(hw); 1307 e1000e_clear_hw_cntrs_base(hw);
1310 1308
1311 temp = er32(PRC64); 1309 er32(PRC64);
1312 temp = er32(PRC127); 1310 er32(PRC127);
1313 temp = er32(PRC255); 1311 er32(PRC255);
1314 temp = er32(PRC511); 1312 er32(PRC511);
1315 temp = er32(PRC1023); 1313 er32(PRC1023);
1316 temp = er32(PRC1522); 1314 er32(PRC1522);
1317 temp = er32(PTC64); 1315 er32(PTC64);
1318 temp = er32(PTC127); 1316 er32(PTC127);
1319 temp = er32(PTC255); 1317 er32(PTC255);
1320 temp = er32(PTC511); 1318 er32(PTC511);
1321 temp = er32(PTC1023); 1319 er32(PTC1023);
1322 temp = er32(PTC1522); 1320 er32(PTC1522);
1323 1321
1324 temp = er32(ALGNERRC); 1322 er32(ALGNERRC);
1325 temp = er32(RXERRC); 1323 er32(RXERRC);
1326 temp = er32(TNCRS); 1324 er32(TNCRS);
1327 temp = er32(CEXTERR); 1325 er32(CEXTERR);
1328 temp = er32(TSCTC); 1326 er32(TSCTC);
1329 temp = er32(TSCTFC); 1327 er32(TSCTFC);
1330 1328
1331 temp = er32(MGTPRC); 1329 er32(MGTPRC);
1332 temp = er32(MGTPDC); 1330 er32(MGTPDC);
1333 temp = er32(MGTPTC); 1331 er32(MGTPTC);
1334 1332
1335 temp = er32(IAC); 1333 er32(IAC);
1336 temp = er32(ICRXOC); 1334 er32(ICRXOC);
1337 1335
1338 temp = er32(ICRXPTC); 1336 er32(ICRXPTC);
1339 temp = er32(ICRXATC); 1337 er32(ICRXATC);
1340 temp = er32(ICTXPTC); 1338 er32(ICTXPTC);
1341 temp = er32(ICTXATC); 1339 er32(ICTXATC);
1342 temp = er32(ICTXQEC); 1340 er32(ICTXQEC);
1343 temp = er32(ICTXQMTC); 1341 er32(ICTXQMTC);
1344 temp = er32(ICRXDMTC); 1342 er32(ICRXDMTC);
1345} 1343}
1346 1344
1347static struct e1000_mac_operations es2_mac_ops = { 1345static struct e1000_mac_operations es2_mac_ops = {