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| author | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-11-11 18:59:04 -0500 |
|---|---|---|
| committer | Benjamin Herrenschmidt <benh@kernel.crashing.org> | 2009-11-11 18:59:04 -0500 |
| commit | 0526484aa345adbf790d1201a6f5d09be0a648a3 (patch) | |
| tree | 8da37ac2858a960e80dc59ebc4afc460935724f4 /drivers/net/e1000e/defines.h | |
| parent | e0ea8b2c0677e6cc44a0e5b867be48867f91de5b (diff) | |
| parent | aa021baa3295fa6e3f367d80f8955dd5176656eb (diff) | |
Merge commit 'origin/master' into next
Diffstat (limited to 'drivers/net/e1000e/defines.h')
| -rw-r--r-- | drivers/net/e1000e/defines.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/drivers/net/e1000e/defines.h b/drivers/net/e1000e/defines.h index c0f185beb8bc..1190167a8b3d 100644 --- a/drivers/net/e1000e/defines.h +++ b/drivers/net/e1000e/defines.h | |||
| @@ -76,6 +76,7 @@ | |||
| 76 | /* Extended Device Control */ | 76 | /* Extended Device Control */ |
| 77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ | 77 | #define E1000_CTRL_EXT_SDP7_DATA 0x00000080 /* Value of SW Definable Pin 7 */ |
| 78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ | 78 | #define E1000_CTRL_EXT_EE_RST 0x00002000 /* Reinitialize from EEPROM */ |
| 79 | #define E1000_CTRL_EXT_SPD_BYPS 0x00008000 /* Speed Select Bypass */ | ||
| 79 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ | 80 | #define E1000_CTRL_EXT_RO_DIS 0x00020000 /* Relaxed Ordering disable */ |
| 80 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ | 81 | #define E1000_CTRL_EXT_DMA_DYN_CLK_EN 0x00080000 /* DMA Dynamic Clock Gating */ |
| 81 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 | 82 | #define E1000_CTRL_EXT_LINK_MODE_MASK 0x00C00000 |
| @@ -347,6 +348,7 @@ | |||
| 347 | /* Extended Configuration Control and Size */ | 348 | /* Extended Configuration Control and Size */ |
| 348 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 | 349 | #define E1000_EXTCNF_CTRL_MDIO_SW_OWNERSHIP 0x00000020 |
| 349 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 | 350 | #define E1000_EXTCNF_CTRL_LCD_WRITE_ENABLE 0x00000001 |
| 351 | #define E1000_EXTCNF_CTRL_OEM_WRITE_ENABLE 0x00000008 | ||
| 350 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 | 352 | #define E1000_EXTCNF_CTRL_SWFLAG 0x00000020 |
| 351 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 | 353 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_MASK 0x00FF0000 |
| 352 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 | 354 | #define E1000_EXTCNF_SIZE_EXT_PCIE_LENGTH_SHIFT 16 |