diff options
author | David S. Miller <davem@davemloft.net> | 2008-04-17 17:13:13 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-04-17 17:13:13 -0400 |
commit | 2e5a3eaca386ce026f240c7b21e5c4958fcea946 (patch) | |
tree | 191cf2b340d008b711137ce8c40b27a3dadff8d5 /drivers/net/e1000e/82571.c | |
parent | 8c95b4773dd8d0415269ffad7301ef96d75be8ee (diff) | |
parent | 36b30ea940bb88d88c90698e0e3d97a805ab5856 (diff) |
Merge branch 'upstream-net26' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6
Diffstat (limited to 'drivers/net/e1000e/82571.c')
-rw-r--r-- | drivers/net/e1000e/82571.c | 36 |
1 files changed, 20 insertions, 16 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index f7e1619b974e..01c88664bad3 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -171,6 +171,10 @@ static s32 e1000_init_nvm_params_82571(struct e1000_hw *hw) | |||
171 | * for setting word_size. | 171 | * for setting word_size. |
172 | */ | 172 | */ |
173 | size += NVM_WORD_SIZE_BASE_SHIFT; | 173 | size += NVM_WORD_SIZE_BASE_SHIFT; |
174 | |||
175 | /* EEPROM access above 16k is unsupported */ | ||
176 | if (size > 14) | ||
177 | size = 14; | ||
174 | nvm->word_size = 1 << size; | 178 | nvm->word_size = 1 << size; |
175 | break; | 179 | break; |
176 | } | 180 | } |
@@ -244,7 +248,7 @@ static s32 e1000_init_mac_params_82571(struct e1000_adapter *adapter) | |||
244 | return 0; | 248 | return 0; |
245 | } | 249 | } |
246 | 250 | ||
247 | static s32 e1000_get_invariants_82571(struct e1000_adapter *adapter) | 251 | static s32 e1000_get_variants_82571(struct e1000_adapter *adapter) |
248 | { | 252 | { |
249 | struct e1000_hw *hw = &adapter->hw; | 253 | struct e1000_hw *hw = &adapter->hw; |
250 | static int global_quad_port_a; /* global port a indication */ | 254 | static int global_quad_port_a; /* global port a indication */ |
@@ -832,19 +836,19 @@ static s32 e1000_init_hw_82571(struct e1000_hw *hw) | |||
832 | ret_val = e1000_setup_link_82571(hw); | 836 | ret_val = e1000_setup_link_82571(hw); |
833 | 837 | ||
834 | /* Set the transmit descriptor write-back policy */ | 838 | /* Set the transmit descriptor write-back policy */ |
835 | reg_data = er32(TXDCTL); | 839 | reg_data = er32(TXDCTL(0)); |
836 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 840 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
837 | E1000_TXDCTL_FULL_TX_DESC_WB | | 841 | E1000_TXDCTL_FULL_TX_DESC_WB | |
838 | E1000_TXDCTL_COUNT_DESC; | 842 | E1000_TXDCTL_COUNT_DESC; |
839 | ew32(TXDCTL, reg_data); | 843 | ew32(TXDCTL(0), reg_data); |
840 | 844 | ||
841 | /* ...for both queues. */ | 845 | /* ...for both queues. */ |
842 | if (mac->type != e1000_82573) { | 846 | if (mac->type != e1000_82573) { |
843 | reg_data = er32(TXDCTL1); | 847 | reg_data = er32(TXDCTL(1)); |
844 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | | 848 | reg_data = (reg_data & ~E1000_TXDCTL_WTHRESH) | |
845 | E1000_TXDCTL_FULL_TX_DESC_WB | | 849 | E1000_TXDCTL_FULL_TX_DESC_WB | |
846 | E1000_TXDCTL_COUNT_DESC; | 850 | E1000_TXDCTL_COUNT_DESC; |
847 | ew32(TXDCTL1, reg_data); | 851 | ew32(TXDCTL(1), reg_data); |
848 | } else { | 852 | } else { |
849 | e1000e_enable_tx_pkt_filtering(hw); | 853 | e1000e_enable_tx_pkt_filtering(hw); |
850 | reg_data = er32(GCR); | 854 | reg_data = er32(GCR); |
@@ -874,17 +878,17 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
874 | u32 reg; | 878 | u32 reg; |
875 | 879 | ||
876 | /* Transmit Descriptor Control 0 */ | 880 | /* Transmit Descriptor Control 0 */ |
877 | reg = er32(TXDCTL); | 881 | reg = er32(TXDCTL(0)); |
878 | reg |= (1 << 22); | 882 | reg |= (1 << 22); |
879 | ew32(TXDCTL, reg); | 883 | ew32(TXDCTL(0), reg); |
880 | 884 | ||
881 | /* Transmit Descriptor Control 1 */ | 885 | /* Transmit Descriptor Control 1 */ |
882 | reg = er32(TXDCTL1); | 886 | reg = er32(TXDCTL(1)); |
883 | reg |= (1 << 22); | 887 | reg |= (1 << 22); |
884 | ew32(TXDCTL1, reg); | 888 | ew32(TXDCTL(1), reg); |
885 | 889 | ||
886 | /* Transmit Arbitration Control 0 */ | 890 | /* Transmit Arbitration Control 0 */ |
887 | reg = er32(TARC0); | 891 | reg = er32(TARC(0)); |
888 | reg &= ~(0xF << 27); /* 30:27 */ | 892 | reg &= ~(0xF << 27); /* 30:27 */ |
889 | switch (hw->mac.type) { | 893 | switch (hw->mac.type) { |
890 | case e1000_82571: | 894 | case e1000_82571: |
@@ -894,10 +898,10 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
894 | default: | 898 | default: |
895 | break; | 899 | break; |
896 | } | 900 | } |
897 | ew32(TARC0, reg); | 901 | ew32(TARC(0), reg); |
898 | 902 | ||
899 | /* Transmit Arbitration Control 1 */ | 903 | /* Transmit Arbitration Control 1 */ |
900 | reg = er32(TARC1); | 904 | reg = er32(TARC(1)); |
901 | switch (hw->mac.type) { | 905 | switch (hw->mac.type) { |
902 | case e1000_82571: | 906 | case e1000_82571: |
903 | case e1000_82572: | 907 | case e1000_82572: |
@@ -907,7 +911,7 @@ static void e1000_initialize_hw_bits_82571(struct e1000_hw *hw) | |||
907 | reg &= ~(1 << 28); | 911 | reg &= ~(1 << 28); |
908 | else | 912 | else |
909 | reg |= (1 << 28); | 913 | reg |= (1 << 28); |
910 | ew32(TARC1, reg); | 914 | ew32(TARC(1), reg); |
911 | break; | 915 | break; |
912 | default: | 916 | default: |
913 | break; | 917 | break; |
@@ -1333,7 +1337,7 @@ struct e1000_info e1000_82571_info = { | |||
1333 | | FLAG_TARC_SPEED_MODE_BIT /* errata */ | 1337 | | FLAG_TARC_SPEED_MODE_BIT /* errata */ |
1334 | | FLAG_APME_CHECK_PORT_B, | 1338 | | FLAG_APME_CHECK_PORT_B, |
1335 | .pba = 38, | 1339 | .pba = 38, |
1336 | .get_invariants = e1000_get_invariants_82571, | 1340 | .get_variants = e1000_get_variants_82571, |
1337 | .mac_ops = &e82571_mac_ops, | 1341 | .mac_ops = &e82571_mac_ops, |
1338 | .phy_ops = &e82_phy_ops_igp, | 1342 | .phy_ops = &e82_phy_ops_igp, |
1339 | .nvm_ops = &e82571_nvm_ops, | 1343 | .nvm_ops = &e82571_nvm_ops, |
@@ -1351,7 +1355,7 @@ struct e1000_info e1000_82572_info = { | |||
1351 | | FLAG_HAS_STATS_ICR_ICT | 1355 | | FLAG_HAS_STATS_ICR_ICT |
1352 | | FLAG_TARC_SPEED_MODE_BIT, /* errata */ | 1356 | | FLAG_TARC_SPEED_MODE_BIT, /* errata */ |
1353 | .pba = 38, | 1357 | .pba = 38, |
1354 | .get_invariants = e1000_get_invariants_82571, | 1358 | .get_variants = e1000_get_variants_82571, |
1355 | .mac_ops = &e82571_mac_ops, | 1359 | .mac_ops = &e82571_mac_ops, |
1356 | .phy_ops = &e82_phy_ops_igp, | 1360 | .phy_ops = &e82_phy_ops_igp, |
1357 | .nvm_ops = &e82571_nvm_ops, | 1361 | .nvm_ops = &e82571_nvm_ops, |
@@ -1371,7 +1375,7 @@ struct e1000_info e1000_82573_info = { | |||
1371 | | FLAG_HAS_ERT | 1375 | | FLAG_HAS_ERT |
1372 | | FLAG_HAS_SWSM_ON_LOAD, | 1376 | | FLAG_HAS_SWSM_ON_LOAD, |
1373 | .pba = 20, | 1377 | .pba = 20, |
1374 | .get_invariants = e1000_get_invariants_82571, | 1378 | .get_variants = e1000_get_variants_82571, |
1375 | .mac_ops = &e82571_mac_ops, | 1379 | .mac_ops = &e82571_mac_ops, |
1376 | .phy_ops = &e82_phy_ops_m88, | 1380 | .phy_ops = &e82_phy_ops_m88, |
1377 | .nvm_ops = &e82571_nvm_ops, | 1381 | .nvm_ops = &e82571_nvm_ops, |