diff options
author | Bruce Allan <bruce.w.allan@intel.com> | 2008-11-21 19:53:51 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2008-11-21 19:53:51 -0500 |
commit | 75eb0fad56da8494b43865097f362633debdc958 (patch) | |
tree | a0c0b5ba3ad92712b52d934d911ebb69eee254bf /drivers/net/e1000e/82571.c | |
parent | 438b365a2758c012393a7be24d31a9c06aa0a504 (diff) |
e1000e: ESB2 config after link up
On ESB2, the MAC-to-PHY (Kumeran) interface must be configured after link
is up before any traffic is sent; a new PHY operations function pointer is
provided for this. To facilitate read/write of the Kumeran registers
without blocking PHY register writes, the driver/firmware synchronization
method which previously used a hardware semaphore for both PHY and Kumeran
register accesses is now split. New Kumeran register read/write functions
utilize this new synchronization method.
Signed-off-by: Bruce Allan <bruce.w.allan@intel.com>
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000e/82571.c')
-rw-r--r-- | drivers/net/e1000e/82571.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/drivers/net/e1000e/82571.c b/drivers/net/e1000e/82571.c index cbb1707cc0d5..11e72b64e87d 100644 --- a/drivers/net/e1000e/82571.c +++ b/drivers/net/e1000e/82571.c | |||
@@ -1394,6 +1394,7 @@ static struct e1000_phy_operations e82_phy_ops_igp = { | |||
1394 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, | 1394 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
1395 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, | 1395 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
1396 | .write_phy_reg = e1000e_write_phy_reg_igp, | 1396 | .write_phy_reg = e1000e_write_phy_reg_igp, |
1397 | .cfg_on_link_up = NULL, | ||
1397 | }; | 1398 | }; |
1398 | 1399 | ||
1399 | static struct e1000_phy_operations e82_phy_ops_m88 = { | 1400 | static struct e1000_phy_operations e82_phy_ops_m88 = { |
@@ -1410,6 +1411,7 @@ static struct e1000_phy_operations e82_phy_ops_m88 = { | |||
1410 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, | 1411 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
1411 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, | 1412 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
1412 | .write_phy_reg = e1000e_write_phy_reg_m88, | 1413 | .write_phy_reg = e1000e_write_phy_reg_m88, |
1414 | .cfg_on_link_up = NULL, | ||
1413 | }; | 1415 | }; |
1414 | 1416 | ||
1415 | static struct e1000_phy_operations e82_phy_ops_bm = { | 1417 | static struct e1000_phy_operations e82_phy_ops_bm = { |
@@ -1426,6 +1428,7 @@ static struct e1000_phy_operations e82_phy_ops_bm = { | |||
1426 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, | 1428 | .set_d0_lplu_state = e1000_set_d0_lplu_state_82571, |
1427 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, | 1429 | .set_d3_lplu_state = e1000e_set_d3_lplu_state, |
1428 | .write_phy_reg = e1000e_write_phy_reg_bm2, | 1430 | .write_phy_reg = e1000e_write_phy_reg_bm2, |
1431 | .cfg_on_link_up = NULL, | ||
1429 | }; | 1432 | }; |
1430 | 1433 | ||
1431 | static struct e1000_nvm_operations e82571_nvm_ops = { | 1434 | static struct e1000_nvm_operations e82571_nvm_ops = { |