diff options
author | Joe Perches <joe@perches.com> | 2008-03-21 14:06:25 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2008-03-26 00:17:42 -0400 |
commit | c3033b01d763aff572080db09ddcebed115b9cf5 (patch) | |
tree | b75bb33ba85185c9d6775ceafad09a103f643b35 /drivers/net/e1000 | |
parent | f89e6e3834035c6e8203042f3527931aa7f52496 (diff) |
e1000: Convert boolean_t to bool
On Thu, 2008-03-06 at 10:07 -0800, Kok, Auke wrote:
> send me a patch for e1000 and for ixgb and I'll happily apply those :)
boolean_t to bool
TRUE to true
FALSE to false
comment typo ahread to ahead
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/e1000')
-rw-r--r-- | drivers/net/e1000/e1000.h | 26 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_ethtool.c | 17 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_hw.c | 223 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_hw.h | 62 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_main.c | 90 | ||||
-rw-r--r-- | drivers/net/e1000/e1000_osdep.h | 7 |
6 files changed, 209 insertions, 216 deletions
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h index 3b840283a9c3..d73a6c1fbcff 100644 --- a/drivers/net/e1000/e1000.h +++ b/drivers/net/e1000/e1000.h | |||
@@ -188,7 +188,7 @@ struct e1000_tx_ring { | |||
188 | spinlock_t tx_lock; | 188 | spinlock_t tx_lock; |
189 | uint16_t tdh; | 189 | uint16_t tdh; |
190 | uint16_t tdt; | 190 | uint16_t tdt; |
191 | boolean_t last_tx_tso; | 191 | bool last_tx_tso; |
192 | }; | 192 | }; |
193 | 193 | ||
194 | struct e1000_rx_ring { | 194 | struct e1000_rx_ring { |
@@ -283,17 +283,17 @@ struct e1000_adapter { | |||
283 | uint32_t tx_fifo_size; | 283 | uint32_t tx_fifo_size; |
284 | uint8_t tx_timeout_factor; | 284 | uint8_t tx_timeout_factor; |
285 | atomic_t tx_fifo_stall; | 285 | atomic_t tx_fifo_stall; |
286 | boolean_t pcix_82544; | 286 | bool pcix_82544; |
287 | boolean_t detect_tx_hung; | 287 | bool detect_tx_hung; |
288 | 288 | ||
289 | /* RX */ | 289 | /* RX */ |
290 | #ifdef CONFIG_E1000_NAPI | 290 | #ifdef CONFIG_E1000_NAPI |
291 | boolean_t (*clean_rx) (struct e1000_adapter *adapter, | 291 | bool (*clean_rx) (struct e1000_adapter *adapter, |
292 | struct e1000_rx_ring *rx_ring, | 292 | struct e1000_rx_ring *rx_ring, |
293 | int *work_done, int work_to_do); | 293 | int *work_done, int work_to_do); |
294 | #else | 294 | #else |
295 | boolean_t (*clean_rx) (struct e1000_adapter *adapter, | 295 | bool (*clean_rx) (struct e1000_adapter *adapter, |
296 | struct e1000_rx_ring *rx_ring); | 296 | struct e1000_rx_ring *rx_ring); |
297 | #endif | 297 | #endif |
298 | void (*alloc_rx_buf) (struct e1000_adapter *adapter, | 298 | void (*alloc_rx_buf) (struct e1000_adapter *adapter, |
299 | struct e1000_rx_ring *rx_ring, | 299 | struct e1000_rx_ring *rx_ring, |
@@ -312,7 +312,7 @@ struct e1000_adapter { | |||
312 | uint32_t alloc_rx_buff_failed; | 312 | uint32_t alloc_rx_buff_failed; |
313 | uint32_t rx_int_delay; | 313 | uint32_t rx_int_delay; |
314 | uint32_t rx_abs_int_delay; | 314 | uint32_t rx_abs_int_delay; |
315 | boolean_t rx_csum; | 315 | bool rx_csum; |
316 | unsigned int rx_ps_pages; | 316 | unsigned int rx_ps_pages; |
317 | uint32_t gorcl; | 317 | uint32_t gorcl; |
318 | uint64_t gorcl_old; | 318 | uint64_t gorcl_old; |
@@ -335,12 +335,12 @@ struct e1000_adapter { | |||
335 | struct e1000_rx_ring test_rx_ring; | 335 | struct e1000_rx_ring test_rx_ring; |
336 | 336 | ||
337 | int msg_enable; | 337 | int msg_enable; |
338 | boolean_t have_msi; | 338 | bool have_msi; |
339 | 339 | ||
340 | /* to not mess up cache alignment, always add to the bottom */ | 340 | /* to not mess up cache alignment, always add to the bottom */ |
341 | boolean_t tso_force; | 341 | bool tso_force; |
342 | boolean_t smart_power_down; /* phy smart power down */ | 342 | bool smart_power_down; /* phy smart power down */ |
343 | boolean_t quad_port_a; | 343 | bool quad_port_a; |
344 | unsigned long flags; | 344 | unsigned long flags; |
345 | uint32_t eeprom_wol; | 345 | uint32_t eeprom_wol; |
346 | }; | 346 | }; |
diff --git a/drivers/net/e1000/e1000_ethtool.c b/drivers/net/e1000/e1000_ethtool.c index 85e66f4c7886..05e1fb3cf49f 100644 --- a/drivers/net/e1000/e1000_ethtool.c +++ b/drivers/net/e1000/e1000_ethtool.c | |||
@@ -353,7 +353,7 @@ e1000_set_tso(struct net_device *netdev, uint32_t data) | |||
353 | netdev->features &= ~NETIF_F_TSO6; | 353 | netdev->features &= ~NETIF_F_TSO6; |
354 | 354 | ||
355 | DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled"); | 355 | DPRINTK(PROBE, INFO, "TSO is %s\n", data ? "Enabled" : "Disabled"); |
356 | adapter->tso_force = TRUE; | 356 | adapter->tso_force = true; |
357 | return 0; | 357 | return 0; |
358 | } | 358 | } |
359 | 359 | ||
@@ -922,7 +922,8 @@ static int | |||
922 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | 922 | e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) |
923 | { | 923 | { |
924 | struct net_device *netdev = adapter->netdev; | 924 | struct net_device *netdev = adapter->netdev; |
925 | uint32_t mask, i=0, shared_int = TRUE; | 925 | uint32_t mask, i = 0; |
926 | bool shared_int = true; | ||
926 | uint32_t irq = adapter->pdev->irq; | 927 | uint32_t irq = adapter->pdev->irq; |
927 | 928 | ||
928 | *data = 0; | 929 | *data = 0; |
@@ -931,7 +932,7 @@ e1000_intr_test(struct e1000_adapter *adapter, uint64_t *data) | |||
931 | /* Hook up test interrupt handler just for this test */ | 932 | /* Hook up test interrupt handler just for this test */ |
932 | if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, | 933 | if (!request_irq(irq, &e1000_test_intr, IRQF_PROBE_SHARED, netdev->name, |
933 | netdev)) | 934 | netdev)) |
934 | shared_int = FALSE; | 935 | shared_int = false; |
935 | else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, | 936 | else if (request_irq(irq, &e1000_test_intr, IRQF_SHARED, |
936 | netdev->name, netdev)) { | 937 | netdev->name, netdev)) { |
937 | *data = 1; | 938 | *data = 1; |
@@ -1295,7 +1296,7 @@ e1000_integrated_phy_loopback(struct e1000_adapter *adapter) | |||
1295 | uint32_t ctrl_reg = 0; | 1296 | uint32_t ctrl_reg = 0; |
1296 | uint32_t stat_reg = 0; | 1297 | uint32_t stat_reg = 0; |
1297 | 1298 | ||
1298 | adapter->hw.autoneg = FALSE; | 1299 | adapter->hw.autoneg = false; |
1299 | 1300 | ||
1300 | if (adapter->hw.phy_type == e1000_phy_m88) { | 1301 | if (adapter->hw.phy_type == e1000_phy_m88) { |
1301 | /* Auto-MDI/MDIX Off */ | 1302 | /* Auto-MDI/MDIX Off */ |
@@ -1473,7 +1474,7 @@ e1000_loopback_cleanup(struct e1000_adapter *adapter) | |||
1473 | case e1000_82545_rev_3: | 1474 | case e1000_82545_rev_3: |
1474 | case e1000_82546_rev_3: | 1475 | case e1000_82546_rev_3: |
1475 | default: | 1476 | default: |
1476 | hw->autoneg = TRUE; | 1477 | hw->autoneg = true; |
1477 | if (hw->phy_type == e1000_phy_gg82563) | 1478 | if (hw->phy_type == e1000_phy_gg82563) |
1478 | e1000_write_phy_reg(hw, | 1479 | e1000_write_phy_reg(hw, |
1479 | GG82563_PHY_KMRN_MODE_CTRL, | 1480 | GG82563_PHY_KMRN_MODE_CTRL, |
@@ -1607,13 +1608,13 @@ e1000_link_test(struct e1000_adapter *adapter, uint64_t *data) | |||
1607 | *data = 0; | 1608 | *data = 0; |
1608 | if (adapter->hw.media_type == e1000_media_type_internal_serdes) { | 1609 | if (adapter->hw.media_type == e1000_media_type_internal_serdes) { |
1609 | int i = 0; | 1610 | int i = 0; |
1610 | adapter->hw.serdes_link_down = TRUE; | 1611 | adapter->hw.serdes_link_down = true; |
1611 | 1612 | ||
1612 | /* On some blade server designs, link establishment | 1613 | /* On some blade server designs, link establishment |
1613 | * could take as long as 2-3 minutes */ | 1614 | * could take as long as 2-3 minutes */ |
1614 | do { | 1615 | do { |
1615 | e1000_check_for_link(&adapter->hw); | 1616 | e1000_check_for_link(&adapter->hw); |
1616 | if (adapter->hw.serdes_link_down == FALSE) | 1617 | if (!adapter->hw.serdes_link_down) |
1617 | return *data; | 1618 | return *data; |
1618 | msleep(20); | 1619 | msleep(20); |
1619 | } while (i++ < 3750); | 1620 | } while (i++ < 3750); |
@@ -1649,7 +1650,7 @@ e1000_diag_test(struct net_device *netdev, | |||
1649 | struct ethtool_test *eth_test, uint64_t *data) | 1650 | struct ethtool_test *eth_test, uint64_t *data) |
1650 | { | 1651 | { |
1651 | struct e1000_adapter *adapter = netdev_priv(netdev); | 1652 | struct e1000_adapter *adapter = netdev_priv(netdev); |
1652 | boolean_t if_running = netif_running(netdev); | 1653 | bool if_running = netif_running(netdev); |
1653 | 1654 | ||
1654 | set_bit(__E1000_TESTING, &adapter->flags); | 1655 | set_bit(__E1000_TESTING, &adapter->flags); |
1655 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { | 1656 | if (eth_test->flags == ETH_TEST_FL_OFFLINE) { |
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 7c6888c58c21..b64203458e9a 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -46,7 +46,8 @@ static int32_t e1000_check_polarity(struct e1000_hw *hw, e1000_rev_polarity *pol | |||
46 | static void e1000_clear_hw_cntrs(struct e1000_hw *hw); | 46 | static void e1000_clear_hw_cntrs(struct e1000_hw *hw); |
47 | static void e1000_clear_vfta(struct e1000_hw *hw); | 47 | static void e1000_clear_vfta(struct e1000_hw *hw); |
48 | static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw); | 48 | static int32_t e1000_commit_shadow_ram(struct e1000_hw *hw); |
49 | static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, boolean_t link_up); | 49 | static int32_t e1000_config_dsp_after_link_change(struct e1000_hw *hw, |
50 | bool link_up); | ||
50 | static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw); | 51 | static int32_t e1000_config_fc_after_link_up(struct e1000_hw *hw); |
51 | static int32_t e1000_detect_gig_phy(struct e1000_hw *hw); | 52 | static int32_t e1000_detect_gig_phy(struct e1000_hw *hw); |
52 | static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank); | 53 | static int32_t e1000_erase_ich8_4k_segment(struct e1000_hw *hw, uint32_t bank); |
@@ -62,7 +63,7 @@ static int32_t e1000_init_lcd_from_nvm_config_region(struct e1000_hw *hw, uint32 | |||
62 | static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw); | 63 | static int32_t e1000_init_lcd_from_nvm(struct e1000_hw *hw); |
63 | static void e1000_init_rx_addrs(struct e1000_hw *hw); | 64 | static void e1000_init_rx_addrs(struct e1000_hw *hw); |
64 | static void e1000_initialize_hardware_bits(struct e1000_hw *hw); | 65 | static void e1000_initialize_hardware_bits(struct e1000_hw *hw); |
65 | static boolean_t e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw); | 66 | static bool e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw); |
66 | static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw); | 67 | static int32_t e1000_kumeran_lock_loss_workaround(struct e1000_hw *hw); |
67 | static int32_t e1000_mng_enable_host_if(struct e1000_hw *hw); | 68 | static int32_t e1000_mng_enable_host_if(struct e1000_hw *hw); |
68 | static int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum); | 69 | static int32_t e1000_mng_host_if_write(struct e1000_hw *hw, uint8_t *buffer, uint16_t length, uint16_t offset, uint8_t *sum); |
@@ -84,8 +85,8 @@ static int32_t e1000_write_ich8_data(struct e1000_hw *hw, uint32_t index, uint32 | |||
84 | static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | 85 | static int32_t e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); |
85 | static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); | 86 | static int32_t e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, uint16_t *data); |
86 | static void e1000_release_software_flag(struct e1000_hw *hw); | 87 | static void e1000_release_software_flag(struct e1000_hw *hw); |
87 | static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, boolean_t active); | 88 | static int32_t e1000_set_d3_lplu_state(struct e1000_hw *hw, bool active); |
88 | static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, boolean_t active); | 89 | static int32_t e1000_set_d0_lplu_state(struct e1000_hw *hw, bool active); |
89 | static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop); | 90 | static int32_t e1000_set_pci_ex_no_snoop(struct e1000_hw *hw, uint32_t no_snoop); |
90 | static void e1000_set_pci_express_master_disable(struct e1000_hw *hw); | 91 | static void e1000_set_pci_express_master_disable(struct e1000_hw *hw); |
91 | static int32_t e1000_wait_autoneg(struct e1000_hw *hw); | 92 | static int32_t e1000_wait_autoneg(struct e1000_hw *hw); |
@@ -425,22 +426,22 @@ e1000_set_mac_type(struct e1000_hw *hw) | |||
425 | 426 | ||
426 | switch (hw->mac_type) { | 427 | switch (hw->mac_type) { |
427 | case e1000_ich8lan: | 428 | case e1000_ich8lan: |
428 | hw->swfwhw_semaphore_present = TRUE; | 429 | hw->swfwhw_semaphore_present = true; |
429 | hw->asf_firmware_present = TRUE; | 430 | hw->asf_firmware_present = true; |
430 | break; | 431 | break; |
431 | case e1000_80003es2lan: | 432 | case e1000_80003es2lan: |
432 | hw->swfw_sync_present = TRUE; | 433 | hw->swfw_sync_present = true; |
433 | /* fall through */ | 434 | /* fall through */ |
434 | case e1000_82571: | 435 | case e1000_82571: |
435 | case e1000_82572: | 436 | case e1000_82572: |
436 | case e1000_82573: | 437 | case e1000_82573: |
437 | hw->eeprom_semaphore_present = TRUE; | 438 | hw->eeprom_semaphore_present = true; |
438 | /* fall through */ | 439 | /* fall through */ |
439 | case e1000_82541: | 440 | case e1000_82541: |
440 | case e1000_82547: | 441 | case e1000_82547: |
441 | case e1000_82541_rev_2: | 442 | case e1000_82541_rev_2: |
442 | case e1000_82547_rev_2: | 443 | case e1000_82547_rev_2: |
443 | hw->asf_firmware_present = TRUE; | 444 | hw->asf_firmware_present = true; |
444 | break; | 445 | break; |
445 | default: | 446 | default: |
446 | break; | 447 | break; |
@@ -450,20 +451,20 @@ e1000_set_mac_type(struct e1000_hw *hw) | |||
450 | * FD mode | 451 | * FD mode |
451 | */ | 452 | */ |
452 | if (hw->mac_type == e1000_82543) | 453 | if (hw->mac_type == e1000_82543) |
453 | hw->bad_tx_carr_stats_fd = TRUE; | 454 | hw->bad_tx_carr_stats_fd = true; |
454 | 455 | ||
455 | /* capable of receiving management packets to the host */ | 456 | /* capable of receiving management packets to the host */ |
456 | if (hw->mac_type >= e1000_82571) | 457 | if (hw->mac_type >= e1000_82571) |
457 | hw->has_manc2h = TRUE; | 458 | hw->has_manc2h = true; |
458 | 459 | ||
459 | /* In rare occasions, ESB2 systems would end up started without | 460 | /* In rare occasions, ESB2 systems would end up started without |
460 | * the RX unit being turned on. | 461 | * the RX unit being turned on. |
461 | */ | 462 | */ |
462 | if (hw->mac_type == e1000_80003es2lan) | 463 | if (hw->mac_type == e1000_80003es2lan) |
463 | hw->rx_needs_kicking = TRUE; | 464 | hw->rx_needs_kicking = true; |
464 | 465 | ||
465 | if (hw->mac_type > e1000_82544) | 466 | if (hw->mac_type > e1000_82544) |
466 | hw->has_smbus = TRUE; | 467 | hw->has_smbus = true; |
467 | 468 | ||
468 | return E1000_SUCCESS; | 469 | return E1000_SUCCESS; |
469 | } | 470 | } |
@@ -482,7 +483,7 @@ e1000_set_media_type(struct e1000_hw *hw) | |||
482 | 483 | ||
483 | if (hw->mac_type != e1000_82543) { | 484 | if (hw->mac_type != e1000_82543) { |
484 | /* tbi_compatibility is only valid on 82543 */ | 485 | /* tbi_compatibility is only valid on 82543 */ |
485 | hw->tbi_compatibility_en = FALSE; | 486 | hw->tbi_compatibility_en = false; |
486 | } | 487 | } |
487 | 488 | ||
488 | switch (hw->device_id) { | 489 | switch (hw->device_id) { |
@@ -513,7 +514,7 @@ e1000_set_media_type(struct e1000_hw *hw) | |||
513 | if (status & E1000_STATUS_TBIMODE) { | 514 | if (status & E1000_STATUS_TBIMODE) { |
514 | hw->media_type = e1000_media_type_fiber; | 515 | hw->media_type = e1000_media_type_fiber; |
515 | /* tbi_compatibility not valid on fiber */ | 516 | /* tbi_compatibility not valid on fiber */ |
516 | hw->tbi_compatibility_en = FALSE; | 517 | hw->tbi_compatibility_en = false; |
517 | } else { | 518 | } else { |
518 | hw->media_type = e1000_media_type_copper; | 519 | hw->media_type = e1000_media_type_copper; |
519 | } | 520 | } |
@@ -569,7 +570,7 @@ e1000_reset_hw(struct e1000_hw *hw) | |||
569 | E1000_WRITE_FLUSH(hw); | 570 | E1000_WRITE_FLUSH(hw); |
570 | 571 | ||
571 | /* The tbi_compatibility_on Flag must be cleared when Rctl is cleared. */ | 572 | /* The tbi_compatibility_on Flag must be cleared when Rctl is cleared. */ |
572 | hw->tbi_compatibility_on = FALSE; | 573 | hw->tbi_compatibility_on = false; |
573 | 574 | ||
574 | /* Delay to allow any outstanding PCI transactions to complete before | 575 | /* Delay to allow any outstanding PCI transactions to complete before |
575 | * resetting the device | 576 | * resetting the device |
@@ -682,7 +683,7 @@ e1000_reset_hw(struct e1000_hw *hw) | |||
682 | msleep(20); | 683 | msleep(20); |
683 | break; | 684 | break; |
684 | case e1000_82573: | 685 | case e1000_82573: |
685 | if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) { | 686 | if (!e1000_is_onboard_nvm_eeprom(hw)) { |
686 | udelay(10); | 687 | udelay(10); |
687 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); | 688 | ctrl_ext = E1000_READ_REG(hw, CTRL_EXT); |
688 | ctrl_ext |= E1000_CTRL_EXT_EE_RST; | 689 | ctrl_ext |= E1000_CTRL_EXT_EE_RST; |
@@ -1428,7 +1429,7 @@ e1000_copper_link_preconfig(struct e1000_hw *hw) | |||
1428 | if (hw->mac_type <= e1000_82543 || | 1429 | if (hw->mac_type <= e1000_82543 || |
1429 | hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || | 1430 | hw->mac_type == e1000_82541 || hw->mac_type == e1000_82547 || |
1430 | hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2) | 1431 | hw->mac_type == e1000_82541_rev_2 || hw->mac_type == e1000_82547_rev_2) |
1431 | hw->phy_reset_disable = FALSE; | 1432 | hw->phy_reset_disable = false; |
1432 | 1433 | ||
1433 | return E1000_SUCCESS; | 1434 | return E1000_SUCCESS; |
1434 | } | 1435 | } |
@@ -1470,7 +1471,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) | |||
1470 | /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */ | 1471 | /* The NVM settings will configure LPLU in D3 for IGP2 and IGP3 PHYs */ |
1471 | if (hw->phy_type == e1000_phy_igp) { | 1472 | if (hw->phy_type == e1000_phy_igp) { |
1472 | /* disable lplu d3 during driver init */ | 1473 | /* disable lplu d3 during driver init */ |
1473 | ret_val = e1000_set_d3_lplu_state(hw, FALSE); | 1474 | ret_val = e1000_set_d3_lplu_state(hw, false); |
1474 | if (ret_val) { | 1475 | if (ret_val) { |
1475 | DEBUGOUT("Error Disabling LPLU D3\n"); | 1476 | DEBUGOUT("Error Disabling LPLU D3\n"); |
1476 | return ret_val; | 1477 | return ret_val; |
@@ -1478,7 +1479,7 @@ e1000_copper_link_igp_setup(struct e1000_hw *hw) | |||
1478 | } | 1479 | } |
1479 | 1480 | ||
1480 | /* disable lplu d0 during driver init */ | 1481 | /* disable lplu d0 during driver init */ |
1481 | ret_val = e1000_set_d0_lplu_state(hw, FALSE); | 1482 | ret_val = e1000_set_d0_lplu_state(hw, false); |
1482 | if (ret_val) { | 1483 | if (ret_val) { |
1483 | DEBUGOUT("Error Disabling LPLU D0\n"); | 1484 | DEBUGOUT("Error Disabling LPLU D0\n"); |
1484 | return ret_val; | 1485 | return ret_val; |
@@ -1691,7 +1692,7 @@ e1000_copper_link_ggp_setup(struct e1000_hw *hw) | |||
1691 | * firmware will have already initialized them. We only initialize | 1692 | * firmware will have already initialized them. We only initialize |
1692 | * them if the HW is not in IAMT mode. | 1693 | * them if the HW is not in IAMT mode. |
1693 | */ | 1694 | */ |
1694 | if (e1000_check_mng_mode(hw) == FALSE) { | 1695 | if (!e1000_check_mng_mode(hw)) { |
1695 | /* Enable Electrical Idle on the PHY */ | 1696 | /* Enable Electrical Idle on the PHY */ |
1696 | phy_data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE; | 1697 | phy_data |= GG82563_PMCR_ENABLE_ELECTRICAL_IDLE; |
1697 | ret_val = e1000_write_phy_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, | 1698 | ret_val = e1000_write_phy_reg(hw, GG82563_PHY_PWR_MGMT_CTRL, |
@@ -1892,7 +1893,7 @@ e1000_copper_link_autoneg(struct e1000_hw *hw) | |||
1892 | } | 1893 | } |
1893 | } | 1894 | } |
1894 | 1895 | ||
1895 | hw->get_link_status = TRUE; | 1896 | hw->get_link_status = true; |
1896 | 1897 | ||
1897 | return E1000_SUCCESS; | 1898 | return E1000_SUCCESS; |
1898 | } | 1899 | } |
@@ -1932,7 +1933,7 @@ e1000_copper_link_postconfig(struct e1000_hw *hw) | |||
1932 | 1933 | ||
1933 | /* Config DSP to improve Giga link quality */ | 1934 | /* Config DSP to improve Giga link quality */ |
1934 | if (hw->phy_type == e1000_phy_igp) { | 1935 | if (hw->phy_type == e1000_phy_igp) { |
1935 | ret_val = e1000_config_dsp_after_link_change(hw, TRUE); | 1936 | ret_val = e1000_config_dsp_after_link_change(hw, true); |
1936 | if (ret_val) { | 1937 | if (ret_val) { |
1937 | DEBUGOUT("Error Configuring DSP after link up\n"); | 1938 | DEBUGOUT("Error Configuring DSP after link up\n"); |
1938 | return ret_val; | 1939 | return ret_val; |
@@ -2923,7 +2924,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2923 | if (hw->media_type == e1000_media_type_fiber) { | 2924 | if (hw->media_type == e1000_media_type_fiber) { |
2924 | signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; | 2925 | signal = (hw->mac_type > e1000_82544) ? E1000_CTRL_SWDPIN1 : 0; |
2925 | if (status & E1000_STATUS_LU) | 2926 | if (status & E1000_STATUS_LU) |
2926 | hw->get_link_status = FALSE; | 2927 | hw->get_link_status = false; |
2927 | } | 2928 | } |
2928 | } | 2929 | } |
2929 | 2930 | ||
@@ -2947,7 +2948,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2947 | return ret_val; | 2948 | return ret_val; |
2948 | 2949 | ||
2949 | if (phy_data & MII_SR_LINK_STATUS) { | 2950 | if (phy_data & MII_SR_LINK_STATUS) { |
2950 | hw->get_link_status = FALSE; | 2951 | hw->get_link_status = false; |
2951 | /* Check if there was DownShift, must be checked immediately after | 2952 | /* Check if there was DownShift, must be checked immediately after |
2952 | * link-up */ | 2953 | * link-up */ |
2953 | e1000_check_downshift(hw); | 2954 | e1000_check_downshift(hw); |
@@ -2973,7 +2974,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2973 | 2974 | ||
2974 | } else { | 2975 | } else { |
2975 | /* No link detected */ | 2976 | /* No link detected */ |
2976 | e1000_config_dsp_after_link_change(hw, FALSE); | 2977 | e1000_config_dsp_after_link_change(hw, false); |
2977 | return 0; | 2978 | return 0; |
2978 | } | 2979 | } |
2979 | 2980 | ||
@@ -2983,7 +2984,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
2983 | if (!hw->autoneg) return -E1000_ERR_CONFIG; | 2984 | if (!hw->autoneg) return -E1000_ERR_CONFIG; |
2984 | 2985 | ||
2985 | /* optimize the dsp settings for the igp phy */ | 2986 | /* optimize the dsp settings for the igp phy */ |
2986 | e1000_config_dsp_after_link_change(hw, TRUE); | 2987 | e1000_config_dsp_after_link_change(hw, true); |
2987 | 2988 | ||
2988 | /* We have a M88E1000 PHY and Auto-Neg is enabled. If we | 2989 | /* We have a M88E1000 PHY and Auto-Neg is enabled. If we |
2989 | * have Si on board that is 82544 or newer, Auto | 2990 | * have Si on board that is 82544 or newer, Auto |
@@ -3036,7 +3037,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
3036 | rctl = E1000_READ_REG(hw, RCTL); | 3037 | rctl = E1000_READ_REG(hw, RCTL); |
3037 | rctl &= ~E1000_RCTL_SBP; | 3038 | rctl &= ~E1000_RCTL_SBP; |
3038 | E1000_WRITE_REG(hw, RCTL, rctl); | 3039 | E1000_WRITE_REG(hw, RCTL, rctl); |
3039 | hw->tbi_compatibility_on = FALSE; | 3040 | hw->tbi_compatibility_on = false; |
3040 | } | 3041 | } |
3041 | } else { | 3042 | } else { |
3042 | /* If TBI compatibility is was previously off, turn it on. For | 3043 | /* If TBI compatibility is was previously off, turn it on. For |
@@ -3045,7 +3046,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
3045 | * will look like CRC errors to to the hardware. | 3046 | * will look like CRC errors to to the hardware. |
3046 | */ | 3047 | */ |
3047 | if (!hw->tbi_compatibility_on) { | 3048 | if (!hw->tbi_compatibility_on) { |
3048 | hw->tbi_compatibility_on = TRUE; | 3049 | hw->tbi_compatibility_on = true; |
3049 | rctl = E1000_READ_REG(hw, RCTL); | 3050 | rctl = E1000_READ_REG(hw, RCTL); |
3050 | rctl |= E1000_RCTL_SBP; | 3051 | rctl |= E1000_RCTL_SBP; |
3051 | E1000_WRITE_REG(hw, RCTL, rctl); | 3052 | E1000_WRITE_REG(hw, RCTL, rctl); |
@@ -3098,7 +3099,7 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
3098 | E1000_WRITE_REG(hw, TXCW, hw->txcw); | 3099 | E1000_WRITE_REG(hw, TXCW, hw->txcw); |
3099 | E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU)); | 3100 | E1000_WRITE_REG(hw, CTRL, (ctrl & ~E1000_CTRL_SLU)); |
3100 | 3101 | ||
3101 | hw->serdes_link_down = FALSE; | 3102 | hw->serdes_link_down = false; |
3102 | } | 3103 | } |
3103 | /* If we force link for non-auto-negotiation switch, check link status | 3104 | /* If we force link for non-auto-negotiation switch, check link status |
3104 | * based on MAC synchronization for internal serdes media type. | 3105 | * based on MAC synchronization for internal serdes media type. |
@@ -3109,11 +3110,11 @@ e1000_check_for_link(struct e1000_hw *hw) | |||
3109 | udelay(10); | 3110 | udelay(10); |
3110 | if (E1000_RXCW_SYNCH & E1000_READ_REG(hw, RXCW)) { | 3111 | if (E1000_RXCW_SYNCH & E1000_READ_REG(hw, RXCW)) { |
3111 | if (!(rxcw & E1000_RXCW_IV)) { | 3112 | if (!(rxcw & E1000_RXCW_IV)) { |
3112 | hw->serdes_link_down = FALSE; | 3113 | hw->serdes_link_down = false; |
3113 | DEBUGOUT("SERDES: Link is up.\n"); | 3114 | DEBUGOUT("SERDES: Link is up.\n"); |
3114 | } | 3115 | } |
3115 | } else { | 3116 | } else { |
3116 | hw->serdes_link_down = TRUE; | 3117 | hw->serdes_link_down = true; |
3117 | DEBUGOUT("SERDES: Link is down.\n"); | 3118 | DEBUGOUT("SERDES: Link is down.\n"); |
3118 | } | 3119 | } |
3119 | } | 3120 | } |
@@ -4044,7 +4045,7 @@ e1000_detect_gig_phy(struct e1000_hw *hw) | |||
4044 | { | 4045 | { |
4045 | int32_t phy_init_status, ret_val; | 4046 | int32_t phy_init_status, ret_val; |
4046 | uint16_t phy_id_high, phy_id_low; | 4047 | uint16_t phy_id_high, phy_id_low; |
4047 | boolean_t match = FALSE; | 4048 | bool match = false; |
4048 | 4049 | ||
4049 | DEBUGFUNC("e1000_detect_gig_phy"); | 4050 | DEBUGFUNC("e1000_detect_gig_phy"); |
4050 | 4051 | ||
@@ -4086,35 +4087,35 @@ e1000_detect_gig_phy(struct e1000_hw *hw) | |||
4086 | 4087 | ||
4087 | switch (hw->mac_type) { | 4088 | switch (hw->mac_type) { |
4088 | case e1000_82543: | 4089 | case e1000_82543: |
4089 | if (hw->phy_id == M88E1000_E_PHY_ID) match = TRUE; | 4090 | if (hw->phy_id == M88E1000_E_PHY_ID) match = true; |
4090 | break; | 4091 | break; |
4091 | case e1000_82544: | 4092 | case e1000_82544: |
4092 | if (hw->phy_id == M88E1000_I_PHY_ID) match = TRUE; | 4093 | if (hw->phy_id == M88E1000_I_PHY_ID) match = true; |
4093 | break; | 4094 | break; |
4094 | case e1000_82540: | 4095 | case e1000_82540: |
4095 | case e1000_82545: | 4096 | case e1000_82545: |
4096 | case e1000_82545_rev_3: | 4097 | case e1000_82545_rev_3: |
4097 | case e1000_82546: | 4098 | case e1000_82546: |
4098 | case e1000_82546_rev_3: | 4099 | case e1000_82546_rev_3: |
4099 | if (hw->phy_id == M88E1011_I_PHY_ID) match = TRUE; | 4100 | if (hw->phy_id == M88E1011_I_PHY_ID) match = true; |
4100 | break; | 4101 | break; |
4101 | case e1000_82541: | 4102 | case e1000_82541: |
4102 | case e1000_82541_rev_2: | 4103 | case e1000_82541_rev_2: |
4103 | case e1000_82547: | 4104 | case e1000_82547: |
4104 | case e1000_82547_rev_2: | 4105 | case e1000_82547_rev_2: |
4105 | if (hw->phy_id == IGP01E1000_I_PHY_ID) match = TRUE; | 4106 | if (hw->phy_id == IGP01E1000_I_PHY_ID) match = true; |
4106 | break; | 4107 | break; |
4107 | case e1000_82573: | 4108 | case e1000_82573: |
4108 | if (hw->phy_id == M88E1111_I_PHY_ID) match = TRUE; | 4109 | if (hw->phy_id == M88E1111_I_PHY_ID) match = true; |
4109 | break; | 4110 | break; |
4110 | case e1000_80003es2lan: | 4111 | case e1000_80003es2lan: |
4111 | if (hw->phy_id == GG82563_E_PHY_ID) match = TRUE; | 4112 | if (hw->phy_id == GG82563_E_PHY_ID) match = true; |
4112 | break; | 4113 | break; |
4113 | case e1000_ich8lan: | 4114 | case e1000_ich8lan: |
4114 | if (hw->phy_id == IGP03E1000_E_PHY_ID) match = TRUE; | 4115 | if (hw->phy_id == IGP03E1000_E_PHY_ID) match = true; |
4115 | if (hw->phy_id == IFE_E_PHY_ID) match = TRUE; | 4116 | if (hw->phy_id == IFE_E_PHY_ID) match = true; |
4116 | if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = TRUE; | 4117 | if (hw->phy_id == IFE_PLUS_E_PHY_ID) match = true; |
4117 | if (hw->phy_id == IFE_C_E_PHY_ID) match = TRUE; | 4118 | if (hw->phy_id == IFE_C_E_PHY_ID) match = true; |
4118 | break; | 4119 | break; |
4119 | default: | 4120 | default: |
4120 | DEBUGOUT1("Invalid MAC type %d\n", hw->mac_type); | 4121 | DEBUGOUT1("Invalid MAC type %d\n", hw->mac_type); |
@@ -4455,8 +4456,8 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4455 | eeprom->opcode_bits = 3; | 4456 | eeprom->opcode_bits = 3; |
4456 | eeprom->address_bits = 6; | 4457 | eeprom->address_bits = 6; |
4457 | eeprom->delay_usec = 50; | 4458 | eeprom->delay_usec = 50; |
4458 | eeprom->use_eerd = FALSE; | 4459 | eeprom->use_eerd = false; |
4459 | eeprom->use_eewr = FALSE; | 4460 | eeprom->use_eewr = false; |
4460 | break; | 4461 | break; |
4461 | case e1000_82540: | 4462 | case e1000_82540: |
4462 | case e1000_82545: | 4463 | case e1000_82545: |
@@ -4473,8 +4474,8 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4473 | eeprom->word_size = 64; | 4474 | eeprom->word_size = 64; |
4474 | eeprom->address_bits = 6; | 4475 | eeprom->address_bits = 6; |
4475 | } | 4476 | } |
4476 | eeprom->use_eerd = FALSE; | 4477 | eeprom->use_eerd = false; |
4477 | eeprom->use_eewr = FALSE; | 4478 | eeprom->use_eewr = false; |
4478 | break; | 4479 | break; |
4479 | case e1000_82541: | 4480 | case e1000_82541: |
4480 | case e1000_82541_rev_2: | 4481 | case e1000_82541_rev_2: |
@@ -4503,8 +4504,8 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4503 | eeprom->address_bits = 6; | 4504 | eeprom->address_bits = 6; |
4504 | } | 4505 | } |
4505 | } | 4506 | } |
4506 | eeprom->use_eerd = FALSE; | 4507 | eeprom->use_eerd = false; |
4507 | eeprom->use_eewr = FALSE; | 4508 | eeprom->use_eewr = false; |
4508 | break; | 4509 | break; |
4509 | case e1000_82571: | 4510 | case e1000_82571: |
4510 | case e1000_82572: | 4511 | case e1000_82572: |
@@ -4518,8 +4519,8 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4518 | eeprom->page_size = 8; | 4519 | eeprom->page_size = 8; |
4519 | eeprom->address_bits = 8; | 4520 | eeprom->address_bits = 8; |
4520 | } | 4521 | } |
4521 | eeprom->use_eerd = FALSE; | 4522 | eeprom->use_eerd = false; |
4522 | eeprom->use_eewr = FALSE; | 4523 | eeprom->use_eewr = false; |
4523 | break; | 4524 | break; |
4524 | case e1000_82573: | 4525 | case e1000_82573: |
4525 | eeprom->type = e1000_eeprom_spi; | 4526 | eeprom->type = e1000_eeprom_spi; |
@@ -4532,9 +4533,9 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4532 | eeprom->page_size = 8; | 4533 | eeprom->page_size = 8; |
4533 | eeprom->address_bits = 8; | 4534 | eeprom->address_bits = 8; |
4534 | } | 4535 | } |
4535 | eeprom->use_eerd = TRUE; | 4536 | eeprom->use_eerd = true; |
4536 | eeprom->use_eewr = TRUE; | 4537 | eeprom->use_eewr = true; |
4537 | if (e1000_is_onboard_nvm_eeprom(hw) == FALSE) { | 4538 | if (!e1000_is_onboard_nvm_eeprom(hw)) { |
4538 | eeprom->type = e1000_eeprom_flash; | 4539 | eeprom->type = e1000_eeprom_flash; |
4539 | eeprom->word_size = 2048; | 4540 | eeprom->word_size = 2048; |
4540 | 4541 | ||
@@ -4555,8 +4556,8 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4555 | eeprom->page_size = 8; | 4556 | eeprom->page_size = 8; |
4556 | eeprom->address_bits = 8; | 4557 | eeprom->address_bits = 8; |
4557 | } | 4558 | } |
4558 | eeprom->use_eerd = TRUE; | 4559 | eeprom->use_eerd = true; |
4559 | eeprom->use_eewr = FALSE; | 4560 | eeprom->use_eewr = false; |
4560 | break; | 4561 | break; |
4561 | case e1000_ich8lan: | 4562 | case e1000_ich8lan: |
4562 | { | 4563 | { |
@@ -4564,15 +4565,15 @@ e1000_init_eeprom_params(struct e1000_hw *hw) | |||
4564 | uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_GFPREG); | 4565 | uint32_t flash_size = E1000_READ_ICH_FLASH_REG(hw, ICH_FLASH_GFPREG); |
4565 | 4566 | ||
4566 | eeprom->type = e1000_eeprom_ich8; | 4567 | eeprom->type = e1000_eeprom_ich8; |
4567 | eeprom->use_eerd = FALSE; | 4568 | eeprom->use_eerd = false; |
4568 | eeprom->use_eewr = FALSE; | 4569 | eeprom->use_eewr = false; |
4569 | eeprom->word_size = E1000_SHADOW_RAM_WORDS; | 4570 | eeprom->word_size = E1000_SHADOW_RAM_WORDS; |
4570 | 4571 | ||
4571 | /* Zero the shadow RAM structure. But don't load it from NVM | 4572 | /* Zero the shadow RAM structure. But don't load it from NVM |
4572 | * so as to save time for driver init */ | 4573 | * so as to save time for driver init */ |
4573 | if (hw->eeprom_shadow_ram != NULL) { | 4574 | if (hw->eeprom_shadow_ram != NULL) { |
4574 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { | 4575 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { |
4575 | hw->eeprom_shadow_ram[i].modified = FALSE; | 4576 | hw->eeprom_shadow_ram[i].modified = false; |
4576 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; | 4577 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; |
4577 | } | 4578 | } |
4578 | } | 4579 | } |
@@ -4994,15 +4995,14 @@ e1000_read_eeprom(struct e1000_hw *hw, | |||
4994 | * directly. In this case, we need to acquire the EEPROM so that | 4995 | * directly. In this case, we need to acquire the EEPROM so that |
4995 | * FW or other port software does not interrupt. | 4996 | * FW or other port software does not interrupt. |
4996 | */ | 4997 | */ |
4997 | if (e1000_is_onboard_nvm_eeprom(hw) == TRUE && | 4998 | if (e1000_is_onboard_nvm_eeprom(hw) && !hw->eeprom.use_eerd) { |
4998 | hw->eeprom.use_eerd == FALSE) { | ||
4999 | /* Prepare the EEPROM for bit-bang reading */ | 4999 | /* Prepare the EEPROM for bit-bang reading */ |
5000 | if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) | 5000 | if (e1000_acquire_eeprom(hw) != E1000_SUCCESS) |
5001 | return -E1000_ERR_EEPROM; | 5001 | return -E1000_ERR_EEPROM; |
5002 | } | 5002 | } |
5003 | 5003 | ||
5004 | /* Eerd register EEPROM access requires no eeprom aquire/release */ | 5004 | /* Eerd register EEPROM access requires no eeprom aquire/release */ |
5005 | if (eeprom->use_eerd == TRUE) | 5005 | if (eeprom->use_eerd) |
5006 | return e1000_read_eeprom_eerd(hw, offset, words, data); | 5006 | return e1000_read_eeprom_eerd(hw, offset, words, data); |
5007 | 5007 | ||
5008 | /* ICH EEPROM access is done via the ICH flash controller */ | 5008 | /* ICH EEPROM access is done via the ICH flash controller */ |
@@ -5171,7 +5171,7 @@ e1000_poll_eerd_eewr_done(struct e1000_hw *hw, int eerd) | |||
5171 | * | 5171 | * |
5172 | * hw - Struct containing variables accessed by shared code | 5172 | * hw - Struct containing variables accessed by shared code |
5173 | ****************************************************************************/ | 5173 | ****************************************************************************/ |
5174 | static boolean_t | 5174 | static bool |
5175 | e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) | 5175 | e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) |
5176 | { | 5176 | { |
5177 | uint32_t eecd = 0; | 5177 | uint32_t eecd = 0; |
@@ -5179,7 +5179,7 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) | |||
5179 | DEBUGFUNC("e1000_is_onboard_nvm_eeprom"); | 5179 | DEBUGFUNC("e1000_is_onboard_nvm_eeprom"); |
5180 | 5180 | ||
5181 | if (hw->mac_type == e1000_ich8lan) | 5181 | if (hw->mac_type == e1000_ich8lan) |
5182 | return FALSE; | 5182 | return false; |
5183 | 5183 | ||
5184 | if (hw->mac_type == e1000_82573) { | 5184 | if (hw->mac_type == e1000_82573) { |
5185 | eecd = E1000_READ_REG(hw, EECD); | 5185 | eecd = E1000_READ_REG(hw, EECD); |
@@ -5189,10 +5189,10 @@ e1000_is_onboard_nvm_eeprom(struct e1000_hw *hw) | |||
5189 | 5189 | ||
5190 | /* If both bits are set, device is Flash type */ | 5190 | /* If both bits are set, device is Flash type */ |
5191 | if (eecd == 0x03) { | 5191 | if (eecd == 0x03) { |
5192 | return FALSE; | 5192 | return false; |
5193 | } | 5193 | } |
5194 | } | 5194 | } |
5195 | return TRUE; | 5195 | return true; |
5196 | } | 5196 | } |
5197 | 5197 | ||
5198 | /****************************************************************************** | 5198 | /****************************************************************************** |
@@ -5212,8 +5212,7 @@ e1000_validate_eeprom_checksum(struct e1000_hw *hw) | |||
5212 | 5212 | ||
5213 | DEBUGFUNC("e1000_validate_eeprom_checksum"); | 5213 | DEBUGFUNC("e1000_validate_eeprom_checksum"); |
5214 | 5214 | ||
5215 | if ((hw->mac_type == e1000_82573) && | 5215 | if ((hw->mac_type == e1000_82573) && !e1000_is_onboard_nvm_eeprom(hw)) { |
5216 | (e1000_is_onboard_nvm_eeprom(hw) == FALSE)) { | ||
5217 | /* Check bit 4 of word 10h. If it is 0, firmware is done updating | 5216 | /* Check bit 4 of word 10h. If it is 0, firmware is done updating |
5218 | * 10h-12h. Checksum may need to be fixed. */ | 5217 | * 10h-12h. Checksum may need to be fixed. */ |
5219 | e1000_read_eeprom(hw, 0x10, 1, &eeprom_data); | 5218 | e1000_read_eeprom(hw, 0x10, 1, &eeprom_data); |
@@ -5339,7 +5338,7 @@ e1000_write_eeprom(struct e1000_hw *hw, | |||
5339 | } | 5338 | } |
5340 | 5339 | ||
5341 | /* 82573 writes only through eewr */ | 5340 | /* 82573 writes only through eewr */ |
5342 | if (eeprom->use_eewr == TRUE) | 5341 | if (eeprom->use_eewr) |
5343 | return e1000_write_eeprom_eewr(hw, offset, words, data); | 5342 | return e1000_write_eeprom_eewr(hw, offset, words, data); |
5344 | 5343 | ||
5345 | if (eeprom->type == e1000_eeprom_ich8) | 5344 | if (eeprom->type == e1000_eeprom_ich8) |
@@ -5536,7 +5535,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5536 | uint32_t new_bank_offset = 0; | 5535 | uint32_t new_bank_offset = 0; |
5537 | uint8_t low_byte = 0; | 5536 | uint8_t low_byte = 0; |
5538 | uint8_t high_byte = 0; | 5537 | uint8_t high_byte = 0; |
5539 | boolean_t sector_write_failed = FALSE; | 5538 | bool sector_write_failed = false; |
5540 | 5539 | ||
5541 | if (hw->mac_type == e1000_82573) { | 5540 | if (hw->mac_type == e1000_82573) { |
5542 | /* The flop register will be used to determine if flash type is STM */ | 5541 | /* The flop register will be used to determine if flash type is STM */ |
@@ -5588,21 +5587,21 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5588 | e1000_erase_ich8_4k_segment(hw, 0); | 5587 | e1000_erase_ich8_4k_segment(hw, 0); |
5589 | } | 5588 | } |
5590 | 5589 | ||
5591 | sector_write_failed = FALSE; | 5590 | sector_write_failed = false; |
5592 | /* Loop for every byte in the shadow RAM, | 5591 | /* Loop for every byte in the shadow RAM, |
5593 | * which is in units of words. */ | 5592 | * which is in units of words. */ |
5594 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { | 5593 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { |
5595 | /* Determine whether to write the value stored | 5594 | /* Determine whether to write the value stored |
5596 | * in the other NVM bank or a modified value stored | 5595 | * in the other NVM bank or a modified value stored |
5597 | * in the shadow RAM */ | 5596 | * in the shadow RAM */ |
5598 | if (hw->eeprom_shadow_ram[i].modified == TRUE) { | 5597 | if (hw->eeprom_shadow_ram[i].modified) { |
5599 | low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word; | 5598 | low_byte = (uint8_t)hw->eeprom_shadow_ram[i].eeprom_word; |
5600 | udelay(100); | 5599 | udelay(100); |
5601 | error = e1000_verify_write_ich8_byte(hw, | 5600 | error = e1000_verify_write_ich8_byte(hw, |
5602 | (i << 1) + new_bank_offset, low_byte); | 5601 | (i << 1) + new_bank_offset, low_byte); |
5603 | 5602 | ||
5604 | if (error != E1000_SUCCESS) | 5603 | if (error != E1000_SUCCESS) |
5605 | sector_write_failed = TRUE; | 5604 | sector_write_failed = true; |
5606 | else { | 5605 | else { |
5607 | high_byte = | 5606 | high_byte = |
5608 | (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); | 5607 | (uint8_t)(hw->eeprom_shadow_ram[i].eeprom_word >> 8); |
@@ -5616,7 +5615,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5616 | (i << 1) + new_bank_offset, low_byte); | 5615 | (i << 1) + new_bank_offset, low_byte); |
5617 | 5616 | ||
5618 | if (error != E1000_SUCCESS) | 5617 | if (error != E1000_SUCCESS) |
5619 | sector_write_failed = TRUE; | 5618 | sector_write_failed = true; |
5620 | else { | 5619 | else { |
5621 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1, | 5620 | e1000_read_ich8_byte(hw, (i << 1) + old_bank_offset + 1, |
5622 | &high_byte); | 5621 | &high_byte); |
@@ -5624,10 +5623,10 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5624 | } | 5623 | } |
5625 | } | 5624 | } |
5626 | 5625 | ||
5627 | /* If the write of the low byte was successful, go ahread and | 5626 | /* If the write of the low byte was successful, go ahead and |
5628 | * write the high byte while checking to make sure that if it | 5627 | * write the high byte while checking to make sure that if it |
5629 | * is the signature byte, then it is handled properly */ | 5628 | * is the signature byte, then it is handled properly */ |
5630 | if (sector_write_failed == FALSE) { | 5629 | if (!sector_write_failed) { |
5631 | /* If the word is 0x13, then make sure the signature bits | 5630 | /* If the word is 0x13, then make sure the signature bits |
5632 | * (15:14) are 11b until the commit has completed. | 5631 | * (15:14) are 11b until the commit has completed. |
5633 | * This will allow us to write 10b which indicates the | 5632 | * This will allow us to write 10b which indicates the |
@@ -5640,7 +5639,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5640 | error = e1000_verify_write_ich8_byte(hw, | 5639 | error = e1000_verify_write_ich8_byte(hw, |
5641 | (i << 1) + new_bank_offset + 1, high_byte); | 5640 | (i << 1) + new_bank_offset + 1, high_byte); |
5642 | if (error != E1000_SUCCESS) | 5641 | if (error != E1000_SUCCESS) |
5643 | sector_write_failed = TRUE; | 5642 | sector_write_failed = true; |
5644 | 5643 | ||
5645 | } else { | 5644 | } else { |
5646 | /* If the write failed then break from the loop and | 5645 | /* If the write failed then break from the loop and |
@@ -5651,7 +5650,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5651 | 5650 | ||
5652 | /* Don't bother writing the segment valid bits if sector | 5651 | /* Don't bother writing the segment valid bits if sector |
5653 | * programming failed. */ | 5652 | * programming failed. */ |
5654 | if (sector_write_failed == FALSE) { | 5653 | if (!sector_write_failed) { |
5655 | /* Finally validate the new segment by setting bit 15:14 | 5654 | /* Finally validate the new segment by setting bit 15:14 |
5656 | * to 10b in word 0x13 , this can be done without an | 5655 | * to 10b in word 0x13 , this can be done without an |
5657 | * erase as well since these bits are 11 to start with | 5656 | * erase as well since these bits are 11 to start with |
@@ -5673,7 +5672,7 @@ e1000_commit_shadow_ram(struct e1000_hw *hw) | |||
5673 | 5672 | ||
5674 | /* Clear the now not used entry in the cache */ | 5673 | /* Clear the now not used entry in the cache */ |
5675 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { | 5674 | for (i = 0; i < E1000_SHADOW_RAM_WORDS; i++) { |
5676 | hw->eeprom_shadow_ram[i].modified = FALSE; | 5675 | hw->eeprom_shadow_ram[i].modified = false; |
5677 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; | 5676 | hw->eeprom_shadow_ram[i].eeprom_word = 0xFFFF; |
5678 | } | 5677 | } |
5679 | } | 5678 | } |
@@ -5750,7 +5749,7 @@ e1000_init_rx_addrs(struct e1000_hw *hw) | |||
5750 | /* Reserve a spot for the Locally Administered Address to work around | 5749 | /* Reserve a spot for the Locally Administered Address to work around |
5751 | * an 82571 issue in which a reset on one port will reload the MAC on | 5750 | * an 82571 issue in which a reset on one port will reload the MAC on |
5752 | * the other port. */ | 5751 | * the other port. */ |
5753 | if ((hw->mac_type == e1000_82571) && (hw->laa_is_present == TRUE)) | 5752 | if ((hw->mac_type == e1000_82571) && (hw->laa_is_present)) |
5754 | rar_num -= 1; | 5753 | rar_num -= 1; |
5755 | if (hw->mac_type == e1000_ich8lan) | 5754 | if (hw->mac_type == e1000_ich8lan) |
5756 | rar_num = E1000_RAR_ENTRIES_ICH8LAN; | 5755 | rar_num = E1000_RAR_ENTRIES_ICH8LAN; |
@@ -5922,7 +5921,7 @@ e1000_rar_set(struct e1000_hw *hw, | |||
5922 | case e1000_82571: | 5921 | case e1000_82571: |
5923 | case e1000_82572: | 5922 | case e1000_82572: |
5924 | case e1000_80003es2lan: | 5923 | case e1000_80003es2lan: |
5925 | if (hw->leave_av_bit_off == TRUE) | 5924 | if (hw->leave_av_bit_off) |
5926 | break; | 5925 | break; |
5927 | default: | 5926 | default: |
5928 | /* Indicate to hardware the Address is Valid. */ | 5927 | /* Indicate to hardware the Address is Valid. */ |
@@ -6425,7 +6424,7 @@ e1000_clear_hw_cntrs(struct e1000_hw *hw) | |||
6425 | * hw - Struct containing variables accessed by shared code | 6424 | * hw - Struct containing variables accessed by shared code |
6426 | * | 6425 | * |
6427 | * Call this after e1000_init_hw. You may override the IFS defaults by setting | 6426 | * Call this after e1000_init_hw. You may override the IFS defaults by setting |
6428 | * hw->ifs_params_forced to TRUE. However, you must initialize hw-> | 6427 | * hw->ifs_params_forced to true. However, you must initialize hw-> |
6429 | * current_ifs_val, ifs_min_val, ifs_max_val, ifs_step_size, and ifs_ratio | 6428 | * current_ifs_val, ifs_min_val, ifs_max_val, ifs_step_size, and ifs_ratio |
6430 | * before calling this function. | 6429 | * before calling this function. |
6431 | *****************************************************************************/ | 6430 | *****************************************************************************/ |
@@ -6442,7 +6441,7 @@ e1000_reset_adaptive(struct e1000_hw *hw) | |||
6442 | hw->ifs_step_size = IFS_STEP; | 6441 | hw->ifs_step_size = IFS_STEP; |
6443 | hw->ifs_ratio = IFS_RATIO; | 6442 | hw->ifs_ratio = IFS_RATIO; |
6444 | } | 6443 | } |
6445 | hw->in_ifs_mode = FALSE; | 6444 | hw->in_ifs_mode = false; |
6446 | E1000_WRITE_REG(hw, AIT, 0); | 6445 | E1000_WRITE_REG(hw, AIT, 0); |
6447 | } else { | 6446 | } else { |
6448 | DEBUGOUT("Not in Adaptive IFS mode!\n"); | 6447 | DEBUGOUT("Not in Adaptive IFS mode!\n"); |
@@ -6465,7 +6464,7 @@ e1000_update_adaptive(struct e1000_hw *hw) | |||
6465 | if (hw->adaptive_ifs) { | 6464 | if (hw->adaptive_ifs) { |
6466 | if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) { | 6465 | if ((hw->collision_delta * hw->ifs_ratio) > hw->tx_packet_delta) { |
6467 | if (hw->tx_packet_delta > MIN_NUM_XMITS) { | 6466 | if (hw->tx_packet_delta > MIN_NUM_XMITS) { |
6468 | hw->in_ifs_mode = TRUE; | 6467 | hw->in_ifs_mode = true; |
6469 | if (hw->current_ifs_val < hw->ifs_max_val) { | 6468 | if (hw->current_ifs_val < hw->ifs_max_val) { |
6470 | if (hw->current_ifs_val == 0) | 6469 | if (hw->current_ifs_val == 0) |
6471 | hw->current_ifs_val = hw->ifs_min_val; | 6470 | hw->current_ifs_val = hw->ifs_min_val; |
@@ -6477,7 +6476,7 @@ e1000_update_adaptive(struct e1000_hw *hw) | |||
6477 | } else { | 6476 | } else { |
6478 | if (hw->in_ifs_mode && (hw->tx_packet_delta <= MIN_NUM_XMITS)) { | 6477 | if (hw->in_ifs_mode && (hw->tx_packet_delta <= MIN_NUM_XMITS)) { |
6479 | hw->current_ifs_val = 0; | 6478 | hw->current_ifs_val = 0; |
6480 | hw->in_ifs_mode = FALSE; | 6479 | hw->in_ifs_mode = false; |
6481 | E1000_WRITE_REG(hw, AIT, 0); | 6480 | E1000_WRITE_REG(hw, AIT, 0); |
6482 | } | 6481 | } |
6483 | } | 6482 | } |
@@ -6968,7 +6967,7 @@ e1000_check_downshift(struct e1000_hw *hw) | |||
6968 | M88E1000_PSSR_DOWNSHIFT_SHIFT; | 6967 | M88E1000_PSSR_DOWNSHIFT_SHIFT; |
6969 | } else if (hw->phy_type == e1000_phy_ife) { | 6968 | } else if (hw->phy_type == e1000_phy_ife) { |
6970 | /* e1000_phy_ife supports 10/100 speed only */ | 6969 | /* e1000_phy_ife supports 10/100 speed only */ |
6971 | hw->speed_downgraded = FALSE; | 6970 | hw->speed_downgraded = false; |
6972 | } | 6971 | } |
6973 | 6972 | ||
6974 | return E1000_SUCCESS; | 6973 | return E1000_SUCCESS; |
@@ -6988,7 +6987,7 @@ e1000_check_downshift(struct e1000_hw *hw) | |||
6988 | 6987 | ||
6989 | static int32_t | 6988 | static int32_t |
6990 | e1000_config_dsp_after_link_change(struct e1000_hw *hw, | 6989 | e1000_config_dsp_after_link_change(struct e1000_hw *hw, |
6991 | boolean_t link_up) | 6990 | bool link_up) |
6992 | { | 6991 | { |
6993 | int32_t ret_val; | 6992 | int32_t ret_val; |
6994 | uint16_t phy_data, phy_saved_data, speed, duplex, i; | 6993 | uint16_t phy_data, phy_saved_data, speed, duplex, i; |
@@ -7198,7 +7197,7 @@ e1000_set_phy_mode(struct e1000_hw *hw) | |||
7198 | if (ret_val) | 7197 | if (ret_val) |
7199 | return ret_val; | 7198 | return ret_val; |
7200 | 7199 | ||
7201 | hw->phy_reset_disable = FALSE; | 7200 | hw->phy_reset_disable = false; |
7202 | } | 7201 | } |
7203 | } | 7202 | } |
7204 | 7203 | ||
@@ -7221,7 +7220,7 @@ e1000_set_phy_mode(struct e1000_hw *hw) | |||
7221 | 7220 | ||
7222 | static int32_t | 7221 | static int32_t |
7223 | e1000_set_d3_lplu_state(struct e1000_hw *hw, | 7222 | e1000_set_d3_lplu_state(struct e1000_hw *hw, |
7224 | boolean_t active) | 7223 | bool active) |
7225 | { | 7224 | { |
7226 | uint32_t phy_ctrl = 0; | 7225 | uint32_t phy_ctrl = 0; |
7227 | int32_t ret_val; | 7226 | int32_t ret_val; |
@@ -7351,7 +7350,7 @@ e1000_set_d3_lplu_state(struct e1000_hw *hw, | |||
7351 | 7350 | ||
7352 | static int32_t | 7351 | static int32_t |
7353 | e1000_set_d0_lplu_state(struct e1000_hw *hw, | 7352 | e1000_set_d0_lplu_state(struct e1000_hw *hw, |
7354 | boolean_t active) | 7353 | bool active) |
7355 | { | 7354 | { |
7356 | uint32_t phy_ctrl = 0; | 7355 | uint32_t phy_ctrl = 0; |
7357 | int32_t ret_val; | 7356 | int32_t ret_val; |
@@ -7689,9 +7688,9 @@ e1000_mng_write_commit(struct e1000_hw * hw) | |||
7689 | /***************************************************************************** | 7688 | /***************************************************************************** |
7690 | * This function checks the mode of the firmware. | 7689 | * This function checks the mode of the firmware. |
7691 | * | 7690 | * |
7692 | * returns - TRUE when the mode is IAMT or FALSE. | 7691 | * returns - true when the mode is IAMT or false. |
7693 | ****************************************************************************/ | 7692 | ****************************************************************************/ |
7694 | boolean_t | 7693 | bool |
7695 | e1000_check_mng_mode(struct e1000_hw *hw) | 7694 | e1000_check_mng_mode(struct e1000_hw *hw) |
7696 | { | 7695 | { |
7697 | uint32_t fwsm; | 7696 | uint32_t fwsm; |
@@ -7701,12 +7700,12 @@ e1000_check_mng_mode(struct e1000_hw *hw) | |||
7701 | if (hw->mac_type == e1000_ich8lan) { | 7700 | if (hw->mac_type == e1000_ich8lan) { |
7702 | if ((fwsm & E1000_FWSM_MODE_MASK) == | 7701 | if ((fwsm & E1000_FWSM_MODE_MASK) == |
7703 | (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) | 7702 | (E1000_MNG_ICH_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) |
7704 | return TRUE; | 7703 | return true; |
7705 | } else if ((fwsm & E1000_FWSM_MODE_MASK) == | 7704 | } else if ((fwsm & E1000_FWSM_MODE_MASK) == |
7706 | (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) | 7705 | (E1000_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT)) |
7707 | return TRUE; | 7706 | return true; |
7708 | 7707 | ||
7709 | return FALSE; | 7708 | return false; |
7710 | } | 7709 | } |
7711 | 7710 | ||
7712 | 7711 | ||
@@ -7763,15 +7762,15 @@ e1000_calculate_mng_checksum(char *buffer, uint32_t length) | |||
7763 | /***************************************************************************** | 7762 | /***************************************************************************** |
7764 | * This function checks whether tx pkt filtering needs to be enabled or not. | 7763 | * This function checks whether tx pkt filtering needs to be enabled or not. |
7765 | * | 7764 | * |
7766 | * returns - TRUE for packet filtering or FALSE. | 7765 | * returns - true for packet filtering or false. |
7767 | ****************************************************************************/ | 7766 | ****************************************************************************/ |
7768 | boolean_t | 7767 | bool |
7769 | e1000_enable_tx_pkt_filtering(struct e1000_hw *hw) | 7768 | e1000_enable_tx_pkt_filtering(struct e1000_hw *hw) |
7770 | { | 7769 | { |
7771 | /* called in init as well as watchdog timer functions */ | 7770 | /* called in init as well as watchdog timer functions */ |
7772 | 7771 | ||
7773 | int32_t ret_val, checksum; | 7772 | int32_t ret_val, checksum; |
7774 | boolean_t tx_filter = FALSE; | 7773 | bool tx_filter = false; |
7775 | struct e1000_host_mng_dhcp_cookie *hdr = &(hw->mng_cookie); | 7774 | struct e1000_host_mng_dhcp_cookie *hdr = &(hw->mng_cookie); |
7776 | uint8_t *buffer = (uint8_t *) &(hw->mng_cookie); | 7775 | uint8_t *buffer = (uint8_t *) &(hw->mng_cookie); |
7777 | 7776 | ||
@@ -7787,11 +7786,11 @@ e1000_enable_tx_pkt_filtering(struct e1000_hw *hw) | |||
7787 | E1000_MNG_DHCP_COOKIE_LENGTH)) { | 7786 | E1000_MNG_DHCP_COOKIE_LENGTH)) { |
7788 | if (hdr->status & | 7787 | if (hdr->status & |
7789 | E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT) | 7788 | E1000_MNG_DHCP_COOKIE_STATUS_PARSING_SUPPORT) |
7790 | tx_filter = TRUE; | 7789 | tx_filter = true; |
7791 | } else | 7790 | } else |
7792 | tx_filter = TRUE; | 7791 | tx_filter = true; |
7793 | } else | 7792 | } else |
7794 | tx_filter = TRUE; | 7793 | tx_filter = true; |
7795 | } | 7794 | } |
7796 | } | 7795 | } |
7797 | 7796 | ||
@@ -7804,7 +7803,7 @@ e1000_enable_tx_pkt_filtering(struct e1000_hw *hw) | |||
7804 | * | 7803 | * |
7805 | * hw - Struct containing variables accessed by shared code | 7804 | * hw - Struct containing variables accessed by shared code |
7806 | * | 7805 | * |
7807 | * returns: - TRUE/FALSE | 7806 | * returns: - true/false |
7808 | * | 7807 | * |
7809 | *****************************************************************************/ | 7808 | *****************************************************************************/ |
7810 | uint32_t | 7809 | uint32_t |
@@ -7818,19 +7817,19 @@ e1000_enable_mng_pass_thru(struct e1000_hw *hw) | |||
7818 | 7817 | ||
7819 | if (!(manc & E1000_MANC_RCV_TCO_EN) || | 7818 | if (!(manc & E1000_MANC_RCV_TCO_EN) || |
7820 | !(manc & E1000_MANC_EN_MAC_ADDR_FILTER)) | 7819 | !(manc & E1000_MANC_EN_MAC_ADDR_FILTER)) |
7821 | return FALSE; | 7820 | return false; |
7822 | if (e1000_arc_subsystem_valid(hw) == TRUE) { | 7821 | if (e1000_arc_subsystem_valid(hw)) { |
7823 | fwsm = E1000_READ_REG(hw, FWSM); | 7822 | fwsm = E1000_READ_REG(hw, FWSM); |
7824 | factps = E1000_READ_REG(hw, FACTPS); | 7823 | factps = E1000_READ_REG(hw, FACTPS); |
7825 | 7824 | ||
7826 | if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) == | 7825 | if ((((fwsm & E1000_FWSM_MODE_MASK) >> E1000_FWSM_MODE_SHIFT) == |
7827 | e1000_mng_mode_pt) && !(factps & E1000_FACTPS_MNGCG)) | 7826 | e1000_mng_mode_pt) && !(factps & E1000_FACTPS_MNGCG)) |
7828 | return TRUE; | 7827 | return true; |
7829 | } else | 7828 | } else |
7830 | if ((manc & E1000_MANC_SMBUS_EN) && !(manc & E1000_MANC_ASF_EN)) | 7829 | if ((manc & E1000_MANC_SMBUS_EN) && !(manc & E1000_MANC_ASF_EN)) |
7831 | return TRUE; | 7830 | return true; |
7832 | } | 7831 | } |
7833 | return FALSE; | 7832 | return false; |
7834 | } | 7833 | } |
7835 | 7834 | ||
7836 | static int32_t | 7835 | static int32_t |
@@ -8264,14 +8263,14 @@ e1000_arc_subsystem_valid(struct e1000_hw *hw) | |||
8264 | case e1000_80003es2lan: | 8263 | case e1000_80003es2lan: |
8265 | fwsm = E1000_READ_REG(hw, FWSM); | 8264 | fwsm = E1000_READ_REG(hw, FWSM); |
8266 | if ((fwsm & E1000_FWSM_MODE_MASK) != 0) | 8265 | if ((fwsm & E1000_FWSM_MODE_MASK) != 0) |
8267 | return TRUE; | 8266 | return true; |
8268 | break; | 8267 | break; |
8269 | case e1000_ich8lan: | 8268 | case e1000_ich8lan: |
8270 | return TRUE; | 8269 | return true; |
8271 | default: | 8270 | default: |
8272 | break; | 8271 | break; |
8273 | } | 8272 | } |
8274 | return FALSE; | 8273 | return false; |
8275 | } | 8274 | } |
8276 | 8275 | ||
8277 | 8276 | ||
@@ -8417,7 +8416,7 @@ e1000_read_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, | |||
8417 | 8416 | ||
8418 | for (i = 0; i < words; i++) { | 8417 | for (i = 0; i < words; i++) { |
8419 | if (hw->eeprom_shadow_ram != NULL && | 8418 | if (hw->eeprom_shadow_ram != NULL && |
8420 | hw->eeprom_shadow_ram[offset+i].modified == TRUE) { | 8419 | hw->eeprom_shadow_ram[offset+i].modified) { |
8421 | data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word; | 8420 | data[i] = hw->eeprom_shadow_ram[offset+i].eeprom_word; |
8422 | } else { | 8421 | } else { |
8423 | /* The NVM part needs a byte offset, hence * 2 */ | 8422 | /* The NVM part needs a byte offset, hence * 2 */ |
@@ -8466,7 +8465,7 @@ e1000_write_eeprom_ich8(struct e1000_hw *hw, uint16_t offset, uint16_t words, | |||
8466 | if (hw->eeprom_shadow_ram != NULL) { | 8465 | if (hw->eeprom_shadow_ram != NULL) { |
8467 | for (i = 0; i < words; i++) { | 8466 | for (i = 0; i < words; i++) { |
8468 | if ((offset + i) < E1000_SHADOW_RAM_WORDS) { | 8467 | if ((offset + i) < E1000_SHADOW_RAM_WORDS) { |
8469 | hw->eeprom_shadow_ram[offset+i].modified = TRUE; | 8468 | hw->eeprom_shadow_ram[offset+i].modified = true; |
8470 | hw->eeprom_shadow_ram[offset+i].eeprom_word = data[i]; | 8469 | hw->eeprom_shadow_ram[offset+i].eeprom_word = data[i]; |
8471 | } else { | 8470 | } else { |
8472 | error = -E1000_ERR_EEPROM; | 8471 | error = -E1000_ERR_EEPROM; |
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h index a6c3c34feb98..572a7b6dc12e 100644 --- a/drivers/net/e1000/e1000_hw.h +++ b/drivers/net/e1000/e1000_hw.h | |||
@@ -100,8 +100,8 @@ typedef enum { | |||
100 | } e1000_fc_type; | 100 | } e1000_fc_type; |
101 | 101 | ||
102 | struct e1000_shadow_ram { | 102 | struct e1000_shadow_ram { |
103 | uint16_t eeprom_word; | 103 | uint16_t eeprom_word; |
104 | boolean_t modified; | 104 | bool modified; |
105 | }; | 105 | }; |
106 | 106 | ||
107 | /* PCI bus types */ | 107 | /* PCI bus types */ |
@@ -274,8 +274,8 @@ struct e1000_eeprom_info { | |||
274 | uint16_t address_bits; | 274 | uint16_t address_bits; |
275 | uint16_t delay_usec; | 275 | uint16_t delay_usec; |
276 | uint16_t page_size; | 276 | uint16_t page_size; |
277 | boolean_t use_eerd; | 277 | bool use_eerd; |
278 | boolean_t use_eewr; | 278 | bool use_eewr; |
279 | }; | 279 | }; |
280 | 280 | ||
281 | /* Flex ASF Information */ | 281 | /* Flex ASF Information */ |
@@ -391,8 +391,8 @@ struct e1000_host_mng_dhcp_cookie{ | |||
391 | 391 | ||
392 | int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer, | 392 | int32_t e1000_mng_write_dhcp_info(struct e1000_hw *hw, uint8_t *buffer, |
393 | uint16_t length); | 393 | uint16_t length); |
394 | boolean_t e1000_check_mng_mode(struct e1000_hw *hw); | 394 | bool e1000_check_mng_mode(struct e1000_hw *hw); |
395 | boolean_t e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); | 395 | bool e1000_enable_tx_pkt_filtering(struct e1000_hw *hw); |
396 | int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data); | 396 | int32_t e1000_read_eeprom(struct e1000_hw *hw, uint16_t reg, uint16_t words, uint16_t *data); |
397 | int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw); | 397 | int32_t e1000_validate_eeprom_checksum(struct e1000_hw *hw); |
398 | int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw); | 398 | int32_t e1000_update_eeprom_checksum(struct e1000_hw *hw); |
@@ -1420,7 +1420,7 @@ struct e1000_hw { | |||
1420 | uint32_t ledctl_default; | 1420 | uint32_t ledctl_default; |
1421 | uint32_t ledctl_mode1; | 1421 | uint32_t ledctl_mode1; |
1422 | uint32_t ledctl_mode2; | 1422 | uint32_t ledctl_mode2; |
1423 | boolean_t tx_pkt_filtering; | 1423 | bool tx_pkt_filtering; |
1424 | struct e1000_host_mng_dhcp_cookie mng_cookie; | 1424 | struct e1000_host_mng_dhcp_cookie mng_cookie; |
1425 | uint16_t phy_spd_default; | 1425 | uint16_t phy_spd_default; |
1426 | uint16_t autoneg_advertised; | 1426 | uint16_t autoneg_advertised; |
@@ -1445,30 +1445,30 @@ struct e1000_hw { | |||
1445 | uint8_t dma_fairness; | 1445 | uint8_t dma_fairness; |
1446 | uint8_t mac_addr[NODE_ADDRESS_SIZE]; | 1446 | uint8_t mac_addr[NODE_ADDRESS_SIZE]; |
1447 | uint8_t perm_mac_addr[NODE_ADDRESS_SIZE]; | 1447 | uint8_t perm_mac_addr[NODE_ADDRESS_SIZE]; |
1448 | boolean_t disable_polarity_correction; | 1448 | bool disable_polarity_correction; |
1449 | boolean_t speed_downgraded; | 1449 | bool speed_downgraded; |
1450 | e1000_smart_speed smart_speed; | 1450 | e1000_smart_speed smart_speed; |
1451 | e1000_dsp_config dsp_config_state; | 1451 | e1000_dsp_config dsp_config_state; |
1452 | boolean_t get_link_status; | 1452 | bool get_link_status; |
1453 | boolean_t serdes_link_down; | 1453 | bool serdes_link_down; |
1454 | boolean_t tbi_compatibility_en; | 1454 | bool tbi_compatibility_en; |
1455 | boolean_t tbi_compatibility_on; | 1455 | bool tbi_compatibility_on; |
1456 | boolean_t laa_is_present; | 1456 | bool laa_is_present; |
1457 | boolean_t phy_reset_disable; | 1457 | bool phy_reset_disable; |
1458 | boolean_t initialize_hw_bits_disable; | 1458 | bool initialize_hw_bits_disable; |
1459 | boolean_t fc_send_xon; | 1459 | bool fc_send_xon; |
1460 | boolean_t fc_strict_ieee; | 1460 | bool fc_strict_ieee; |
1461 | boolean_t report_tx_early; | 1461 | bool report_tx_early; |
1462 | boolean_t adaptive_ifs; | 1462 | bool adaptive_ifs; |
1463 | boolean_t ifs_params_forced; | 1463 | bool ifs_params_forced; |
1464 | boolean_t in_ifs_mode; | 1464 | bool in_ifs_mode; |
1465 | boolean_t mng_reg_access_disabled; | 1465 | bool mng_reg_access_disabled; |
1466 | boolean_t leave_av_bit_off; | 1466 | bool leave_av_bit_off; |
1467 | boolean_t kmrn_lock_loss_workaround_disabled; | 1467 | bool kmrn_lock_loss_workaround_disabled; |
1468 | boolean_t bad_tx_carr_stats_fd; | 1468 | bool bad_tx_carr_stats_fd; |
1469 | boolean_t has_manc2h; | 1469 | bool has_manc2h; |
1470 | boolean_t rx_needs_kicking; | 1470 | bool rx_needs_kicking; |
1471 | boolean_t has_smbus; | 1471 | bool has_smbus; |
1472 | }; | 1472 | }; |
1473 | 1473 | ||
1474 | 1474 | ||
@@ -2518,11 +2518,11 @@ struct e1000_host_command_info { | |||
2518 | * Typical use: | 2518 | * Typical use: |
2519 | * ... | 2519 | * ... |
2520 | * if (TBI_ACCEPT) { | 2520 | * if (TBI_ACCEPT) { |
2521 | * accept_frame = TRUE; | 2521 | * accept_frame = true; |
2522 | * e1000_tbi_adjust_stats(adapter, MacAddress); | 2522 | * e1000_tbi_adjust_stats(adapter, MacAddress); |
2523 | * frame_length--; | 2523 | * frame_length--; |
2524 | * } else { | 2524 | * } else { |
2525 | * accept_frame = FALSE; | 2525 | * accept_frame = false; |
2526 | * } | 2526 | * } |
2527 | * ... | 2527 | * ... |
2528 | */ | 2528 | */ |
diff --git a/drivers/net/e1000/e1000_main.c b/drivers/net/e1000/e1000_main.c index 0991648c53dc..37c46558e1c7 100644 --- a/drivers/net/e1000/e1000_main.c +++ b/drivers/net/e1000/e1000_main.c | |||
@@ -169,21 +169,21 @@ static int e1000_change_mtu(struct net_device *netdev, int new_mtu); | |||
169 | static int e1000_set_mac(struct net_device *netdev, void *p); | 169 | static int e1000_set_mac(struct net_device *netdev, void *p); |
170 | static irqreturn_t e1000_intr(int irq, void *data); | 170 | static irqreturn_t e1000_intr(int irq, void *data); |
171 | static irqreturn_t e1000_intr_msi(int irq, void *data); | 171 | static irqreturn_t e1000_intr_msi(int irq, void *data); |
172 | static boolean_t e1000_clean_tx_irq(struct e1000_adapter *adapter, | 172 | static bool e1000_clean_tx_irq(struct e1000_adapter *adapter, |
173 | struct e1000_tx_ring *tx_ring); | 173 | struct e1000_tx_ring *tx_ring); |
174 | #ifdef CONFIG_E1000_NAPI | 174 | #ifdef CONFIG_E1000_NAPI |
175 | static int e1000_clean(struct napi_struct *napi, int budget); | 175 | static int e1000_clean(struct napi_struct *napi, int budget); |
176 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, | 176 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
177 | struct e1000_rx_ring *rx_ring, | 177 | struct e1000_rx_ring *rx_ring, |
178 | int *work_done, int work_to_do); | 178 | int *work_done, int work_to_do); |
179 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | 179 | static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
180 | struct e1000_rx_ring *rx_ring, | 180 | struct e1000_rx_ring *rx_ring, |
181 | int *work_done, int work_to_do); | 181 | int *work_done, int work_to_do); |
182 | #else | 182 | #else |
183 | static boolean_t e1000_clean_rx_irq(struct e1000_adapter *adapter, | 183 | static bool e1000_clean_rx_irq(struct e1000_adapter *adapter, |
184 | struct e1000_rx_ring *rx_ring); | 184 | struct e1000_rx_ring *rx_ring); |
185 | static boolean_t e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | 185 | static bool e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
186 | struct e1000_rx_ring *rx_ring); | 186 | struct e1000_rx_ring *rx_ring); |
187 | #endif | 187 | #endif |
188 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, | 188 | static void e1000_alloc_rx_buffers(struct e1000_adapter *adapter, |
189 | struct e1000_rx_ring *rx_ring, | 189 | struct e1000_rx_ring *rx_ring, |
@@ -584,7 +584,7 @@ void e1000_power_up_phy(struct e1000_adapter *adapter) | |||
584 | static void e1000_power_down_phy(struct e1000_adapter *adapter) | 584 | static void e1000_power_down_phy(struct e1000_adapter *adapter) |
585 | { | 585 | { |
586 | /* Power down the PHY so no link is implied when interface is down * | 586 | /* Power down the PHY so no link is implied when interface is down * |
587 | * The PHY cannot be powered down if any of the following is TRUE * | 587 | * The PHY cannot be powered down if any of the following is true * |
588 | * (a) WoL is enabled | 588 | * (a) WoL is enabled |
589 | * (b) AMT is active | 589 | * (b) AMT is active |
590 | * (c) SoL/IDER session is active */ | 590 | * (c) SoL/IDER session is active */ |
@@ -673,7 +673,7 @@ e1000_reset(struct e1000_adapter *adapter) | |||
673 | { | 673 | { |
674 | uint32_t pba = 0, tx_space, min_tx_space, min_rx_space; | 674 | uint32_t pba = 0, tx_space, min_tx_space, min_rx_space; |
675 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; | 675 | uint16_t fc_high_water_mark = E1000_FC_HIGH_DIFF; |
676 | boolean_t legacy_pba_adjust = FALSE; | 676 | bool legacy_pba_adjust = false; |
677 | 677 | ||
678 | /* Repartition Pba for greater than 9k mtu | 678 | /* Repartition Pba for greater than 9k mtu |
679 | * To take effect CTRL.RST is required. | 679 | * To take effect CTRL.RST is required. |
@@ -687,7 +687,7 @@ e1000_reset(struct e1000_adapter *adapter) | |||
687 | case e1000_82540: | 687 | case e1000_82540: |
688 | case e1000_82541: | 688 | case e1000_82541: |
689 | case e1000_82541_rev_2: | 689 | case e1000_82541_rev_2: |
690 | legacy_pba_adjust = TRUE; | 690 | legacy_pba_adjust = true; |
691 | pba = E1000_PBA_48K; | 691 | pba = E1000_PBA_48K; |
692 | break; | 692 | break; |
693 | case e1000_82545: | 693 | case e1000_82545: |
@@ -698,7 +698,7 @@ e1000_reset(struct e1000_adapter *adapter) | |||
698 | break; | 698 | break; |
699 | case e1000_82547: | 699 | case e1000_82547: |
700 | case e1000_82547_rev_2: | 700 | case e1000_82547_rev_2: |
701 | legacy_pba_adjust = TRUE; | 701 | legacy_pba_adjust = true; |
702 | pba = E1000_PBA_30K; | 702 | pba = E1000_PBA_30K; |
703 | break; | 703 | break; |
704 | case e1000_82571: | 704 | case e1000_82571: |
@@ -716,7 +716,7 @@ e1000_reset(struct e1000_adapter *adapter) | |||
716 | break; | 716 | break; |
717 | } | 717 | } |
718 | 718 | ||
719 | if (legacy_pba_adjust == TRUE) { | 719 | if (legacy_pba_adjust) { |
720 | if (adapter->netdev->mtu > E1000_RXBUFFER_8192) | 720 | if (adapter->netdev->mtu > E1000_RXBUFFER_8192) |
721 | pba -= 8; /* allocate more FIFO for Tx */ | 721 | pba -= 8; /* allocate more FIFO for Tx */ |
722 | 722 | ||
@@ -1366,15 +1366,15 @@ e1000_sw_init(struct e1000_adapter *adapter) | |||
1366 | 1366 | ||
1367 | e1000_set_media_type(hw); | 1367 | e1000_set_media_type(hw); |
1368 | 1368 | ||
1369 | hw->wait_autoneg_complete = FALSE; | 1369 | hw->wait_autoneg_complete = false; |
1370 | hw->tbi_compatibility_en = TRUE; | 1370 | hw->tbi_compatibility_en = true; |
1371 | hw->adaptive_ifs = TRUE; | 1371 | hw->adaptive_ifs = true; |
1372 | 1372 | ||
1373 | /* Copper options */ | 1373 | /* Copper options */ |
1374 | 1374 | ||
1375 | if (hw->media_type == e1000_media_type_copper) { | 1375 | if (hw->media_type == e1000_media_type_copper) { |
1376 | hw->mdix = AUTO_ALL_MODES; | 1376 | hw->mdix = AUTO_ALL_MODES; |
1377 | hw->disable_polarity_correction = FALSE; | 1377 | hw->disable_polarity_correction = false; |
1378 | hw->master_slave = E1000_MASTER_SLAVE; | 1378 | hw->master_slave = E1000_MASTER_SLAVE; |
1379 | } | 1379 | } |
1380 | 1380 | ||
@@ -1576,7 +1576,7 @@ e1000_close(struct net_device *netdev) | |||
1576 | * @start: address of beginning of memory | 1576 | * @start: address of beginning of memory |
1577 | * @len: length of memory | 1577 | * @len: length of memory |
1578 | **/ | 1578 | **/ |
1579 | static boolean_t | 1579 | static bool |
1580 | e1000_check_64k_bound(struct e1000_adapter *adapter, | 1580 | e1000_check_64k_bound(struct e1000_adapter *adapter, |
1581 | void *start, unsigned long len) | 1581 | void *start, unsigned long len) |
1582 | { | 1582 | { |
@@ -1587,10 +1587,10 @@ e1000_check_64k_bound(struct e1000_adapter *adapter, | |||
1587 | * write location to cross 64k boundary due to errata 23 */ | 1587 | * write location to cross 64k boundary due to errata 23 */ |
1588 | if (adapter->hw.mac_type == e1000_82545 || | 1588 | if (adapter->hw.mac_type == e1000_82545 || |
1589 | adapter->hw.mac_type == e1000_82546) { | 1589 | adapter->hw.mac_type == e1000_82546) { |
1590 | return ((begin ^ (end - 1)) >> 16) != 0 ? FALSE : TRUE; | 1590 | return ((begin ^ (end - 1)) >> 16) != 0 ? false : true; |
1591 | } | 1591 | } |
1592 | 1592 | ||
1593 | return TRUE; | 1593 | return true; |
1594 | } | 1594 | } |
1595 | 1595 | ||
1596 | /** | 1596 | /** |
@@ -2133,7 +2133,7 @@ e1000_configure_rx(struct e1000_adapter *adapter) | |||
2133 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ | 2133 | /* Enable 82543 Receive Checksum Offload for TCP and UDP */ |
2134 | if (hw->mac_type >= e1000_82543) { | 2134 | if (hw->mac_type >= e1000_82543) { |
2135 | rxcsum = E1000_READ_REG(hw, RXCSUM); | 2135 | rxcsum = E1000_READ_REG(hw, RXCSUM); |
2136 | if (adapter->rx_csum == TRUE) { | 2136 | if (adapter->rx_csum) { |
2137 | rxcsum |= E1000_RXCSUM_TUOFL; | 2137 | rxcsum |= E1000_RXCSUM_TUOFL; |
2138 | 2138 | ||
2139 | /* Enable 82571 IPv4 payload checksum for UDP fragments | 2139 | /* Enable 82571 IPv4 payload checksum for UDP fragments |
@@ -2669,7 +2669,7 @@ e1000_watchdog(unsigned long data) | |||
2669 | if (link) { | 2669 | if (link) { |
2670 | if (!netif_carrier_ok(netdev)) { | 2670 | if (!netif_carrier_ok(netdev)) { |
2671 | uint32_t ctrl; | 2671 | uint32_t ctrl; |
2672 | boolean_t txb2b = 1; | 2672 | bool txb2b = true; |
2673 | e1000_get_speed_and_duplex(&adapter->hw, | 2673 | e1000_get_speed_and_duplex(&adapter->hw, |
2674 | &adapter->link_speed, | 2674 | &adapter->link_speed, |
2675 | &adapter->link_duplex); | 2675 | &adapter->link_duplex); |
@@ -2691,12 +2691,12 @@ e1000_watchdog(unsigned long data) | |||
2691 | adapter->tx_timeout_factor = 1; | 2691 | adapter->tx_timeout_factor = 1; |
2692 | switch (adapter->link_speed) { | 2692 | switch (adapter->link_speed) { |
2693 | case SPEED_10: | 2693 | case SPEED_10: |
2694 | txb2b = 0; | 2694 | txb2b = false; |
2695 | netdev->tx_queue_len = 10; | 2695 | netdev->tx_queue_len = 10; |
2696 | adapter->tx_timeout_factor = 8; | 2696 | adapter->tx_timeout_factor = 8; |
2697 | break; | 2697 | break; |
2698 | case SPEED_100: | 2698 | case SPEED_100: |
2699 | txb2b = 0; | 2699 | txb2b = false; |
2700 | netdev->tx_queue_len = 100; | 2700 | netdev->tx_queue_len = 100; |
2701 | /* maybe add some timeout factor ? */ | 2701 | /* maybe add some timeout factor ? */ |
2702 | break; | 2702 | break; |
@@ -2704,7 +2704,7 @@ e1000_watchdog(unsigned long data) | |||
2704 | 2704 | ||
2705 | if ((adapter->hw.mac_type == e1000_82571 || | 2705 | if ((adapter->hw.mac_type == e1000_82571 || |
2706 | adapter->hw.mac_type == e1000_82572) && | 2706 | adapter->hw.mac_type == e1000_82572) && |
2707 | txb2b == 0) { | 2707 | !txb2b) { |
2708 | uint32_t tarc0; | 2708 | uint32_t tarc0; |
2709 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); | 2709 | tarc0 = E1000_READ_REG(&adapter->hw, TARC0); |
2710 | tarc0 &= ~(1 << 21); | 2710 | tarc0 &= ~(1 << 21); |
@@ -2802,7 +2802,7 @@ e1000_watchdog(unsigned long data) | |||
2802 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); | 2802 | E1000_WRITE_REG(&adapter->hw, ICS, E1000_ICS_RXDMT0); |
2803 | 2803 | ||
2804 | /* Force detection of hung controller every watchdog period */ | 2804 | /* Force detection of hung controller every watchdog period */ |
2805 | adapter->detect_tx_hung = TRUE; | 2805 | adapter->detect_tx_hung = true; |
2806 | 2806 | ||
2807 | /* With 82571 controllers, LAA may be overwritten due to controller | 2807 | /* With 82571 controllers, LAA may be overwritten due to controller |
2808 | * reset from the other port. Set the appropriate LAA in RAR[0] */ | 2808 | * reset from the other port. Set the appropriate LAA in RAR[0] */ |
@@ -3025,12 +3025,12 @@ e1000_tso(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
3025 | if (++i == tx_ring->count) i = 0; | 3025 | if (++i == tx_ring->count) i = 0; |
3026 | tx_ring->next_to_use = i; | 3026 | tx_ring->next_to_use = i; |
3027 | 3027 | ||
3028 | return TRUE; | 3028 | return true; |
3029 | } | 3029 | } |
3030 | return FALSE; | 3030 | return false; |
3031 | } | 3031 | } |
3032 | 3032 | ||
3033 | static boolean_t | 3033 | static bool |
3034 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | 3034 | e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, |
3035 | struct sk_buff *skb) | 3035 | struct sk_buff *skb) |
3036 | { | 3036 | { |
@@ -3060,10 +3060,10 @@ e1000_tx_csum(struct e1000_adapter *adapter, struct e1000_tx_ring *tx_ring, | |||
3060 | if (unlikely(++i == tx_ring->count)) i = 0; | 3060 | if (unlikely(++i == tx_ring->count)) i = 0; |
3061 | tx_ring->next_to_use = i; | 3061 | tx_ring->next_to_use = i; |
3062 | 3062 | ||
3063 | return TRUE; | 3063 | return true; |
3064 | } | 3064 | } |
3065 | 3065 | ||
3066 | return FALSE; | 3066 | return false; |
3067 | } | 3067 | } |
3068 | 3068 | ||
3069 | #define E1000_MAX_TXD_PWR 12 | 3069 | #define E1000_MAX_TXD_PWR 12 |
@@ -4038,7 +4038,7 @@ e1000_clean(struct napi_struct *napi, int budget) | |||
4038 | * @adapter: board private structure | 4038 | * @adapter: board private structure |
4039 | **/ | 4039 | **/ |
4040 | 4040 | ||
4041 | static boolean_t | 4041 | static bool |
4042 | e1000_clean_tx_irq(struct e1000_adapter *adapter, | 4042 | e1000_clean_tx_irq(struct e1000_adapter *adapter, |
4043 | struct e1000_tx_ring *tx_ring) | 4043 | struct e1000_tx_ring *tx_ring) |
4044 | { | 4044 | { |
@@ -4049,7 +4049,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
4049 | #ifdef CONFIG_E1000_NAPI | 4049 | #ifdef CONFIG_E1000_NAPI |
4050 | unsigned int count = 0; | 4050 | unsigned int count = 0; |
4051 | #endif | 4051 | #endif |
4052 | boolean_t cleaned = FALSE; | 4052 | bool cleaned = false; |
4053 | unsigned int total_tx_bytes=0, total_tx_packets=0; | 4053 | unsigned int total_tx_bytes=0, total_tx_packets=0; |
4054 | 4054 | ||
4055 | i = tx_ring->next_to_clean; | 4055 | i = tx_ring->next_to_clean; |
@@ -4057,7 +4057,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
4057 | eop_desc = E1000_TX_DESC(*tx_ring, eop); | 4057 | eop_desc = E1000_TX_DESC(*tx_ring, eop); |
4058 | 4058 | ||
4059 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { | 4059 | while (eop_desc->upper.data & cpu_to_le32(E1000_TXD_STAT_DD)) { |
4060 | for (cleaned = FALSE; !cleaned; ) { | 4060 | for (cleaned = false; !cleaned; ) { |
4061 | tx_desc = E1000_TX_DESC(*tx_ring, i); | 4061 | tx_desc = E1000_TX_DESC(*tx_ring, i); |
4062 | buffer_info = &tx_ring->buffer_info[i]; | 4062 | buffer_info = &tx_ring->buffer_info[i]; |
4063 | cleaned = (i == eop); | 4063 | cleaned = (i == eop); |
@@ -4105,7 +4105,7 @@ e1000_clean_tx_irq(struct e1000_adapter *adapter, | |||
4105 | if (adapter->detect_tx_hung) { | 4105 | if (adapter->detect_tx_hung) { |
4106 | /* Detect a transmit hang in hardware, this serializes the | 4106 | /* Detect a transmit hang in hardware, this serializes the |
4107 | * check with the clearing of time_stamp and movement of i */ | 4107 | * check with the clearing of time_stamp and movement of i */ |
4108 | adapter->detect_tx_hung = FALSE; | 4108 | adapter->detect_tx_hung = false; |
4109 | if (tx_ring->buffer_info[eop].dma && | 4109 | if (tx_ring->buffer_info[eop].dma && |
4110 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + | 4110 | time_after(jiffies, tx_ring->buffer_info[eop].time_stamp + |
4111 | (adapter->tx_timeout_factor * HZ)) | 4111 | (adapter->tx_timeout_factor * HZ)) |
@@ -4200,7 +4200,7 @@ e1000_rx_checksum(struct e1000_adapter *adapter, | |||
4200 | * @adapter: board private structure | 4200 | * @adapter: board private structure |
4201 | **/ | 4201 | **/ |
4202 | 4202 | ||
4203 | static boolean_t | 4203 | static bool |
4204 | #ifdef CONFIG_E1000_NAPI | 4204 | #ifdef CONFIG_E1000_NAPI |
4205 | e1000_clean_rx_irq(struct e1000_adapter *adapter, | 4205 | e1000_clean_rx_irq(struct e1000_adapter *adapter, |
4206 | struct e1000_rx_ring *rx_ring, | 4206 | struct e1000_rx_ring *rx_ring, |
@@ -4219,7 +4219,7 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
4219 | uint8_t last_byte; | 4219 | uint8_t last_byte; |
4220 | unsigned int i; | 4220 | unsigned int i; |
4221 | int cleaned_count = 0; | 4221 | int cleaned_count = 0; |
4222 | boolean_t cleaned = FALSE; | 4222 | bool cleaned = false; |
4223 | unsigned int total_rx_bytes=0, total_rx_packets=0; | 4223 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
4224 | 4224 | ||
4225 | i = rx_ring->next_to_clean; | 4225 | i = rx_ring->next_to_clean; |
@@ -4247,7 +4247,7 @@ e1000_clean_rx_irq(struct e1000_adapter *adapter, | |||
4247 | 4247 | ||
4248 | next_buffer = &rx_ring->buffer_info[i]; | 4248 | next_buffer = &rx_ring->buffer_info[i]; |
4249 | 4249 | ||
4250 | cleaned = TRUE; | 4250 | cleaned = true; |
4251 | cleaned_count++; | 4251 | cleaned_count++; |
4252 | pci_unmap_single(pdev, | 4252 | pci_unmap_single(pdev, |
4253 | buffer_info->dma, | 4253 | buffer_info->dma, |
@@ -4373,7 +4373,7 @@ next_desc: | |||
4373 | * @adapter: board private structure | 4373 | * @adapter: board private structure |
4374 | **/ | 4374 | **/ |
4375 | 4375 | ||
4376 | static boolean_t | 4376 | static bool |
4377 | #ifdef CONFIG_E1000_NAPI | 4377 | #ifdef CONFIG_E1000_NAPI |
4378 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | 4378 | e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, |
4379 | struct e1000_rx_ring *rx_ring, | 4379 | struct e1000_rx_ring *rx_ring, |
@@ -4393,7 +4393,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
4393 | unsigned int i, j; | 4393 | unsigned int i, j; |
4394 | uint32_t length, staterr; | 4394 | uint32_t length, staterr; |
4395 | int cleaned_count = 0; | 4395 | int cleaned_count = 0; |
4396 | boolean_t cleaned = FALSE; | 4396 | bool cleaned = false; |
4397 | unsigned int total_rx_bytes=0, total_rx_packets=0; | 4397 | unsigned int total_rx_bytes=0, total_rx_packets=0; |
4398 | 4398 | ||
4399 | i = rx_ring->next_to_clean; | 4399 | i = rx_ring->next_to_clean; |
@@ -4420,7 +4420,7 @@ e1000_clean_rx_irq_ps(struct e1000_adapter *adapter, | |||
4420 | 4420 | ||
4421 | next_buffer = &rx_ring->buffer_info[i]; | 4421 | next_buffer = &rx_ring->buffer_info[i]; |
4422 | 4422 | ||
4423 | cleaned = TRUE; | 4423 | cleaned = true; |
4424 | cleaned_count++; | 4424 | cleaned_count++; |
4425 | pci_unmap_single(pdev, buffer_info->dma, | 4425 | pci_unmap_single(pdev, buffer_info->dma, |
4426 | buffer_info->length, | 4426 | buffer_info->length, |
diff --git a/drivers/net/e1000/e1000_osdep.h b/drivers/net/e1000/e1000_osdep.h index 10af742d8a20..365626d3177e 100644 --- a/drivers/net/e1000/e1000_osdep.h +++ b/drivers/net/e1000/e1000_osdep.h | |||
@@ -41,13 +41,6 @@ | |||
41 | #include <linux/interrupt.h> | 41 | #include <linux/interrupt.h> |
42 | #include <linux/sched.h> | 42 | #include <linux/sched.h> |
43 | 43 | ||
44 | typedef enum { | ||
45 | #undef FALSE | ||
46 | FALSE = 0, | ||
47 | #undef TRUE | ||
48 | TRUE = 1 | ||
49 | } boolean_t; | ||
50 | |||
51 | #ifdef DBG | 44 | #ifdef DBG |
52 | #define DEBUGOUT(S) printk(KERN_DEBUG S "\n") | 45 | #define DEBUGOUT(S) printk(KERN_DEBUG S "\n") |
53 | #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) | 46 | #define DEBUGOUT1(S, A...) printk(KERN_DEBUG S "\n", A) |