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authorAlexander Duyck <alexander.h.duyck@intel.com>2010-07-19 09:43:47 -0400
committerDavid S. Miller <davem@davemloft.net>2010-07-19 23:23:35 -0400
commitb59544649d6bb5134ab56764836efc29241ae5e0 (patch)
treeed92c20990d708941c7c40588fc2c10d48c7d15a /drivers/net/e1000
parent653954825dce4015d6418ddb4de7826205f44c87 (diff)
e1000: allow option to limit number of descriptors down to 48 per ring
This change makes it possible to limit the number of descriptors down to 48 per ring. The reason for this change is to address a variation on hardware errata 10 for 82546GB in which descriptors will be lost if more than 32 descriptors are fetched and the PCI-X MRBC is 512. Signed-off-by: Alexander Duyck <alexander.h.duyck@intel.com> Tested-by: Emil Tantilov <emil.s.tantilov@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/e1000')
-rw-r--r--drivers/net/e1000/e1000.h4
1 files changed, 2 insertions, 2 deletions
diff --git a/drivers/net/e1000/e1000.h b/drivers/net/e1000/e1000.h
index 40b62b406b08..65298a6d9af7 100644
--- a/drivers/net/e1000/e1000.h
+++ b/drivers/net/e1000/e1000.h
@@ -86,12 +86,12 @@ struct e1000_adapter;
86/* TX/RX descriptor defines */ 86/* TX/RX descriptor defines */
87#define E1000_DEFAULT_TXD 256 87#define E1000_DEFAULT_TXD 256
88#define E1000_MAX_TXD 256 88#define E1000_MAX_TXD 256
89#define E1000_MIN_TXD 80 89#define E1000_MIN_TXD 48
90#define E1000_MAX_82544_TXD 4096 90#define E1000_MAX_82544_TXD 4096
91 91
92#define E1000_DEFAULT_RXD 256 92#define E1000_DEFAULT_RXD 256
93#define E1000_MAX_RXD 256 93#define E1000_MAX_RXD 256
94#define E1000_MIN_RXD 80 94#define E1000_MIN_RXD 48
95#define E1000_MAX_82544_RXD 4096 95#define E1000_MAX_82544_RXD 4096
96 96
97#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */ 97#define E1000_MIN_ITR_USECS 10 /* 100000 irq/sec */