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authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2006-03-02 21:20:29 -0500
committerroot <root@jk-desktop.jf.intel.com>2006-03-02 21:20:29 -0500
commit85b22eb632dc75887ba99edad49307a02c2ae7ec (patch)
tree07fca1fa18db61f6b3024ff2db290a6111356900 /drivers/net/e1000/e1000_hw.h
parent9f68788856b134f93d9d10b19aa902924c61fc02 (diff)
e1000: Add enabled Jumbo frame support for 82573L
Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Jesse Brandeburg <jesse.brandeburg@intel.com> Signed-off-by: John Ronciak <john.ronciak@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.h')
-rw-r--r--drivers/net/e1000/e1000_hw.h5
1 files changed, 5 insertions, 0 deletions
diff --git a/drivers/net/e1000/e1000_hw.h b/drivers/net/e1000/e1000_hw.h
index 0848e556b1a9..f565b201c49e 100644
--- a/drivers/net/e1000/e1000_hw.h
+++ b/drivers/net/e1000/e1000_hw.h
@@ -1875,6 +1875,7 @@ struct e1000_hw {
1875#define E1000_MANC_TCO_RESET 0x00010000 /* TCO Reset Occurred */ 1875#define E1000_MANC_TCO_RESET 0x00010000 /* TCO Reset Occurred */
1876#define E1000_MANC_RCV_TCO_EN 0x00020000 /* Receive TCO Packets Enabled */ 1876#define E1000_MANC_RCV_TCO_EN 0x00020000 /* Receive TCO Packets Enabled */
1877#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */ 1877#define E1000_MANC_REPORT_STATUS 0x00040000 /* Status Reporting Enabled */
1878#define E1000_MANC_RCV_ALL 0x00080000 /* Receive All Enabled */
1878#define E1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 /* Block phy resets */ 1879#define E1000_MANC_BLK_PHY_RST_ON_IDE 0x00040000 /* Block phy resets */
1879#define E1000_MANC_EN_MAC_ADDR_FILTER 0x00100000 /* Enable MAC address 1880#define E1000_MANC_EN_MAC_ADDR_FILTER 0x00100000 /* Enable MAC address
1880 * filtering */ 1881 * filtering */
@@ -2036,6 +2037,7 @@ struct e1000_host_command_info {
2036#define EEPROM_INIT_CONTROL1_REG 0x000A 2037#define EEPROM_INIT_CONTROL1_REG 0x000A
2037#define EEPROM_INIT_CONTROL2_REG 0x000F 2038#define EEPROM_INIT_CONTROL2_REG 0x000F
2038#define EEPROM_INIT_CONTROL3_PORT_B 0x0014 2039#define EEPROM_INIT_CONTROL3_PORT_B 0x0014
2040#define EEPROM_INIT_3GIO_3 0x001A
2039#define EEPROM_INIT_CONTROL3_PORT_A 0x0024 2041#define EEPROM_INIT_CONTROL3_PORT_A 0x0024
2040#define EEPROM_CFG 0x0012 2042#define EEPROM_CFG 0x0012
2041#define EEPROM_FLASH_VERSION 0x0032 2043#define EEPROM_FLASH_VERSION 0x0032
@@ -2085,6 +2087,9 @@ struct e1000_host_command_info {
2085#define EEPROM_WORD0F_ANE 0x0800 2087#define EEPROM_WORD0F_ANE 0x0800
2086#define EEPROM_WORD0F_SWPDIO_EXT 0x00F0 2088#define EEPROM_WORD0F_SWPDIO_EXT 0x00F0
2087 2089
2090/* Mask bits for fields in Word 0x1a of the EEPROM */
2091#define EEPROM_WORD1A_ASPM_MASK 0x000C
2092
2088/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */ 2093/* For checksumming, the sum of all words in the EEPROM should equal 0xBABA. */
2089#define EEPROM_SUM 0xBABA 2094#define EEPROM_SUM 0xBABA
2090 2095