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authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2006-11-01 11:47:44 -0500
committerJeff Garzik <jeff@garzik.org>2006-12-02 00:11:59 -0500
commit070f6ffbb8ed5c398e84f1508752b8fd15b05cf2 (patch)
tree54ed16c4c1ab85e166c5245f1fcbdca5693e9c48 /drivers/net/e1000/e1000_hw.c
parent2ce9047f5d8464039da8ff986e71be5546e229c0 (diff)
e1000: fix VR powerdown code
On ich systems during PHY power down to D3, the voltage regulators were left on. Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com> Signed-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r--drivers/net/e1000/e1000_hw.c9
1 files changed, 5 insertions, 4 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index 29e6f6aba9e2..0e2ccf50d4d7 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -3942,14 +3942,15 @@ e1000_phy_powerdown_workaround(struct e1000_hw *hw)
3942 E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE | 3942 E1000_WRITE_REG(hw, PHY_CTRL, reg | E1000_PHY_CTRL_GBE_DISABLE |
3943 E1000_PHY_CTRL_NOND0A_GBE_DISABLE); 3943 E1000_PHY_CTRL_NOND0A_GBE_DISABLE);
3944 3944
3945 /* Write VR power-down enable */ 3945 /* Write VR power-down enable - bits 9:8 should be 10b */
3946 e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data); 3946 e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
3947 e1000_write_phy_reg(hw, IGP3_VR_CTRL, phy_data | 3947 phy_data |= (1 << 9);
3948 IGP3_VR_CTRL_MODE_SHUT); 3948 phy_data &= ~(1 << 8);
3949 e1000_write_phy_reg(hw, IGP3_VR_CTRL, phy_data);
3949 3950
3950 /* Read it back and test */ 3951 /* Read it back and test */
3951 e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data); 3952 e1000_read_phy_reg(hw, IGP3_VR_CTRL, &phy_data);
3952 if ((phy_data & IGP3_VR_CTRL_MODE_SHUT) || retry) 3953 if (((phy_data & IGP3_VR_CTRL_MODE_MASK) == IGP3_VR_CTRL_MODE_SHUT) || retry)
3953 break; 3954 break;
3954 3955
3955 /* Issue PHY reset and repeat at most one more time */ 3956 /* Issue PHY reset and repeat at most one more time */