diff options
author | Peter Oruba <peter.oruba@amd.com> | 2007-09-29 01:42:06 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-10 19:53:50 -0400 |
commit | 007755eb86c3953bb8615bd016246fc99056580c (patch) | |
tree | e981b57164e776ef9dcad02f6c519ff7d8e70372 /drivers/net/e1000/e1000_hw.c | |
parent | 7c32f470f4f6a0fdc6944cefcd22f288e59a0ae2 (diff) |
PCI-X/PCI-Express read control interfaces: use them in e1000
These driver changes incorporate the proposed PCI-X / PCI-Express read byte
count interface. Reading and setting those valuse doesn't take place
"manually", instead wrapping functions are called to allow quirks for some
PCI bridges.
Signed-off by: Peter Oruba <peter.oruba@amd.com>
Based on work by Stephen Hemminger <shemminger@linux-foundation.org>
Acked-by: Auke Kok <auke-jan.h.kok@intel.com>
Cc: Jeff Garzik <jeff@garzik.org>
Signed-off-by: Andrew Morton <akpm@linux-foundation.org>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r-- | drivers/net/e1000/e1000_hw.c | 25 |
1 files changed, 3 insertions, 22 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c index 8604adbe351c..8fa0fe4009d5 100644 --- a/drivers/net/e1000/e1000_hw.c +++ b/drivers/net/e1000/e1000_hw.c | |||
@@ -871,10 +871,6 @@ e1000_init_hw(struct e1000_hw *hw) | |||
871 | uint32_t ctrl; | 871 | uint32_t ctrl; |
872 | uint32_t i; | 872 | uint32_t i; |
873 | int32_t ret_val; | 873 | int32_t ret_val; |
874 | uint16_t pcix_cmd_word; | ||
875 | uint16_t pcix_stat_hi_word; | ||
876 | uint16_t cmd_mmrbc; | ||
877 | uint16_t stat_mmrbc; | ||
878 | uint32_t mta_size; | 874 | uint32_t mta_size; |
879 | uint32_t reg_data; | 875 | uint32_t reg_data; |
880 | uint32_t ctrl_ext; | 876 | uint32_t ctrl_ext; |
@@ -964,24 +960,9 @@ e1000_init_hw(struct e1000_hw *hw) | |||
964 | break; | 960 | break; |
965 | default: | 961 | default: |
966 | /* Workaround for PCI-X problem when BIOS sets MMRBC incorrectly. */ | 962 | /* Workaround for PCI-X problem when BIOS sets MMRBC incorrectly. */ |
967 | if (hw->bus_type == e1000_bus_type_pcix) { | 963 | if (hw->bus_type == e1000_bus_type_pcix && e1000_pcix_get_mmrbc(hw) > 2048) |
968 | e1000_read_pci_cfg(hw, PCIX_COMMAND_REGISTER, &pcix_cmd_word); | 964 | e1000_pcix_set_mmrbc(hw, 2048); |
969 | e1000_read_pci_cfg(hw, PCIX_STATUS_REGISTER_HI, | 965 | break; |
970 | &pcix_stat_hi_word); | ||
971 | cmd_mmrbc = (pcix_cmd_word & PCIX_COMMAND_MMRBC_MASK) >> | ||
972 | PCIX_COMMAND_MMRBC_SHIFT; | ||
973 | stat_mmrbc = (pcix_stat_hi_word & PCIX_STATUS_HI_MMRBC_MASK) >> | ||
974 | PCIX_STATUS_HI_MMRBC_SHIFT; | ||
975 | if (stat_mmrbc == PCIX_STATUS_HI_MMRBC_4K) | ||
976 | stat_mmrbc = PCIX_STATUS_HI_MMRBC_2K; | ||
977 | if (cmd_mmrbc > stat_mmrbc) { | ||
978 | pcix_cmd_word &= ~PCIX_COMMAND_MMRBC_MASK; | ||
979 | pcix_cmd_word |= stat_mmrbc << PCIX_COMMAND_MMRBC_SHIFT; | ||
980 | e1000_write_pci_cfg(hw, PCIX_COMMAND_REGISTER, | ||
981 | &pcix_cmd_word); | ||
982 | } | ||
983 | } | ||
984 | break; | ||
985 | } | 966 | } |
986 | 967 | ||
987 | /* More time needed for PHY to initialize */ | 968 | /* More time needed for PHY to initialize */ |