aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/e1000/e1000_hw.c
diff options
context:
space:
mode:
authorJeff Kirsher <jeffrey.t.kirsher@intel.com>2006-09-27 15:53:28 -0400
committerAuke Kok <juke-jan.h.kok@intel.com>2006-09-27 15:53:28 -0400
commit11241b106937ec470e0220ae5ce98c8ea27fd700 (patch)
tree040261cc937c59211001bc300a007fb162c69fd6 /drivers/net/e1000/e1000_hw.c
parent975b366af66280ed5b852a1a0446586ce71e306e (diff)
e1000: rename flow control symbols
Sogned-off-by: Jeff Kirsher <jeffrey.t.kirsher@intel.com> Signed-off-by: Auke Kok <auke-jan.h.kok@intel.com>
Diffstat (limited to 'drivers/net/e1000/e1000_hw.c')
-rw-r--r--drivers/net/e1000/e1000_hw.c84
1 files changed, 42 insertions, 42 deletions
diff --git a/drivers/net/e1000/e1000_hw.c b/drivers/net/e1000/e1000_hw.c
index c69f6c0512e3..b3e95c1a1dab 100644
--- a/drivers/net/e1000/e1000_hw.c
+++ b/drivers/net/e1000/e1000_hw.c
@@ -1017,11 +1017,11 @@ e1000_setup_link(struct e1000_hw *hw)
1017 * control setting, then the variable hw->fc will 1017 * control setting, then the variable hw->fc will
1018 * be initialized based on a value in the EEPROM. 1018 * be initialized based on a value in the EEPROM.
1019 */ 1019 */
1020 if (hw->fc == e1000_fc_default) { 1020 if (hw->fc == E1000_FC_DEFAULT) {
1021 switch (hw->mac_type) { 1021 switch (hw->mac_type) {
1022 case e1000_ich8lan: 1022 case e1000_ich8lan:
1023 case e1000_82573: 1023 case e1000_82573:
1024 hw->fc = e1000_fc_full; 1024 hw->fc = E1000_FC_FULL;
1025 break; 1025 break;
1026 default: 1026 default:
1027 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG, 1027 ret_val = e1000_read_eeprom(hw, EEPROM_INIT_CONTROL2_REG,
@@ -1031,12 +1031,12 @@ e1000_setup_link(struct e1000_hw *hw)
1031 return -E1000_ERR_EEPROM; 1031 return -E1000_ERR_EEPROM;
1032 } 1032 }
1033 if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 0) 1033 if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 0)
1034 hw->fc = e1000_fc_none; 1034 hw->fc = E1000_FC_NONE;
1035 else if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) == 1035 else if ((eeprom_data & EEPROM_WORD0F_PAUSE_MASK) ==
1036 EEPROM_WORD0F_ASM_DIR) 1036 EEPROM_WORD0F_ASM_DIR)
1037 hw->fc = e1000_fc_tx_pause; 1037 hw->fc = E1000_FC_TX_PAUSE;
1038 else 1038 else
1039 hw->fc = e1000_fc_full; 1039 hw->fc = E1000_FC_FULL;
1040 break; 1040 break;
1041 } 1041 }
1042 } 1042 }
@@ -1046,10 +1046,10 @@ e1000_setup_link(struct e1000_hw *hw)
1046 * hub or switch with different Flow Control capabilities. 1046 * hub or switch with different Flow Control capabilities.
1047 */ 1047 */
1048 if (hw->mac_type == e1000_82542_rev2_0) 1048 if (hw->mac_type == e1000_82542_rev2_0)
1049 hw->fc &= (~e1000_fc_tx_pause); 1049 hw->fc &= (~E1000_FC_TX_PAUSE);
1050 1050
1051 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1)) 1051 if ((hw->mac_type < e1000_82543) && (hw->report_tx_early == 1))
1052 hw->fc &= (~e1000_fc_rx_pause); 1052 hw->fc &= (~E1000_FC_RX_PAUSE);
1053 1053
1054 hw->original_fc = hw->fc; 1054 hw->original_fc = hw->fc;
1055 1055
@@ -1101,7 +1101,7 @@ e1000_setup_link(struct e1000_hw *hw)
1101 * ability to transmit pause frames in not enabled, then these 1101 * ability to transmit pause frames in not enabled, then these
1102 * registers will be set to 0. 1102 * registers will be set to 0.
1103 */ 1103 */
1104 if (!(hw->fc & e1000_fc_tx_pause)) { 1104 if (!(hw->fc & E1000_FC_TX_PAUSE)) {
1105 E1000_WRITE_REG(hw, FCRTL, 0); 1105 E1000_WRITE_REG(hw, FCRTL, 0);
1106 E1000_WRITE_REG(hw, FCRTH, 0); 1106 E1000_WRITE_REG(hw, FCRTH, 0);
1107 } else { 1107 } else {
@@ -1188,11 +1188,11 @@ e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
1188 * 3: Both Rx and TX flow control (symmetric) are enabled. 1188 * 3: Both Rx and TX flow control (symmetric) are enabled.
1189 */ 1189 */
1190 switch (hw->fc) { 1190 switch (hw->fc) {
1191 case e1000_fc_none: 1191 case E1000_FC_NONE:
1192 /* Flow control is completely disabled by a software over-ride. */ 1192 /* Flow control is completely disabled by a software over-ride. */
1193 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD); 1193 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD);
1194 break; 1194 break;
1195 case e1000_fc_rx_pause: 1195 case E1000_FC_RX_PAUSE:
1196 /* RX Flow control is enabled and TX Flow control is disabled by a 1196 /* RX Flow control is enabled and TX Flow control is disabled by a
1197 * software over-ride. Since there really isn't a way to advertise 1197 * software over-ride. Since there really isn't a way to advertise
1198 * that we are capable of RX Pause ONLY, we will advertise that we 1198 * that we are capable of RX Pause ONLY, we will advertise that we
@@ -1201,13 +1201,13 @@ e1000_setup_fiber_serdes_link(struct e1000_hw *hw)
1201 */ 1201 */
1202 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); 1202 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
1203 break; 1203 break;
1204 case e1000_fc_tx_pause: 1204 case E1000_FC_TX_PAUSE:
1205 /* TX Flow control is enabled, and RX Flow control is disabled, by a 1205 /* TX Flow control is enabled, and RX Flow control is disabled, by a
1206 * software over-ride. 1206 * software over-ride.
1207 */ 1207 */
1208 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR); 1208 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_ASM_DIR);
1209 break; 1209 break;
1210 case e1000_fc_full: 1210 case E1000_FC_FULL:
1211 /* Flow control (both RX and TX) is enabled by a software over-ride. */ 1211 /* Flow control (both RX and TX) is enabled by a software over-ride. */
1212 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK); 1212 txcw = (E1000_TXCW_ANE | E1000_TXCW_FD | E1000_TXCW_PAUSE_MASK);
1213 break; 1213 break;
@@ -2123,13 +2123,13 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
2123 * in the EEPROM is used. 2123 * in the EEPROM is used.
2124 */ 2124 */
2125 switch (hw->fc) { 2125 switch (hw->fc) {
2126 case e1000_fc_none: /* 0 */ 2126 case E1000_FC_NONE: /* 0 */
2127 /* Flow control (RX & TX) is completely disabled by a 2127 /* Flow control (RX & TX) is completely disabled by a
2128 * software over-ride. 2128 * software over-ride.
2129 */ 2129 */
2130 mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); 2130 mii_autoneg_adv_reg &= ~(NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
2131 break; 2131 break;
2132 case e1000_fc_rx_pause: /* 1 */ 2132 case E1000_FC_RX_PAUSE: /* 1 */
2133 /* RX Flow control is enabled, and TX Flow control is 2133 /* RX Flow control is enabled, and TX Flow control is
2134 * disabled, by a software over-ride. 2134 * disabled, by a software over-ride.
2135 */ 2135 */
@@ -2141,14 +2141,14 @@ e1000_phy_setup_autoneg(struct e1000_hw *hw)
2141 */ 2141 */
2142 mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE); 2142 mii_autoneg_adv_reg |= (NWAY_AR_ASM_DIR | NWAY_AR_PAUSE);
2143 break; 2143 break;
2144 case e1000_fc_tx_pause: /* 2 */ 2144 case E1000_FC_TX_PAUSE: /* 2 */
2145 /* TX Flow control is enabled, and RX Flow control is 2145 /* TX Flow control is enabled, and RX Flow control is
2146 * disabled, by a software over-ride. 2146 * disabled, by a software over-ride.
2147 */ 2147 */
2148 mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR; 2148 mii_autoneg_adv_reg |= NWAY_AR_ASM_DIR;
2149 mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE; 2149 mii_autoneg_adv_reg &= ~NWAY_AR_PAUSE;
2150 break; 2150 break;
2151 case e1000_fc_full: /* 3 */ 2151 case E1000_FC_FULL: /* 3 */
2152 /* Flow control (both RX and TX) is enabled by a software 2152 /* Flow control (both RX and TX) is enabled by a software
2153 * over-ride. 2153 * over-ride.
2154 */ 2154 */
@@ -2192,7 +2192,7 @@ e1000_phy_force_speed_duplex(struct e1000_hw *hw)
2192 DEBUGFUNC("e1000_phy_force_speed_duplex"); 2192 DEBUGFUNC("e1000_phy_force_speed_duplex");
2193 2193
2194 /* Turn off Flow control if we are forcing speed and duplex. */ 2194 /* Turn off Flow control if we are forcing speed and duplex. */
2195 hw->fc = e1000_fc_none; 2195 hw->fc = E1000_FC_NONE;
2196 2196
2197 DEBUGOUT1("hw->fc = %d\n", hw->fc); 2197 DEBUGOUT1("hw->fc = %d\n", hw->fc);
2198 2198
@@ -2546,18 +2546,18 @@ e1000_force_mac_fc(struct e1000_hw *hw)
2546 */ 2546 */
2547 2547
2548 switch (hw->fc) { 2548 switch (hw->fc) {
2549 case e1000_fc_none: 2549 case E1000_FC_NONE:
2550 ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE)); 2550 ctrl &= (~(E1000_CTRL_TFCE | E1000_CTRL_RFCE));
2551 break; 2551 break;
2552 case e1000_fc_rx_pause: 2552 case E1000_FC_RX_PAUSE:
2553 ctrl &= (~E1000_CTRL_TFCE); 2553 ctrl &= (~E1000_CTRL_TFCE);
2554 ctrl |= E1000_CTRL_RFCE; 2554 ctrl |= E1000_CTRL_RFCE;
2555 break; 2555 break;
2556 case e1000_fc_tx_pause: 2556 case E1000_FC_TX_PAUSE:
2557 ctrl &= (~E1000_CTRL_RFCE); 2557 ctrl &= (~E1000_CTRL_RFCE);
2558 ctrl |= E1000_CTRL_TFCE; 2558 ctrl |= E1000_CTRL_TFCE;
2559 break; 2559 break;
2560 case e1000_fc_full: 2560 case E1000_FC_FULL:
2561 ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE); 2561 ctrl |= (E1000_CTRL_TFCE | E1000_CTRL_RFCE);
2562 break; 2562 break;
2563 default: 2563 default:
@@ -2656,14 +2656,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2656 * LOCAL DEVICE | LINK PARTNER 2656 * LOCAL DEVICE | LINK PARTNER
2657 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution 2657 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | NIC Resolution
2658 *-------|---------|-------|---------|-------------------- 2658 *-------|---------|-------|---------|--------------------
2659 * 0 | 0 | DC | DC | e1000_fc_none 2659 * 0 | 0 | DC | DC | E1000_FC_NONE
2660 * 0 | 1 | 0 | DC | e1000_fc_none 2660 * 0 | 1 | 0 | DC | E1000_FC_NONE
2661 * 0 | 1 | 1 | 0 | e1000_fc_none 2661 * 0 | 1 | 1 | 0 | E1000_FC_NONE
2662 * 0 | 1 | 1 | 1 | e1000_fc_tx_pause 2662 * 0 | 1 | 1 | 1 | E1000_FC_TX_PAUSE
2663 * 1 | 0 | 0 | DC | e1000_fc_none 2663 * 1 | 0 | 0 | DC | E1000_FC_NONE
2664 * 1 | DC | 1 | DC | e1000_fc_full 2664 * 1 | DC | 1 | DC | E1000_FC_FULL
2665 * 1 | 1 | 0 | 0 | e1000_fc_none 2665 * 1 | 1 | 0 | 0 | E1000_FC_NONE
2666 * 1 | 1 | 0 | 1 | e1000_fc_rx_pause 2666 * 1 | 1 | 0 | 1 | E1000_FC_RX_PAUSE
2667 * 2667 *
2668 */ 2668 */
2669 /* Are both PAUSE bits set to 1? If so, this implies 2669 /* Are both PAUSE bits set to 1? If so, this implies
@@ -2675,7 +2675,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2675 * LOCAL DEVICE | LINK PARTNER 2675 * LOCAL DEVICE | LINK PARTNER
2676 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result 2676 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
2677 *-------|---------|-------|---------|-------------------- 2677 *-------|---------|-------|---------|--------------------
2678 * 1 | DC | 1 | DC | e1000_fc_full 2678 * 1 | DC | 1 | DC | E1000_FC_FULL
2679 * 2679 *
2680 */ 2680 */
2681 if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && 2681 if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
@@ -2686,11 +2686,11 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2686 * ONLY. Hence, we must now check to see if we need to 2686 * ONLY. Hence, we must now check to see if we need to
2687 * turn OFF the TRANSMISSION of PAUSE frames. 2687 * turn OFF the TRANSMISSION of PAUSE frames.
2688 */ 2688 */
2689 if (hw->original_fc == e1000_fc_full) { 2689 if (hw->original_fc == E1000_FC_FULL) {
2690 hw->fc = e1000_fc_full; 2690 hw->fc = E1000_FC_FULL;
2691 DEBUGOUT("Flow Control = FULL.\n"); 2691 DEBUGOUT("Flow Control = FULL.\n");
2692 } else { 2692 } else {
2693 hw->fc = e1000_fc_rx_pause; 2693 hw->fc = E1000_FC_RX_PAUSE;
2694 DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); 2694 DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
2695 } 2695 }
2696 } 2696 }
@@ -2699,14 +2699,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2699 * LOCAL DEVICE | LINK PARTNER 2699 * LOCAL DEVICE | LINK PARTNER
2700 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result 2700 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
2701 *-------|---------|-------|---------|-------------------- 2701 *-------|---------|-------|---------|--------------------
2702 * 0 | 1 | 1 | 1 | e1000_fc_tx_pause 2702 * 0 | 1 | 1 | 1 | E1000_FC_TX_PAUSE
2703 * 2703 *
2704 */ 2704 */
2705 else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) && 2705 else if (!(mii_nway_adv_reg & NWAY_AR_PAUSE) &&
2706 (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && 2706 (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
2707 (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && 2707 (mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
2708 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { 2708 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
2709 hw->fc = e1000_fc_tx_pause; 2709 hw->fc = E1000_FC_TX_PAUSE;
2710 DEBUGOUT("Flow Control = TX PAUSE frames only.\n"); 2710 DEBUGOUT("Flow Control = TX PAUSE frames only.\n");
2711 } 2711 }
2712 /* For transmitting PAUSE frames ONLY. 2712 /* For transmitting PAUSE frames ONLY.
@@ -2714,14 +2714,14 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2714 * LOCAL DEVICE | LINK PARTNER 2714 * LOCAL DEVICE | LINK PARTNER
2715 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result 2715 * PAUSE | ASM_DIR | PAUSE | ASM_DIR | Result
2716 *-------|---------|-------|---------|-------------------- 2716 *-------|---------|-------|---------|--------------------
2717 * 1 | 1 | 0 | 1 | e1000_fc_rx_pause 2717 * 1 | 1 | 0 | 1 | E1000_FC_RX_PAUSE
2718 * 2718 *
2719 */ 2719 */
2720 else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) && 2720 else if ((mii_nway_adv_reg & NWAY_AR_PAUSE) &&
2721 (mii_nway_adv_reg & NWAY_AR_ASM_DIR) && 2721 (mii_nway_adv_reg & NWAY_AR_ASM_DIR) &&
2722 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) && 2722 !(mii_nway_lp_ability_reg & NWAY_LPAR_PAUSE) &&
2723 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) { 2723 (mii_nway_lp_ability_reg & NWAY_LPAR_ASM_DIR)) {
2724 hw->fc = e1000_fc_rx_pause; 2724 hw->fc = E1000_FC_RX_PAUSE;
2725 DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); 2725 DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
2726 } 2726 }
2727 /* Per the IEEE spec, at this point flow control should be 2727 /* Per the IEEE spec, at this point flow control should be
@@ -2744,13 +2744,13 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2744 * be asked to delay transmission of packets than asking 2744 * be asked to delay transmission of packets than asking
2745 * our link partner to pause transmission of frames. 2745 * our link partner to pause transmission of frames.
2746 */ 2746 */
2747 else if ((hw->original_fc == e1000_fc_none || 2747 else if ((hw->original_fc == E1000_FC_NONE ||
2748 hw->original_fc == e1000_fc_tx_pause) || 2748 hw->original_fc == E1000_FC_TX_PAUSE) ||
2749 hw->fc_strict_ieee) { 2749 hw->fc_strict_ieee) {
2750 hw->fc = e1000_fc_none; 2750 hw->fc = E1000_FC_NONE;
2751 DEBUGOUT("Flow Control = NONE.\n"); 2751 DEBUGOUT("Flow Control = NONE.\n");
2752 } else { 2752 } else {
2753 hw->fc = e1000_fc_rx_pause; 2753 hw->fc = E1000_FC_RX_PAUSE;
2754 DEBUGOUT("Flow Control = RX PAUSE frames only.\n"); 2754 DEBUGOUT("Flow Control = RX PAUSE frames only.\n");
2755 } 2755 }
2756 2756
@@ -2765,7 +2765,7 @@ e1000_config_fc_after_link_up(struct e1000_hw *hw)
2765 } 2765 }
2766 2766
2767 if (duplex == HALF_DUPLEX) 2767 if (duplex == HALF_DUPLEX)
2768 hw->fc = e1000_fc_none; 2768 hw->fc = E1000_FC_NONE;
2769 2769
2770 /* Now we call a subroutine to actually force the MAC 2770 /* Now we call a subroutine to actually force the MAC
2771 * controller to use the correct flow control settings. 2771 * controller to use the correct flow control settings.