diff options
author | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@ppc970.osdl.org> | 2005-04-16 18:20:36 -0400 |
commit | 1da177e4c3f41524e886b7f1b8a0c1fc7321cac2 (patch) | |
tree | 0bba044c4ce775e45a88a51686b5d9f90697ea9d /drivers/net/dgrs_i82596.h |
Linux-2.6.12-rc2v2.6.12-rc2
Initial git repository build. I'm not bothering with the full history,
even though we have it. We can create a separate "historical" git
archive of that later if we want to, and in the meantime it's about
3.2GB when imported into git - space that would just make the early
git days unnecessarily complicated, when we don't have a lot of good
infrastructure for it.
Let it rip!
Diffstat (limited to 'drivers/net/dgrs_i82596.h')
-rw-r--r-- | drivers/net/dgrs_i82596.h | 473 |
1 files changed, 473 insertions, 0 deletions
diff --git a/drivers/net/dgrs_i82596.h b/drivers/net/dgrs_i82596.h new file mode 100644 index 000000000000..c7a38c16a00b --- /dev/null +++ b/drivers/net/dgrs_i82596.h | |||
@@ -0,0 +1,473 @@ | |||
1 | /* | ||
2 | * i82596 ethernet controller bits and structures (little endian) | ||
3 | * | ||
4 | * $Id: i82596.h,v 1.8 1996/09/03 11:19:03 rick Exp $ | ||
5 | */ | ||
6 | |||
7 | /************************************************************************/ | ||
8 | /* */ | ||
9 | /* PORT commands (p. 4-20). The least significant nibble is one */ | ||
10 | /* of these commands, the rest of the command is a memory address */ | ||
11 | /* aligned on a 16 byte boundary. Note that port commands must */ | ||
12 | /* be written to the PORT address and the PORT address+2 with two */ | ||
13 | /* halfword writes. Write the LSH first to PORT, then the MSH to */ | ||
14 | /* PORT+2. Blame Intel. */ | ||
15 | /* */ | ||
16 | /************************************************************************/ | ||
17 | #define I596_PORT_RESET 0x0 /* Reset. Wait 5 SysClks & 10 TxClks */ | ||
18 | #define I596_PORT_SELFTEST 0x1 /* Do a selftest */ | ||
19 | #define I596_PORT_SCP_ADDR 0x2 /* Set new SCP address */ | ||
20 | #define I596_PORT_DUMP 0x3 /* Dump internal data structures */ | ||
21 | |||
22 | /* | ||
23 | * I596_ST: Selftest results (p. 4-21) | ||
24 | */ | ||
25 | typedef volatile struct | ||
26 | { | ||
27 | ulong signature; /* ROM checksum */ | ||
28 | ulong result; /* Selftest results: non-zero is a failure */ | ||
29 | } I596_ST; | ||
30 | |||
31 | #define I596_ST_SELFTEST_FAIL 0x1000 /* Selftest Failed */ | ||
32 | #define I596_ST_DIAGNOSE_FAIL 0x0020 /* Diagnose Failed */ | ||
33 | #define I596_ST_BUSTIMER_FAIL 0x0010 /* Bus Timer Failed */ | ||
34 | #define I596_ST_REGISTER_FAIL 0x0008 /* Register Failed */ | ||
35 | #define I596_ST_ROM_FAIL 0x0004 /* ROM Failed */ | ||
36 | |||
37 | /* | ||
38 | * I596_DUMP: Dump results | ||
39 | */ | ||
40 | typedef volatile struct | ||
41 | { | ||
42 | ulong dump[77]; | ||
43 | } I596_DUMP; | ||
44 | |||
45 | /************************************************************************/ | ||
46 | /* */ | ||
47 | /* I596_TBD: Transmit Buffer Descriptor (p. 4-59) */ | ||
48 | /* */ | ||
49 | /************************************************************************/ | ||
50 | typedef volatile struct _I596_TBD | ||
51 | { | ||
52 | ulong count; | ||
53 | vol struct _I596_TBD *next; | ||
54 | uchar *buf; | ||
55 | ushort unused1; | ||
56 | ushort unused2; | ||
57 | } I596_TBD; | ||
58 | |||
59 | #define I596_TBD_NOLINK ((I596_TBD *) 0xffffffff) | ||
60 | #define I596_TBD_EOF 0x8000 | ||
61 | #define I596_TBD_COUNT_MASK 0x3fff | ||
62 | |||
63 | /************************************************************************/ | ||
64 | /* */ | ||
65 | /* I596_TFD: Transmit Frame Descriptor (p. 4-56) */ | ||
66 | /* a.k.a. I596_CB_XMIT */ | ||
67 | /* */ | ||
68 | /************************************************************************/ | ||
69 | typedef volatile struct | ||
70 | { | ||
71 | ushort status; | ||
72 | ushort cmd; | ||
73 | union _I596_CB *next; | ||
74 | I596_TBD *tbdp; | ||
75 | ulong count; /* for speed */ | ||
76 | |||
77 | /* Application defined data follows structure... */ | ||
78 | |||
79 | #if 0 /* We don't use these intel defined ones */ | ||
80 | uchar addr[6]; | ||
81 | ushort len; | ||
82 | uchar data[1]; | ||
83 | #else | ||
84 | ulong dstchan;/* Used by multi-NIC mode */ | ||
85 | #endif | ||
86 | } I596_TFD; | ||
87 | |||
88 | #define I596_TFD_NOCRC 0x0010 /* cmd: No CRC insertion */ | ||
89 | #define I596_TFD_FLEX 0x0008 /* cmd: Flexible mode */ | ||
90 | |||
91 | /************************************************************************/ | ||
92 | /* */ | ||
93 | /* I596_RBD: Receive Buffer Descriptor (p. 4-84) */ | ||
94 | /* */ | ||
95 | /************************************************************************/ | ||
96 | typedef volatile struct _I596_RBD | ||
97 | { | ||
98 | #ifdef INTEL_RETENTIVE | ||
99 | ushort count; /* Length of data in buf */ | ||
100 | ushort offset; | ||
101 | #else | ||
102 | ulong count; /* Length of data in buf */ | ||
103 | #endif | ||
104 | vol struct _I596_RBD *next; /* Next buffer descriptor in list */ | ||
105 | uchar *buf; /* Data buffer */ | ||
106 | #ifdef INTEL_RETENTIVE | ||
107 | ushort size; /* Size of buf (constant) */ | ||
108 | ushort zero; | ||
109 | #else | ||
110 | ulong size; /* Size of buf (constant) */ | ||
111 | #endif | ||
112 | |||
113 | /* Application defined data follows structure... */ | ||
114 | |||
115 | uchar chan; | ||
116 | uchar refcnt; | ||
117 | ushort len; | ||
118 | } I596_RBD; | ||
119 | |||
120 | #define I596_RBD_NOLINK ((I596_RBD *) 0xffffffff) | ||
121 | #define I596_RBD_EOF 0x8000 /* This is last buffer in a frame */ | ||
122 | #define I596_RBD_F 0x4000 /* The actual count is valid */ | ||
123 | |||
124 | #define I596_RBD_EL 0x8000 /* Last buffer in list */ | ||
125 | |||
126 | /************************************************************************/ | ||
127 | /* */ | ||
128 | /* I596_RFD: Receive Frame Descriptor (p. 4-79) */ | ||
129 | /* */ | ||
130 | /************************************************************************/ | ||
131 | typedef volatile struct _I596_RFD | ||
132 | { | ||
133 | ushort status; | ||
134 | ushort cmd; | ||
135 | vol struct _I596_RFD *next; | ||
136 | vol struct _I596_RBD *rbdp; | ||
137 | ushort count; /* Len of data in RFD: always 0 */ | ||
138 | ushort size; /* Size of RFD buffer: always 0 */ | ||
139 | |||
140 | /* Application defined data follows structure... */ | ||
141 | |||
142 | # if 0 /* We don't use these intel defined ones */ | ||
143 | uchar addr[6]; | ||
144 | ushort len; | ||
145 | uchar data[1]; | ||
146 | # else | ||
147 | ulong dstchan;/* Used by multi-nic mode */ | ||
148 | # endif | ||
149 | } I596_RFD; | ||
150 | |||
151 | #define I596_RFD_C 0x8000 /* status: frame complete */ | ||
152 | #define I596_RFD_B 0x4000 /* status: frame busy or waiting */ | ||
153 | #define I596_RFD_OK 0x2000 /* status: frame OK */ | ||
154 | #define I596_RFD_ERR_LENGTH 0x1000 /* status: length error */ | ||
155 | #define I596_RFD_ERR_CRC 0x0800 /* status: CRC error */ | ||
156 | #define I596_RFD_ERR_ALIGN 0x0400 /* status: alignment error */ | ||
157 | #define I596_RFD_ERR_NOBUFS 0x0200 /* status: resource error */ | ||
158 | #define I596_RFD_ERR_DMA 0x0100 /* status: DMA error */ | ||
159 | #define I596_RFD_ERR_SHORT 0x0080 /* status: too short error */ | ||
160 | #define I596_RFD_NOMATCH 0x0002 /* status: IA was not matched */ | ||
161 | #define I596_RFD_COLLISION 0x0001 /* status: collision during receive */ | ||
162 | |||
163 | #define I596_RFD_EL 0x8000 /* cmd: end of RFD list */ | ||
164 | #define I596_RFD_FLEX 0x0008 /* cmd: Flexible mode */ | ||
165 | #define I596_RFD_EOF 0x8000 /* count: last buffer in the frame */ | ||
166 | #define I596_RFD_F 0x4000 /* count: The actual count is valid */ | ||
167 | |||
168 | /************************************************************************/ | ||
169 | /* */ | ||
170 | /* Commands */ | ||
171 | /* */ | ||
172 | /************************************************************************/ | ||
173 | |||
174 | /* values for cmd halfword in all the structs below */ | ||
175 | #define I596_CB_CMD 0x07 /* CB COMMANDS */ | ||
176 | #define I596_CB_CMD_NOP 0 | ||
177 | #define I596_CB_CMD_IA 1 | ||
178 | #define I596_CB_CMD_CONF 2 | ||
179 | #define I596_CB_CMD_MCAST 3 | ||
180 | #define I596_CB_CMD_XMIT 4 | ||
181 | #define I596_CB_CMD_TDR 5 | ||
182 | #define I596_CB_CMD_DUMP 6 | ||
183 | #define I596_CB_CMD_DIAG 7 | ||
184 | |||
185 | #define I596_CB_CMD_EL 0x8000 /* CB is last in linked list */ | ||
186 | #define I596_CB_CMD_S 0x4000 /* Suspend after execution */ | ||
187 | #define I596_CB_CMD_I 0x2000 /* cause interrupt */ | ||
188 | |||
189 | /* values for the status halfword in all the struct below */ | ||
190 | #define I596_CB_STATUS 0xF000 /* All four status bits */ | ||
191 | #define I596_CB_STATUS_C 0x8000 /* Command complete */ | ||
192 | #define I596_CB_STATUS_B 0x4000 /* Command busy executing */ | ||
193 | #define I596_CB_STATUS_C_OR_B 0xC000 /* Command complete or busy */ | ||
194 | #define I596_CB_STATUS_OK 0x2000 /* Command complete, no errors */ | ||
195 | #define I596_CB_STATUS_A 0x1000 /* Command busy executing */ | ||
196 | |||
197 | #define I596_CB_NOLINK ((I596_CB *) 0xffffffff) | ||
198 | |||
199 | /* | ||
200 | * I596_CB_NOP: NOP Command (p. 4-34) | ||
201 | */ | ||
202 | typedef volatile struct | ||
203 | { | ||
204 | ushort status; | ||
205 | ushort cmd; | ||
206 | union _I596_CB *next; | ||
207 | } I596_CB_NOP; | ||
208 | |||
209 | /* | ||
210 | * Same as above, but command and status in one ulong for speed | ||
211 | */ | ||
212 | typedef volatile struct | ||
213 | { | ||
214 | ulong csr; | ||
215 | union _I596_CB *next; | ||
216 | } I596_CB_FAST; | ||
217 | #define FASTs(X) (X) | ||
218 | #define FASTc(X) ((X)<<16) | ||
219 | |||
220 | /* | ||
221 | * I596_CB_IA: Individual (MAC) Address Command (p. 4-35) | ||
222 | */ | ||
223 | typedef volatile struct | ||
224 | { | ||
225 | ushort status; | ||
226 | ushort cmd; | ||
227 | union _I596_CB *next; | ||
228 | uchar addr[6]; | ||
229 | } I596_CB_IA; | ||
230 | |||
231 | /* | ||
232 | * I596_CB_CONF: Configure Command (p. 4-37) | ||
233 | */ | ||
234 | typedef volatile struct | ||
235 | { | ||
236 | ushort status; | ||
237 | ushort cmd; | ||
238 | union _I596_CB *next; | ||
239 | uchar conf[14]; | ||
240 | } I596_CB_CONF; | ||
241 | |||
242 | #define I596_CONF0_P 0x80 /* Enable RBD Prefetch Bit */ | ||
243 | #define I596_CONF0_COUNT 14 /* Count of configuration bytes */ | ||
244 | |||
245 | #define I596_CONF1_MON_OFF 0xC0 /* Monitor mode: Monitor off */ | ||
246 | #define I596_CONF1_MON_ON 0x80 /* Monitor mode: Monitor on */ | ||
247 | #define I596_CONF1_TxFIFO(W) (W) /* TxFIFO trigger, in words */ | ||
248 | |||
249 | #define I596_CONF2_SAVEBF 0x80 /* Save bad frames */ | ||
250 | |||
251 | #define I596_CONF3_ADDRLEN(B) (B) /* Address length */ | ||
252 | #define I596_CONF3_NOSRCINSERT 0x08 /* Do not insert source address */ | ||
253 | #define I596_CONF3_PREAMBLE8 0x20 /* 8 byte preamble */ | ||
254 | #define I596_CONF3_LOOPOFF 0x00 /* Loopback: Off */ | ||
255 | #define I596_CONF3_LOOPINT 0x40 /* Loopback: internal */ | ||
256 | #define I596_CONF3_LOOPEXT 0xC0 /* Loopback: external */ | ||
257 | |||
258 | #define I596_CONF4_LINPRI(ST) (ST) /* Linear priority: slot times */ | ||
259 | #define I596_CONF4_EXPPRI(ST) (ST) /* Exponential priority: slot times */ | ||
260 | #define I596_CONF4_IEEE_BOM 0 /* IEEE 802.3 backoff method */ | ||
261 | |||
262 | #define I596_CONF5_IFS(X) (X) /* Interframe spacing in clocks */ | ||
263 | |||
264 | #define I596_CONF6_ST_LOW(X) (X&255) /* Slot time, low byte */ | ||
265 | |||
266 | #define I596_CONF7_ST_HI(X) (X>>8) /* Slot time, high bits */ | ||
267 | #define I596_CONF7_RETRY(X) (X<<4) /* Max retry number */ | ||
268 | |||
269 | #define I596_CONF8_PROMISC 0x01 /* Rcv all frames */ | ||
270 | #define I596_CONF8_NOBROAD 0x02 | ||
271 | #define I596_CONF8_MANCHESTER 0x04 | ||
272 | #define I596_CONF8_TxNOCRS 0x08 | ||
273 | #define I596_CONF8_NOCRC 0x10 | ||
274 | #define I596_CONF8_CRC_CCITT 0x20 | ||
275 | #define I596_CONF8_BITSTUFFING 0x40 | ||
276 | #define I596_CONF8_PADDING 0x80 | ||
277 | |||
278 | #define I596_CONF9_CSFILTER(X) (X) | ||
279 | #define I596_CONF9_CSINT(X) 0x08 | ||
280 | #define I596_CONF9_CDFILTER(X) (X<<4) | ||
281 | #define I596_CONF9_CDINT(X) 0x80 | ||
282 | |||
283 | #define I596_CONF10_MINLEN(X) (X) /* Minimum frame length */ | ||
284 | |||
285 | #define I596_CONF11_PRECRS_ 0x01 /* Preamble before carrier sense */ | ||
286 | #define I596_CONF11_LNGFLD_ 0x02 /* Padding in End of Carrier */ | ||
287 | #define I596_CONF11_CRCINM_ 0x04 /* CRC in memory */ | ||
288 | #define I596_CONF11_AUTOTX 0x08 /* Auto retransmit */ | ||
289 | #define I596_CONF11_CSBSAC_ 0x10 /* Collision detect by src addr cmp. */ | ||
290 | #define I596_CONF11_MCALL_ 0x20 /* Multicast all */ | ||
291 | |||
292 | #define I596_CONF13_RESERVED 0x3f /* Reserved: must be ones */ | ||
293 | #define I596_CONF13_MULTIA 0x40 /* Enable multiple addr. reception */ | ||
294 | #define I596_CONF13_DISBOF 0x80 /* Disable backoff algorithm */ | ||
295 | /* | ||
296 | * I596_CB_MCAST: Multicast-Setup Command (p. 4-54) | ||
297 | */ | ||
298 | typedef volatile struct | ||
299 | { | ||
300 | ushort status; | ||
301 | ushort cmd; | ||
302 | union _I596_CB *next; | ||
303 | ushort count; /* Number of 6-byte addrs that follow */ | ||
304 | uchar addr[6][1]; | ||
305 | } I596_CB_MCAST; | ||
306 | |||
307 | /* | ||
308 | * I596_CB_XMIT: Transmit Command (p. 4-56) | ||
309 | */ | ||
310 | typedef I596_TFD I596_CB_XMIT; | ||
311 | |||
312 | #define I596_CB_XMIT_NOCRC 0x0010 /* cmd: No CRC insertion */ | ||
313 | #define I596_CB_XMIT_FLEX 0x0008 /* cmd: Flexible memory mode */ | ||
314 | |||
315 | #define I596_CB_XMIT_ERR_LATE 0x0800 /* status: error: late collision */ | ||
316 | #define I596_CB_XMIT_ERR_NOCRS 0x0400 /* status: error: no carriers sense */ | ||
317 | #define I596_CB_XMIT_ERR_NOCTS 0x0200 /* status: error: loss of CTS */ | ||
318 | #define I596_CB_XMIT_ERR_UNDER 0x0100 /* status: error: DMA underrun */ | ||
319 | #define I596_CB_XMIT_ERR_MAXCOL 0x0020 /* status: error: maximum collisions */ | ||
320 | #define I596_CB_XMIT_COLLISIONS 0x000f /* status: number of collisions */ | ||
321 | |||
322 | /* | ||
323 | * I596_CB_TDR: Time Domain Reflectometry Command (p. 4-63) | ||
324 | */ | ||
325 | typedef volatile struct | ||
326 | { | ||
327 | ushort status; | ||
328 | ushort cmd; | ||
329 | union _I596_CB *next; | ||
330 | ushort time; | ||
331 | } I596_CB_TDR; | ||
332 | |||
333 | /* | ||
334 | * I596_CB_DUMP: Dump Command (p. 4-65) | ||
335 | */ | ||
336 | typedef volatile struct | ||
337 | { | ||
338 | ushort status; | ||
339 | ushort cmd; | ||
340 | union _I596_CB *next; | ||
341 | uchar *buf; | ||
342 | } I596_CB_DUMP; | ||
343 | |||
344 | /* | ||
345 | * I596_CB_DIAG: Diagnose Command (p. 4-77) | ||
346 | */ | ||
347 | typedef volatile struct | ||
348 | { | ||
349 | ushort status; | ||
350 | ushort cmd; | ||
351 | union _I596_CB *next; | ||
352 | } I596_CB_DIAG; | ||
353 | |||
354 | /* | ||
355 | * I596_CB: Command Block | ||
356 | */ | ||
357 | typedef union _I596_CB | ||
358 | { | ||
359 | I596_CB_NOP nop; | ||
360 | I596_CB_IA ia; | ||
361 | I596_CB_CONF conf; | ||
362 | I596_CB_MCAST mcast; | ||
363 | I596_CB_XMIT xmit; | ||
364 | I596_CB_TDR tdr; | ||
365 | I596_CB_DUMP dump; | ||
366 | I596_CB_DIAG diag; | ||
367 | |||
368 | /* command and status in one ulong for speed... */ | ||
369 | I596_CB_FAST fast; | ||
370 | } I596_CB; | ||
371 | |||
372 | /************************************************************************/ | ||
373 | /* */ | ||
374 | /* I596_SCB: System Configuration Block (p. 4-26) */ | ||
375 | /* */ | ||
376 | /************************************************************************/ | ||
377 | typedef volatile struct | ||
378 | { | ||
379 | volatile ushort status; /* Status word */ | ||
380 | volatile ushort cmd; /* Command word */ | ||
381 | I596_CB *cbp; | ||
382 | I596_RFD *rfdp; | ||
383 | ulong crc_errs; | ||
384 | ulong align_errs; | ||
385 | ulong resource_errs; | ||
386 | ulong overrun_errs; | ||
387 | ulong rcvcdt_errs; | ||
388 | ulong short_errs; | ||
389 | ushort toff; | ||
390 | ushort ton; | ||
391 | } I596_SCB; | ||
392 | |||
393 | /* cmd halfword values */ | ||
394 | #define I596_SCB_ACK 0xF000 /* ACKNOWLEDGMENTS */ | ||
395 | #define I596_SCB_ACK_CX 0x8000 /* Ack command completion */ | ||
396 | #define I596_SCB_ACK_FR 0x4000 /* Ack received frame */ | ||
397 | #define I596_SCB_ACK_CNA 0x2000 /* Ack command unit not active */ | ||
398 | #define I596_SCB_ACK_RNR 0x1000 /* Ack rcv unit not ready */ | ||
399 | #define I596_SCB_ACK_ALL 0xF000 /* Ack everything */ | ||
400 | |||
401 | #define I596_SCB_CUC 0x0700 /* COMMAND UNIT COMMANDS */ | ||
402 | #define I596_SCB_CUC_NOP 0x0000 /* No operation */ | ||
403 | #define I596_SCB_CUC_START 0x0100 /* Start execution of first CB */ | ||
404 | #define I596_SCB_CUC_RESUME 0x0200 /* Resume execution */ | ||
405 | #define I596_SCB_CUC_SUSPEND 0x0300 /* Suspend after current CB */ | ||
406 | #define I596_SCB_CUC_ABORT 0x0400 /* Abort current CB immediately */ | ||
407 | #define I596_SCB_CUC_LOAD 0x0500 /* Load Bus throttle timers */ | ||
408 | #define I596_SCB_CUC_LOADIMM 0x0600 /* Load Bus throttle timers, now */ | ||
409 | |||
410 | #define I596_SCB_RUC 0x0070 /* RECEIVE UNIT COMMANDS */ | ||
411 | #define I596_SCB_RUC_NOP 0x0000 /* No operation */ | ||
412 | #define I596_SCB_RUC_START 0x0010 /* Start reception */ | ||
413 | #define I596_SCB_RUC_RESUME 0x0020 /* Resume reception */ | ||
414 | #define I596_SCB_RUC_SUSPEND 0x0030 /* Suspend reception */ | ||
415 | #define I596_SCB_RUC_ABORT 0x0040 /* Abort reception */ | ||
416 | |||
417 | #define I596_SCB_RESET 0x0080 /* Hard reset chip */ | ||
418 | |||
419 | /* status halfword values */ | ||
420 | #define I596_SCB_STAT 0xF000 /* STATUS */ | ||
421 | #define I596_SCB_CX 0x8000 /* command completion */ | ||
422 | #define I596_SCB_FR 0x4000 /* received frame */ | ||
423 | #define I596_SCB_CNA 0x2000 /* command unit not active */ | ||
424 | #define I596_SCB_RNR 0x1000 /* rcv unit not ready */ | ||
425 | |||
426 | #define I596_SCB_CUS 0x0700 /* COMMAND UNIT STATUS */ | ||
427 | #define I596_SCB_CUS_IDLE 0x0000 /* Idle */ | ||
428 | #define I596_SCB_CUS_SUSPENDED 0x0100 /* Suspended */ | ||
429 | #define I596_SCB_CUS_ACTIVE 0x0200 /* Active */ | ||
430 | |||
431 | #define I596_SCB_RUS 0x00F0 /* RECEIVE UNIT STATUS */ | ||
432 | #define I596_SCB_RUS_IDLE 0x0000 /* Idle */ | ||
433 | #define I596_SCB_RUS_SUSPENDED 0x0010 /* Suspended */ | ||
434 | #define I596_SCB_RUS_NORES 0x0020 /* No Resources */ | ||
435 | #define I596_SCB_RUS_READY 0x0040 /* Ready */ | ||
436 | #define I596_SCB_RUS_NORBDS 0x0080 /* No more RBDs modifier */ | ||
437 | |||
438 | #define I596_SCB_LOADED 0x0008 /* Bus timers loaded */ | ||
439 | |||
440 | /************************************************************************/ | ||
441 | /* */ | ||
442 | /* I596_ISCP: Intermediate System Configuration Ptr (p 4-26) */ | ||
443 | /* */ | ||
444 | /************************************************************************/ | ||
445 | typedef volatile struct | ||
446 | { | ||
447 | ulong busy; /* Set to 1; I596 clears it when scbp is read */ | ||
448 | I596_SCB *scbp; | ||
449 | } I596_ISCP; | ||
450 | |||
451 | /************************************************************************/ | ||
452 | /* */ | ||
453 | /* I596_SCP: System Configuration Pointer (p. 4-23) */ | ||
454 | /* */ | ||
455 | /************************************************************************/ | ||
456 | typedef volatile struct | ||
457 | { | ||
458 | ulong sysbus; | ||
459 | ulong dummy; | ||
460 | I596_ISCP *iscpp; | ||
461 | } I596_SCP; | ||
462 | |||
463 | /* .sysbus values */ | ||
464 | #define I596_SCP_RESERVED 0x400000 /* Reserved bits must be set */ | ||
465 | #define I596_SCP_INTLOW 0x200000 /* Intr. Polarity active low */ | ||
466 | #define I596_SCP_INTHIGH 0 /* Intr. Polarity active high */ | ||
467 | #define I596_SCP_LOCKDIS 0x100000 /* Lock Function disabled */ | ||
468 | #define I596_SCP_LOCKEN 0 /* Lock Function enabled */ | ||
469 | #define I596_SCP_ETHROTTLE 0x080000 /* External Bus Throttle */ | ||
470 | #define I596_SCP_ITHROTTLE 0 /* Internal Bus Throttle */ | ||
471 | #define I596_SCP_LINEAR 0x040000 /* Linear Mode */ | ||
472 | #define I596_SCP_SEGMENTED 0x020000 /* Segmented Mode */ | ||
473 | #define I596_SCP_82586 0x000000 /* 82586 Mode */ | ||