diff options
author | Dimitris Michailidis <dm@chelsio.com> | 2010-08-02 09:19:21 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-08-02 19:26:43 -0400 |
commit | 060e0c752b5047ee691120b75df4c16743981e50 (patch) | |
tree | 6d24a0ec7d6324ff2ca80c6f9ea6f1f1d6d1a2df /drivers/net/cxgb4/sge.c | |
parent | 35d35682041686572d5158993dede90bc73dc1d9 (diff) |
cxgb4: support running the driver on PCI functions besides 0
Add support for running the driver on any PCI function. Mostly this
entails replacing a constant 0 in a number of calls with the variable
function number.
Signed-off-by: Dimitris Michailidis <dm@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb4/sge.c')
-rw-r--r-- | drivers/net/cxgb4/sge.c | 38 |
1 files changed, 23 insertions, 15 deletions
diff --git a/drivers/net/cxgb4/sge.c b/drivers/net/cxgb4/sge.c index 5cacfc7c53a6..bf38cfc57565 100644 --- a/drivers/net/cxgb4/sge.c +++ b/drivers/net/cxgb4/sge.c | |||
@@ -1999,7 +1999,7 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, | |||
1999 | memset(&c, 0, sizeof(c)); | 1999 | memset(&c, 0, sizeof(c)); |
2000 | c.op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | FW_CMD_REQUEST | | 2000 | c.op_to_vfn = htonl(FW_CMD_OP(FW_IQ_CMD) | FW_CMD_REQUEST | |
2001 | FW_CMD_WRITE | FW_CMD_EXEC | | 2001 | FW_CMD_WRITE | FW_CMD_EXEC | |
2002 | FW_IQ_CMD_PFN(0) | FW_IQ_CMD_VFN(0)); | 2002 | FW_IQ_CMD_PFN(adap->fn) | FW_IQ_CMD_VFN(0)); |
2003 | c.alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | FW_IQ_CMD_IQSTART(1) | | 2003 | c.alloc_to_len16 = htonl(FW_IQ_CMD_ALLOC | FW_IQ_CMD_IQSTART(1) | |
2004 | FW_LEN16(c)); | 2004 | FW_LEN16(c)); |
2005 | c.type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) | | 2005 | c.type_to_iqandstindex = htonl(FW_IQ_CMD_TYPE(FW_IQ_TYPE_FL_INT_CAP) | |
@@ -2031,7 +2031,7 @@ int t4_sge_alloc_rxq(struct adapter *adap, struct sge_rspq *iq, bool fwevtq, | |||
2031 | c.fl0addr = cpu_to_be64(fl->addr); | 2031 | c.fl0addr = cpu_to_be64(fl->addr); |
2032 | } | 2032 | } |
2033 | 2033 | ||
2034 | ret = t4_wr_mbox(adap, 0, &c, sizeof(c), &c); | 2034 | ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); |
2035 | if (ret) | 2035 | if (ret) |
2036 | goto err; | 2036 | goto err; |
2037 | 2037 | ||
@@ -2110,7 +2110,7 @@ int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, | |||
2110 | memset(&c, 0, sizeof(c)); | 2110 | memset(&c, 0, sizeof(c)); |
2111 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_ETH_CMD) | FW_CMD_REQUEST | | 2111 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_ETH_CMD) | FW_CMD_REQUEST | |
2112 | FW_CMD_WRITE | FW_CMD_EXEC | | 2112 | FW_CMD_WRITE | FW_CMD_EXEC | |
2113 | FW_EQ_ETH_CMD_PFN(0) | FW_EQ_ETH_CMD_VFN(0)); | 2113 | FW_EQ_ETH_CMD_PFN(adap->fn) | FW_EQ_ETH_CMD_VFN(0)); |
2114 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | | 2114 | c.alloc_to_len16 = htonl(FW_EQ_ETH_CMD_ALLOC | |
2115 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); | 2115 | FW_EQ_ETH_CMD_EQSTART | FW_LEN16(c)); |
2116 | c.viid_pkd = htonl(FW_EQ_ETH_CMD_VIID(pi->viid)); | 2116 | c.viid_pkd = htonl(FW_EQ_ETH_CMD_VIID(pi->viid)); |
@@ -2123,7 +2123,7 @@ int t4_sge_alloc_eth_txq(struct adapter *adap, struct sge_eth_txq *txq, | |||
2123 | FW_EQ_ETH_CMD_EQSIZE(nentries)); | 2123 | FW_EQ_ETH_CMD_EQSIZE(nentries)); |
2124 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); | 2124 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); |
2125 | 2125 | ||
2126 | ret = t4_wr_mbox(adap, 0, &c, sizeof(c), &c); | 2126 | ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); |
2127 | if (ret) { | 2127 | if (ret) { |
2128 | kfree(txq->q.sdesc); | 2128 | kfree(txq->q.sdesc); |
2129 | txq->q.sdesc = NULL; | 2129 | txq->q.sdesc = NULL; |
@@ -2160,7 +2160,8 @@ int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, | |||
2160 | 2160 | ||
2161 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST | | 2161 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_CTRL_CMD) | FW_CMD_REQUEST | |
2162 | FW_CMD_WRITE | FW_CMD_EXEC | | 2162 | FW_CMD_WRITE | FW_CMD_EXEC | |
2163 | FW_EQ_CTRL_CMD_PFN(0) | FW_EQ_CTRL_CMD_VFN(0)); | 2163 | FW_EQ_CTRL_CMD_PFN(adap->fn) | |
2164 | FW_EQ_CTRL_CMD_VFN(0)); | ||
2164 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_ALLOC | | 2165 | c.alloc_to_len16 = htonl(FW_EQ_CTRL_CMD_ALLOC | |
2165 | FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c)); | 2166 | FW_EQ_CTRL_CMD_EQSTART | FW_LEN16(c)); |
2166 | c.cmpliqid_eqid = htonl(FW_EQ_CTRL_CMD_CMPLIQID(cmplqid)); | 2167 | c.cmpliqid_eqid = htonl(FW_EQ_CTRL_CMD_CMPLIQID(cmplqid)); |
@@ -2174,7 +2175,7 @@ int t4_sge_alloc_ctrl_txq(struct adapter *adap, struct sge_ctrl_txq *txq, | |||
2174 | FW_EQ_CTRL_CMD_EQSIZE(nentries)); | 2175 | FW_EQ_CTRL_CMD_EQSIZE(nentries)); |
2175 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); | 2176 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); |
2176 | 2177 | ||
2177 | ret = t4_wr_mbox(adap, 0, &c, sizeof(c), &c); | 2178 | ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); |
2178 | if (ret) { | 2179 | if (ret) { |
2179 | dma_free_coherent(adap->pdev_dev, | 2180 | dma_free_coherent(adap->pdev_dev, |
2180 | nentries * sizeof(struct tx_desc), | 2181 | nentries * sizeof(struct tx_desc), |
@@ -2210,7 +2211,8 @@ int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq, | |||
2210 | memset(&c, 0, sizeof(c)); | 2211 | memset(&c, 0, sizeof(c)); |
2211 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST | | 2212 | c.op_to_vfn = htonl(FW_CMD_OP(FW_EQ_OFLD_CMD) | FW_CMD_REQUEST | |
2212 | FW_CMD_WRITE | FW_CMD_EXEC | | 2213 | FW_CMD_WRITE | FW_CMD_EXEC | |
2213 | FW_EQ_OFLD_CMD_PFN(0) | FW_EQ_OFLD_CMD_VFN(0)); | 2214 | FW_EQ_OFLD_CMD_PFN(adap->fn) | |
2215 | FW_EQ_OFLD_CMD_VFN(0)); | ||
2214 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | | 2216 | c.alloc_to_len16 = htonl(FW_EQ_OFLD_CMD_ALLOC | |
2215 | FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c)); | 2217 | FW_EQ_OFLD_CMD_EQSTART | FW_LEN16(c)); |
2216 | c.fetchszm_to_iqid = htonl(FW_EQ_OFLD_CMD_HOSTFCMODE(2) | | 2218 | c.fetchszm_to_iqid = htonl(FW_EQ_OFLD_CMD_HOSTFCMODE(2) | |
@@ -2222,7 +2224,7 @@ int t4_sge_alloc_ofld_txq(struct adapter *adap, struct sge_ofld_txq *txq, | |||
2222 | FW_EQ_OFLD_CMD_EQSIZE(nentries)); | 2224 | FW_EQ_OFLD_CMD_EQSIZE(nentries)); |
2223 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); | 2225 | c.eqaddr = cpu_to_be64(txq->q.phys_addr); |
2224 | 2226 | ||
2225 | ret = t4_wr_mbox(adap, 0, &c, sizeof(c), &c); | 2227 | ret = t4_wr_mbox(adap, adap->fn, &c, sizeof(c), &c); |
2226 | if (ret) { | 2228 | if (ret) { |
2227 | kfree(txq->q.sdesc); | 2229 | kfree(txq->q.sdesc); |
2228 | txq->q.sdesc = NULL; | 2230 | txq->q.sdesc = NULL; |
@@ -2258,8 +2260,8 @@ static void free_rspq_fl(struct adapter *adap, struct sge_rspq *rq, | |||
2258 | unsigned int fl_id = fl ? fl->cntxt_id : 0xffff; | 2260 | unsigned int fl_id = fl ? fl->cntxt_id : 0xffff; |
2259 | 2261 | ||
2260 | adap->sge.ingr_map[rq->cntxt_id] = NULL; | 2262 | adap->sge.ingr_map[rq->cntxt_id] = NULL; |
2261 | t4_iq_free(adap, 0, 0, 0, FW_IQ_TYPE_FL_INT_CAP, rq->cntxt_id, fl_id, | 2263 | t4_iq_free(adap, adap->fn, adap->fn, 0, FW_IQ_TYPE_FL_INT_CAP, |
2262 | 0xffff); | 2264 | rq->cntxt_id, fl_id, 0xffff); |
2263 | dma_free_coherent(adap->pdev_dev, (rq->size + 1) * rq->iqe_len, | 2265 | dma_free_coherent(adap->pdev_dev, (rq->size + 1) * rq->iqe_len, |
2264 | rq->desc, rq->phys_addr); | 2266 | rq->desc, rq->phys_addr); |
2265 | netif_napi_del(&rq->napi); | 2267 | netif_napi_del(&rq->napi); |
@@ -2296,7 +2298,8 @@ void t4_free_sge_resources(struct adapter *adap) | |||
2296 | if (eq->rspq.desc) | 2298 | if (eq->rspq.desc) |
2297 | free_rspq_fl(adap, &eq->rspq, &eq->fl); | 2299 | free_rspq_fl(adap, &eq->rspq, &eq->fl); |
2298 | if (etq->q.desc) { | 2300 | if (etq->q.desc) { |
2299 | t4_eth_eq_free(adap, 0, 0, 0, etq->q.cntxt_id); | 2301 | t4_eth_eq_free(adap, adap->fn, adap->fn, 0, |
2302 | etq->q.cntxt_id); | ||
2300 | free_tx_desc(adap, &etq->q, etq->q.in_use, true); | 2303 | free_tx_desc(adap, &etq->q, etq->q.in_use, true); |
2301 | kfree(etq->q.sdesc); | 2304 | kfree(etq->q.sdesc); |
2302 | free_txq(adap, &etq->q); | 2305 | free_txq(adap, &etq->q); |
@@ -2319,7 +2322,8 @@ void t4_free_sge_resources(struct adapter *adap) | |||
2319 | 2322 | ||
2320 | if (q->q.desc) { | 2323 | if (q->q.desc) { |
2321 | tasklet_kill(&q->qresume_tsk); | 2324 | tasklet_kill(&q->qresume_tsk); |
2322 | t4_ofld_eq_free(adap, 0, 0, 0, q->q.cntxt_id); | 2325 | t4_ofld_eq_free(adap, adap->fn, adap->fn, 0, |
2326 | q->q.cntxt_id); | ||
2323 | free_tx_desc(adap, &q->q, q->q.in_use, false); | 2327 | free_tx_desc(adap, &q->q, q->q.in_use, false); |
2324 | kfree(q->q.sdesc); | 2328 | kfree(q->q.sdesc); |
2325 | __skb_queue_purge(&q->sendq); | 2329 | __skb_queue_purge(&q->sendq); |
@@ -2333,7 +2337,8 @@ void t4_free_sge_resources(struct adapter *adap) | |||
2333 | 2337 | ||
2334 | if (cq->q.desc) { | 2338 | if (cq->q.desc) { |
2335 | tasklet_kill(&cq->qresume_tsk); | 2339 | tasklet_kill(&cq->qresume_tsk); |
2336 | t4_ctrl_eq_free(adap, 0, 0, 0, cq->q.cntxt_id); | 2340 | t4_ctrl_eq_free(adap, adap->fn, adap->fn, 0, |
2341 | cq->q.cntxt_id); | ||
2337 | __skb_queue_purge(&cq->sendq); | 2342 | __skb_queue_purge(&cq->sendq); |
2338 | free_txq(adap, &cq->q); | 2343 | free_txq(adap, &cq->q); |
2339 | } | 2344 | } |
@@ -2401,6 +2406,7 @@ void t4_sge_stop(struct adapter *adap) | |||
2401 | */ | 2406 | */ |
2402 | void t4_sge_init(struct adapter *adap) | 2407 | void t4_sge_init(struct adapter *adap) |
2403 | { | 2408 | { |
2409 | unsigned int i, v; | ||
2404 | struct sge *s = &adap->sge; | 2410 | struct sge *s = &adap->sge; |
2405 | unsigned int fl_align_log = ilog2(FL_ALIGN); | 2411 | unsigned int fl_align_log = ilog2(FL_ALIGN); |
2406 | 2412 | ||
@@ -2409,8 +2415,10 @@ void t4_sge_init(struct adapter *adap) | |||
2409 | INGPADBOUNDARY(fl_align_log - 5) | PKTSHIFT(2) | | 2415 | INGPADBOUNDARY(fl_align_log - 5) | PKTSHIFT(2) | |
2410 | RXPKTCPLMODE | | 2416 | RXPKTCPLMODE | |
2411 | (STAT_LEN == 128 ? EGRSTATUSPAGESIZE : 0)); | 2417 | (STAT_LEN == 128 ? EGRSTATUSPAGESIZE : 0)); |
2412 | t4_set_reg_field(adap, SGE_HOST_PAGE_SIZE, HOSTPAGESIZEPF0_MASK, | 2418 | |
2413 | HOSTPAGESIZEPF0(PAGE_SHIFT - 10)); | 2419 | for (i = v = 0; i < 32; i += 4) |
2420 | v |= (PAGE_SHIFT - 10) << i; | ||
2421 | t4_write_reg(adap, SGE_HOST_PAGE_SIZE, v); | ||
2414 | t4_write_reg(adap, SGE_FL_BUFFER_SIZE0, PAGE_SIZE); | 2422 | t4_write_reg(adap, SGE_FL_BUFFER_SIZE0, PAGE_SIZE); |
2415 | #if FL_PG_ORDER > 0 | 2423 | #if FL_PG_ORDER > 0 |
2416 | t4_write_reg(adap, SGE_FL_BUFFER_SIZE1, PAGE_SIZE << FL_PG_ORDER); | 2424 | t4_write_reg(adap, SGE_FL_BUFFER_SIZE1, PAGE_SIZE << FL_PG_ORDER); |