diff options
author | Divy Le Ray <divy@chelsio.com> | 2009-03-26 12:39:24 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-03-27 03:46:58 -0400 |
commit | 952cdf333f9d1b0b71f1b9a3c5e421a2673ed7de (patch) | |
tree | 131202c4c8f50f1cedf52529d6a3e6f70dbfaa38 /drivers/net/cxgb3 | |
parent | 68f40c10292a94762956896d4d320a2620945adc (diff) |
cxgb3: differentiate portx and Tx channels
Separate ports from H/W Tx channels.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3')
-rw-r--r-- | drivers/net/cxgb3/common.h | 4 | ||||
-rw-r--r--[-rwxr-xr-x] | drivers/net/cxgb3/cxgb3_main.c | 4 | ||||
-rw-r--r--[-rwxr-xr-x] | drivers/net/cxgb3/t3_hw.c | 35 |
3 files changed, 24 insertions, 19 deletions
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h index 9ee021e750c8..e508dc32f3ec 100644 --- a/drivers/net/cxgb3/common.h +++ b/drivers/net/cxgb3/common.h | |||
@@ -191,7 +191,8 @@ struct mdio_ops { | |||
191 | }; | 191 | }; |
192 | 192 | ||
193 | struct adapter_info { | 193 | struct adapter_info { |
194 | unsigned char nports; /* # of ports */ | 194 | unsigned char nports0; /* # of ports on channel 0 */ |
195 | unsigned char nports1; /* # of ports on channel 1 */ | ||
195 | unsigned char phy_base_addr; /* MDIO PHY base address */ | 196 | unsigned char phy_base_addr; /* MDIO PHY base address */ |
196 | unsigned int gpio_out; /* GPIO output settings */ | 197 | unsigned int gpio_out; /* GPIO output settings */ |
197 | unsigned char gpio_intr[MAX_NPORTS]; /* GPIO PHY IRQ pins */ | 198 | unsigned char gpio_intr[MAX_NPORTS]; /* GPIO PHY IRQ pins */ |
@@ -422,6 +423,7 @@ struct adapter_params { | |||
422 | unsigned short b_wnd[NCCTRL_WIN]; | 423 | unsigned short b_wnd[NCCTRL_WIN]; |
423 | 424 | ||
424 | unsigned int nports; /* # of ethernet ports */ | 425 | unsigned int nports; /* # of ethernet ports */ |
426 | unsigned int chan_map; /* bitmap of in-use Tx channels */ | ||
425 | unsigned int stats_update_period; /* MAC stats accumulation period */ | 427 | unsigned int stats_update_period; /* MAC stats accumulation period */ |
426 | unsigned int linkpoll_period; /* link poll period in 0.1s */ | 428 | unsigned int linkpoll_period; /* link poll period in 0.1s */ |
427 | unsigned int rev; /* chip revision */ | 429 | unsigned int rev; /* chip revision */ |
diff --git a/drivers/net/cxgb3/cxgb3_main.c b/drivers/net/cxgb3/cxgb3_main.c index e2b119312a00..2c2aaa741450 100755..100644 --- a/drivers/net/cxgb3/cxgb3_main.c +++ b/drivers/net/cxgb3/cxgb3_main.c | |||
@@ -3086,7 +3086,7 @@ static int __devinit init_one(struct pci_dev *pdev, | |||
3086 | INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task); | 3086 | INIT_WORK(&adapter->fatal_error_handler_task, fatal_error_task); |
3087 | INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task); | 3087 | INIT_DELAYED_WORK(&adapter->adap_check_task, t3_adap_check_task); |
3088 | 3088 | ||
3089 | for (i = 0; i < ai->nports; ++i) { | 3089 | for (i = 0; i < ai->nports0 + ai->nports1; ++i) { |
3090 | struct net_device *netdev; | 3090 | struct net_device *netdev; |
3091 | 3091 | ||
3092 | netdev = alloc_etherdev_mq(sizeof(struct port_info), SGE_QSETS); | 3092 | netdev = alloc_etherdev_mq(sizeof(struct port_info), SGE_QSETS); |
@@ -3176,7 +3176,7 @@ static int __devinit init_one(struct pci_dev *pdev, | |||
3176 | 3176 | ||
3177 | out_free_dev: | 3177 | out_free_dev: |
3178 | iounmap(adapter->regs); | 3178 | iounmap(adapter->regs); |
3179 | for (i = ai->nports - 1; i >= 0; --i) | 3179 | for (i = ai->nports0 + ai->nports1 - 1; i >= 0; --i) |
3180 | if (adapter->port[i]) | 3180 | if (adapter->port[i]) |
3181 | free_netdev(adapter->port[i]); | 3181 | free_netdev(adapter->port[i]); |
3182 | 3182 | ||
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index 7d8fbae58dcf..31ed31a3428b 100755..100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c | |||
@@ -493,20 +493,20 @@ int t3_phy_lasi_intr_handler(struct cphy *phy) | |||
493 | } | 493 | } |
494 | 494 | ||
495 | static const struct adapter_info t3_adap_info[] = { | 495 | static const struct adapter_info t3_adap_info[] = { |
496 | {2, 0, | 496 | {1, 1, 0, |
497 | F_GPIO2_OEN | F_GPIO4_OEN | | 497 | F_GPIO2_OEN | F_GPIO4_OEN | |
498 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0, | 498 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0, |
499 | &mi1_mdio_ops, "Chelsio PE9000"}, | 499 | &mi1_mdio_ops, "Chelsio PE9000"}, |
500 | {2, 0, | 500 | {1, 1, 0, |
501 | F_GPIO2_OEN | F_GPIO4_OEN | | 501 | F_GPIO2_OEN | F_GPIO4_OEN | |
502 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0, | 502 | F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, { S_GPIO3, S_GPIO5 }, 0, |
503 | &mi1_mdio_ops, "Chelsio T302"}, | 503 | &mi1_mdio_ops, "Chelsio T302"}, |
504 | {1, 0, | 504 | {1, 0, 0, |
505 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | | 505 | F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | |
506 | F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, | 506 | F_GPIO11_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, |
507 | { 0 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, | 507 | { 0 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, |
508 | &mi1_mdio_ext_ops, "Chelsio T310"}, | 508 | &mi1_mdio_ext_ops, "Chelsio T310"}, |
509 | {2, 0, | 509 | {1, 1, 0, |
510 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | | 510 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | |
511 | F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | | 511 | F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | |
512 | F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, | 512 | F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, |
@@ -514,7 +514,7 @@ static const struct adapter_info t3_adap_info[] = { | |||
514 | &mi1_mdio_ext_ops, "Chelsio T320"}, | 514 | &mi1_mdio_ext_ops, "Chelsio T320"}, |
515 | {}, | 515 | {}, |
516 | {}, | 516 | {}, |
517 | {1, 0, | 517 | {1, 0, 0, |
518 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO6_OEN | F_GPIO7_OEN | | 518 | F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO6_OEN | F_GPIO7_OEN | |
519 | F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, | 519 | F_GPIO10_OEN | F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, |
520 | { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, | 520 | { S_GPIO9 }, SUPPORTED_10000baseT_Full | SUPPORTED_AUI, |
@@ -3227,20 +3227,22 @@ int t3_mps_set_active_ports(struct adapter *adap, unsigned int port_mask) | |||
3227 | } | 3227 | } |
3228 | 3228 | ||
3229 | /* | 3229 | /* |
3230 | * Perform the bits of HW initialization that are dependent on the number | 3230 | * Perform the bits of HW initialization that are dependent on the Tx |
3231 | * of available ports. | 3231 | * channels being used. |
3232 | */ | 3232 | */ |
3233 | static void init_hw_for_avail_ports(struct adapter *adap, int nports) | 3233 | static void chan_init_hw(struct adapter *adap, unsigned int chan_map) |
3234 | { | 3234 | { |
3235 | int i; | 3235 | int i; |
3236 | 3236 | ||
3237 | if (nports == 1) { | 3237 | if (chan_map != 3) { /* one channel */ |
3238 | t3_set_reg_field(adap, A_ULPRX_CTL, F_ROUND_ROBIN, 0); | 3238 | t3_set_reg_field(adap, A_ULPRX_CTL, F_ROUND_ROBIN, 0); |
3239 | t3_set_reg_field(adap, A_ULPTX_CONFIG, F_CFG_RR_ARB, 0); | 3239 | t3_set_reg_field(adap, A_ULPTX_CONFIG, F_CFG_RR_ARB, 0); |
3240 | t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_TPTXPORT0EN | | 3240 | t3_write_reg(adap, A_MPS_CFG, F_TPRXPORTEN | F_ENFORCEPKT | |
3241 | F_PORT0ACTIVE | F_ENFORCEPKT); | 3241 | (chan_map == 1 ? F_TPTXPORT0EN | F_PORT0ACTIVE : |
3242 | t3_write_reg(adap, A_PM1_TX_CFG, 0xffffffff); | 3242 | F_TPTXPORT1EN | F_PORT1ACTIVE)); |
3243 | } else { | 3243 | t3_write_reg(adap, A_PM1_TX_CFG, |
3244 | chan_map == 1 ? 0xffffffff : 0); | ||
3245 | } else { /* two channels */ | ||
3244 | t3_set_reg_field(adap, A_ULPRX_CTL, 0, F_ROUND_ROBIN); | 3246 | t3_set_reg_field(adap, A_ULPRX_CTL, 0, F_ROUND_ROBIN); |
3245 | t3_set_reg_field(adap, A_ULPTX_CONFIG, 0, F_CFG_RR_ARB); | 3247 | t3_set_reg_field(adap, A_ULPTX_CONFIG, 0, F_CFG_RR_ARB); |
3246 | t3_write_reg(adap, A_ULPTX_DMA_WEIGHT, | 3248 | t3_write_reg(adap, A_ULPTX_DMA_WEIGHT, |
@@ -3548,7 +3550,7 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params) | |||
3548 | t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff); | 3550 | t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff); |
3549 | t3_write_reg(adapter, A_PM1_RX_MODE, 0); | 3551 | t3_write_reg(adapter, A_PM1_RX_MODE, 0); |
3550 | t3_write_reg(adapter, A_PM1_TX_MODE, 0); | 3552 | t3_write_reg(adapter, A_PM1_TX_MODE, 0); |
3551 | init_hw_for_avail_ports(adapter, adapter->params.nports); | 3553 | chan_init_hw(adapter, adapter->params.chan_map); |
3552 | t3_sge_init(adapter, &adapter->params.sge); | 3554 | t3_sge_init(adapter, &adapter->params.sge); |
3553 | 3555 | ||
3554 | t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW, calc_gpio_intr(adapter)); | 3556 | t3_write_reg(adapter, A_T3DBG_GPIO_ACT_LOW, calc_gpio_intr(adapter)); |
@@ -3785,7 +3787,8 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai, | |||
3785 | get_pci_mode(adapter, &adapter->params.pci); | 3787 | get_pci_mode(adapter, &adapter->params.pci); |
3786 | 3788 | ||
3787 | adapter->params.info = ai; | 3789 | adapter->params.info = ai; |
3788 | adapter->params.nports = ai->nports; | 3790 | adapter->params.nports = ai->nports0 + ai->nports1; |
3791 | adapter->params.chan_map = !!ai->nports0 | (!!ai->nports1 << 1); | ||
3789 | adapter->params.rev = t3_read_reg(adapter, A_PL_REV); | 3792 | adapter->params.rev = t3_read_reg(adapter, A_PL_REV); |
3790 | /* | 3793 | /* |
3791 | * We used to only run the "adapter check task" once a second if | 3794 | * We used to only run the "adapter check task" once a second if |
@@ -3816,7 +3819,7 @@ int t3_prep_adapter(struct adapter *adapter, const struct adapter_info *ai, | |||
3816 | mc7_prep(adapter, &adapter->pmtx, MC7_PMTX_BASE_ADDR, "PMTX"); | 3819 | mc7_prep(adapter, &adapter->pmtx, MC7_PMTX_BASE_ADDR, "PMTX"); |
3817 | mc7_prep(adapter, &adapter->cm, MC7_CM_BASE_ADDR, "CM"); | 3820 | mc7_prep(adapter, &adapter->cm, MC7_CM_BASE_ADDR, "CM"); |
3818 | 3821 | ||
3819 | p->nchan = ai->nports; | 3822 | p->nchan = adapter->params.chan_map == 3 ? 2 : 1; |
3820 | p->pmrx_size = t3_mc7_size(&adapter->pmrx); | 3823 | p->pmrx_size = t3_mc7_size(&adapter->pmrx); |
3821 | p->pmtx_size = t3_mc7_size(&adapter->pmtx); | 3824 | p->pmtx_size = t3_mc7_size(&adapter->pmtx); |
3822 | p->cm_size = t3_mc7_size(&adapter->cm); | 3825 | p->cm_size = t3_mc7_size(&adapter->cm); |