diff options
author | Divy Le Ray <divy@chelsio.com> | 2007-08-21 23:49:41 -0400 |
---|---|---|
committer | David S. Miller <davem@sunset.davemloft.net> | 2007-10-10 19:50:51 -0400 |
commit | 3f61e4278c8489c1d026a45b0903cd4230d1ec07 (patch) | |
tree | 2f6e45740ebe555d2bf97610690ad0506d375863 /drivers/net/cxgb3 | |
parent | 167cdf5fbc64ab8f4eae2cd6d9d0892478d569d7 (diff) |
cxgb3 - Update internal memory management
Set PM1 internal memory to round robin mode
It balances access to this internal memory for multiport adapters.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3')
-rw-r--r-- | drivers/net/cxgb3/regs.h | 2 | ||||
-rw-r--r-- | drivers/net/cxgb3/t3_hw.c | 2 |
2 files changed, 4 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index 282427877ea9..5e1bc0dec5f1 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h | |||
@@ -1326,6 +1326,7 @@ | |||
1326 | #define V_D0_WEIGHT(x) ((x) << S_D0_WEIGHT) | 1326 | #define V_D0_WEIGHT(x) ((x) << S_D0_WEIGHT) |
1327 | 1327 | ||
1328 | #define A_PM1_RX_CFG 0x5c0 | 1328 | #define A_PM1_RX_CFG 0x5c0 |
1329 | #define A_PM1_RX_MODE 0x5c4 | ||
1329 | 1330 | ||
1330 | #define A_PM1_RX_INT_ENABLE 0x5d8 | 1331 | #define A_PM1_RX_INT_ENABLE 0x5d8 |
1331 | 1332 | ||
@@ -1394,6 +1395,7 @@ | |||
1394 | #define A_PM1_RX_INT_CAUSE 0x5dc | 1395 | #define A_PM1_RX_INT_CAUSE 0x5dc |
1395 | 1396 | ||
1396 | #define A_PM1_TX_CFG 0x5e0 | 1397 | #define A_PM1_TX_CFG 0x5e0 |
1398 | #define A_PM1_TX_MODE 0x5e4 | ||
1397 | 1399 | ||
1398 | #define A_PM1_TX_INT_ENABLE 0x5f8 | 1400 | #define A_PM1_TX_INT_ENABLE 0x5f8 |
1399 | 1401 | ||
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c index 3f7f06b6ee65..e958bbe30623 100644 --- a/drivers/net/cxgb3/t3_hw.c +++ b/drivers/net/cxgb3/t3_hw.c | |||
@@ -3223,6 +3223,8 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params) | |||
3223 | t3_set_reg_field(adapter, A_PCIX_CFG, 0, F_CLIDECEN); | 3223 | t3_set_reg_field(adapter, A_PCIX_CFG, 0, F_CLIDECEN); |
3224 | 3224 | ||
3225 | t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff); | 3225 | t3_write_reg(adapter, A_PM1_RX_CFG, 0xffffffff); |
3226 | t3_write_reg(adapter, A_PM1_RX_MODE, 0); | ||
3227 | t3_write_reg(adapter, A_PM1_TX_MODE, 0); | ||
3226 | init_hw_for_avail_ports(adapter, adapter->params.nports); | 3228 | init_hw_for_avail_ports(adapter, adapter->params.nports); |
3227 | t3_sge_init(adapter, &adapter->params.sge); | 3229 | t3_sge_init(adapter, &adapter->params.sge); |
3228 | 3230 | ||