aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/cxgb3
diff options
context:
space:
mode:
authorDivy Le Ray <divy@chelsio.com>2007-08-11 02:29:33 -0400
committerDavid S. Miller <davem@sunset.davemloft.net>2007-10-10 19:50:28 -0400
commitb1c9e0f7806d1f627f534fd0f83f235087496f7a (patch)
treeb13d41bd5583850b53a7626d5017f3fd555f9563 /drivers/net/cxgb3
parentacb2cc8b20d6cb9e65c1e442d59a2449d8774157 (diff)
cxgb3 - MAC workaround update
Update the MAC workaround to deal with switches that do not honor pause frames. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3')
-rw-r--r--drivers/net/cxgb3/common.h1
-rw-r--r--drivers/net/cxgb3/xgmac.c22
2 files changed, 12 insertions, 11 deletions
diff --git a/drivers/net/cxgb3/common.h b/drivers/net/cxgb3/common.h
index 2129210a67c1..1746003eb46a 100644
--- a/drivers/net/cxgb3/common.h
+++ b/drivers/net/cxgb3/common.h
@@ -507,6 +507,7 @@ struct cmac {
507 unsigned int tx_xcnt; 507 unsigned int tx_xcnt;
508 u64 tx_mcnt; 508 u64 tx_mcnt;
509 unsigned int rx_xcnt; 509 unsigned int rx_xcnt;
510 unsigned int rx_ocnt;
510 u64 rx_mcnt; 511 u64 rx_mcnt;
511 unsigned int toggle_cnt; 512 unsigned int toggle_cnt;
512 unsigned int txen; 513 unsigned int txen;
diff --git a/drivers/net/cxgb3/xgmac.c b/drivers/net/cxgb3/xgmac.c
index c302b1a30cba..1d1c3919ab66 100644
--- a/drivers/net/cxgb3/xgmac.c
+++ b/drivers/net/cxgb3/xgmac.c
@@ -437,12 +437,13 @@ int t3_mac_enable(struct cmac *mac, int which)
437 struct mac_stats *s = &mac->stats; 437 struct mac_stats *s = &mac->stats;
438 438
439 if (which & MAC_DIRECTION_TX) { 439 if (which & MAC_DIRECTION_TX) {
440 t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
441 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx); 440 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
442 t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401); 441 t3_write_reg(adap, A_TP_PIO_DATA, 0xc0ede401);
443 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE); 442 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE);
444 t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx); 443 t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx);
445 444
445 t3_write_reg(adap, A_XGM_TX_CTRL + oft, F_TXEN);
446
446 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CNT_CH0 + idx); 447 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CNT_CH0 + idx);
447 mac->tx_mcnt = s->tx_frames; 448 mac->tx_mcnt = s->tx_frames;
448 mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap, 449 mac->tx_tcnt = (G_TXDROPCNTCH0RCVD(t3_read_reg(adap,
@@ -454,6 +455,7 @@ int t3_mac_enable(struct cmac *mac, int which)
454 mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, 455 mac->rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
455 A_XGM_RX_SPI4_SOP_EOP_CNT + 456 A_XGM_RX_SPI4_SOP_EOP_CNT +
456 oft))); 457 oft)));
458 mac->rx_ocnt = s->rx_fifo_ovfl;
457 mac->txen = F_TXEN; 459 mac->txen = F_TXEN;
458 mac->toggle_cnt = 0; 460 mac->toggle_cnt = 0;
459 } 461 }
@@ -464,24 +466,19 @@ int t3_mac_enable(struct cmac *mac, int which)
464 466
465int t3_mac_disable(struct cmac *mac, int which) 467int t3_mac_disable(struct cmac *mac, int which)
466{ 468{
467 int idx = macidx(mac);
468 struct adapter *adap = mac->adapter; 469 struct adapter *adap = mac->adapter;
469 int val;
470 470
471 if (which & MAC_DIRECTION_TX) { 471 if (which & MAC_DIRECTION_TX) {
472 t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0); 472 t3_write_reg(adap, A_XGM_TX_CTRL + mac->offset, 0);
473 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_CFG_CH0 + idx);
474 t3_write_reg(adap, A_TP_PIO_DATA, 0xc000001f);
475 t3_write_reg(adap, A_TP_PIO_ADDR, A_TP_TX_DROP_MODE);
476 t3_set_reg_field(adap, A_TP_PIO_DATA, 1 << idx, 1 << idx);
477 mac->txen = 0; 473 mac->txen = 0;
478 } 474 }
479 if (which & MAC_DIRECTION_RX) { 475 if (which & MAC_DIRECTION_RX) {
476 int val = F_MAC_RESET_;
477
480 t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset, 478 t3_set_reg_field(mac->adapter, A_XGM_RESET_CTRL + mac->offset,
481 F_PCS_RESET_, 0); 479 F_PCS_RESET_, 0);
482 msleep(100); 480 msleep(100);
483 t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0); 481 t3_write_reg(adap, A_XGM_RX_CTRL + mac->offset, 0);
484 val = F_MAC_RESET_;
485 if (is_10G(adap)) 482 if (is_10G(adap))
486 val |= F_PCS_RESET_; 483 val |= F_PCS_RESET_;
487 else if (uses_xaui(adap)) 484 else if (uses_xaui(adap))
@@ -541,11 +538,14 @@ int t3b2_mac_watchdog_task(struct cmac *mac)
541 } 538 }
542 539
543rxcheck: 540rxcheck:
544 if (rx_mcnt != mac->rx_mcnt) 541 if (rx_mcnt != mac->rx_mcnt) {
545 rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap, 542 rx_xcnt = (G_TXSPI4SOPCNT(t3_read_reg(adap,
546 A_XGM_RX_SPI4_SOP_EOP_CNT + 543 A_XGM_RX_SPI4_SOP_EOP_CNT +
547 mac->offset))); 544 mac->offset))) +
548 else 545 (s->rx_fifo_ovfl -
546 mac->rx_ocnt);
547 mac->rx_ocnt = s->rx_fifo_ovfl;
548 } else
549 goto out; 549 goto out;
550 550
551 if (mac->rx_mcnt != s->rx_frames && rx_xcnt == 0 && 551 if (mac->rx_mcnt != s->rx_frames && rx_xcnt == 0 &&