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authorDivy Le Ray <divy@chelsio.com>2007-03-31 03:23:19 -0400
committerJeff Garzik <jeff@garzik.org>2007-04-03 22:31:09 -0400
commit8ac3ba68e25a73594646ec30b7c482b364644c92 (patch)
tree1c15afe834f8f86f8a6c0a2c5da217de4afb6664 /drivers/net/cxgb3/t3_hw.c
parent9f238486f5438b2e44f760b11fa3a08714c1ddb6 (diff)
cxgb3 - detect NIC only adapters
Differentiate NIC only adapters from RNICs. Initialize offload capabilities for RNICs only. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3/t3_hw.c')
-rw-r--r--drivers/net/cxgb3/t3_hw.c24
1 files changed, 18 insertions, 6 deletions
diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index 791ed6dc1943..d83f075ef2d7 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -438,23 +438,23 @@ static const struct adapter_info t3_adap_info[] = {
438 {2, 0, 0, 0, 438 {2, 0, 0, 0,
439 F_GPIO2_OEN | F_GPIO4_OEN | 439 F_GPIO2_OEN | F_GPIO4_OEN |
440 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, 440 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
441 SUPPORTED_OFFLOAD, 441 0,
442 &mi1_mdio_ops, "Chelsio PE9000"}, 442 &mi1_mdio_ops, "Chelsio PE9000"},
443 {2, 0, 0, 0, 443 {2, 0, 0, 0,
444 F_GPIO2_OEN | F_GPIO4_OEN | 444 F_GPIO2_OEN | F_GPIO4_OEN |
445 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5, 445 F_GPIO2_OUT_VAL | F_GPIO4_OUT_VAL, F_GPIO3 | F_GPIO5,
446 SUPPORTED_OFFLOAD, 446 0,
447 &mi1_mdio_ops, "Chelsio T302"}, 447 &mi1_mdio_ops, "Chelsio T302"},
448 {1, 0, 0, 0, 448 {1, 0, 0, 0,
449 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN | 449 F_GPIO1_OEN | F_GPIO6_OEN | F_GPIO7_OEN | F_GPIO10_OEN |
450 F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, 450 F_GPIO1_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
451 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, 451 SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
452 &mi1_mdio_ext_ops, "Chelsio T310"}, 452 &mi1_mdio_ext_ops, "Chelsio T310"},
453 {2, 0, 0, 0, 453 {2, 0, 0, 0,
454 F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN | 454 F_GPIO1_OEN | F_GPIO2_OEN | F_GPIO4_OEN | F_GPIO5_OEN | F_GPIO6_OEN |
455 F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL | 455 F_GPIO7_OEN | F_GPIO10_OEN | F_GPIO11_OEN | F_GPIO1_OUT_VAL |
456 F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0, 456 F_GPIO5_OUT_VAL | F_GPIO6_OUT_VAL | F_GPIO10_OUT_VAL, 0,
457 SUPPORTED_10000baseT_Full | SUPPORTED_AUI | SUPPORTED_OFFLOAD, 457 SUPPORTED_10000baseT_Full | SUPPORTED_AUI,
458 &mi1_mdio_ext_ops, "Chelsio T320"}, 458 &mi1_mdio_ext_ops, "Chelsio T320"},
459}; 459};
460 460
@@ -2900,6 +2900,9 @@ static int mc7_init(struct mc7 *mc7, unsigned int mc7_clock, int mem_type)
2900 struct adapter *adapter = mc7->adapter; 2900 struct adapter *adapter = mc7->adapter;
2901 const struct mc7_timing_params *p = &mc7_timings[mem_type]; 2901 const struct mc7_timing_params *p = &mc7_timings[mem_type];
2902 2902
2903 if (!mc7->size)
2904 return 0;
2905
2903 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); 2906 val = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
2904 slow = val & F_SLOW; 2907 slow = val & F_SLOW;
2905 width = G_WIDTH(val); 2908 width = G_WIDTH(val);
@@ -3100,8 +3103,10 @@ int t3_init_hw(struct adapter *adapter, u32 fw_params)
3100 do { /* wait for uP to initialize */ 3103 do { /* wait for uP to initialize */
3101 msleep(20); 3104 msleep(20);
3102 } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts); 3105 } while (t3_read_reg(adapter, A_CIM_HOST_ACC_DATA) && --attempts);
3103 if (!attempts) 3106 if (!attempts) {
3107 CH_ERR(adapter, "uP initialization timed out\n");
3104 goto out_err; 3108 goto out_err;
3109 }
3105 3110
3106 err = 0; 3111 err = 0;
3107out_err: 3112out_err:
@@ -3201,7 +3206,7 @@ static void __devinit mc7_prep(struct adapter *adapter, struct mc7 *mc7,
3201 mc7->name = name; 3206 mc7->name = name;
3202 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR; 3207 mc7->offset = base_addr - MC7_PMRX_BASE_ADDR;
3203 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG); 3208 cfg = t3_read_reg(adapter, mc7->offset + A_MC7_CFG);
3204 mc7->size = mc7_calc_size(cfg); 3209 mc7->size = mc7->size = G_DEN(cfg) == M_DEN ? 0 : mc7_calc_size(cfg);
3205 mc7->width = G_WIDTH(cfg); 3210 mc7->width = G_WIDTH(cfg);
3206} 3211}
3207 3212
@@ -3228,6 +3233,7 @@ void early_hw_init(struct adapter *adapter, const struct adapter_info *ai)
3228 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1)); 3233 V_I2C_CLKDIV(adapter->params.vpd.cclk / 80 - 1));
3229 t3_write_reg(adapter, A_T3DBG_GPIO_EN, 3234 t3_write_reg(adapter, A_T3DBG_GPIO_EN,
3230 ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL); 3235 ai->gpio_out | F_GPIO0_OEN | F_GPIO0_OUT_VAL);
3236 t3_write_reg(adapter, A_MC5_DB_SERVER_INDEX, 0);
3231 3237
3232 if (adapter->params.rev == 0 || !uses_xaui(adapter)) 3238 if (adapter->params.rev == 0 || !uses_xaui(adapter))
3233 val |= F_ENRGMII; 3239 val |= F_ENRGMII;
@@ -3326,7 +3332,13 @@ int __devinit t3_prep_adapter(struct adapter *adapter,
3326 p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size); 3332 p->tx_num_pgs = pm_num_pages(p->chan_tx_size, p->tx_pg_size);
3327 p->ntimer_qs = p->cm_size >= (128 << 20) || 3333 p->ntimer_qs = p->cm_size >= (128 << 20) ||
3328 adapter->params.rev > 0 ? 12 : 6; 3334 adapter->params.rev > 0 ? 12 : 6;
3335 }
3336
3337 adapter->params.offload = t3_mc7_size(&adapter->pmrx) &&
3338 t3_mc7_size(&adapter->pmtx) &&
3339 t3_mc7_size(&adapter->cm);
3329 3340
3341 if (is_offload(adapter)) {
3330 adapter->params.mc5.nservers = DEFAULT_NSERVERS; 3342 adapter->params.mc5.nservers = DEFAULT_NSERVERS;
3331 adapter->params.mc5.nfilters = adapter->params.rev > 0 ? 3343 adapter->params.mc5.nfilters = adapter->params.rev > 0 ?
3332 DEFAULT_NFILTERS : 0; 3344 DEFAULT_NFILTERS : 0;