cxgb3 - fix EEH

Reset the chip when the PCI link goes down.
Preserve the napi structure when a sge qset's resources are freed.
Replay only HW initialization when the chip comes out of reset.

Signed-off-by: Divy Le ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jgarzik@redhat.com>

1 files changed, 28 insertions, 0 deletions

diff --git a/drivers/net/cxgb3/t3_hw.c b/drivers/net/cxgb3/t3_hw.c
index a99496a431c4..d405a932c73a 100644
--- a/drivers/net/cxgb3/t3_hw.c
+++ b/drivers/net/cxgb3/t3_hw.c
@@ -3264,6 +3264,7 @@ static void config_pcie(struct adapter *adap)
 
         t3_write_reg(adap, A_PCIE_PEX_ERR, 0xffffffff);
         t3_set_reg_field(adap, A_PCIE_CFG, 0,
+                         F_ENABLELINKDWNDRST | F_ENABLELINKDOWNRST |
                          F_PCIE_DMASTOPEN | F_PCIE_CLIDECEN);
 }
 
@@ -3655,3 +3656,30 @@ void t3_led_ready(struct adapter *adapter)
         t3_set_reg_field(adapter, A_T3DBG_GPIO_EN, F_GPIO0_OUT_VAL,
                          F_GPIO0_OUT_VAL);
 }
+
+int t3_replay_prep_adapter(struct adapter *adapter)
+{
+        const struct adapter_info *ai = adapter->params.info;
+        unsigned int i, j = 0;
+        int ret;
+
+        early_hw_init(adapter, ai);
+        ret = init_parity(adapter);
+        if (ret)
+                return ret;
+
+        for_each_port(adapter, i) {
+                struct port_info *p = adap2pinfo(adapter, i);
+                while (!adapter->params.vpd.port_type[j])
+                        ++j;
+
+                p->port_type->phy_prep(&p->phy, adapter, ai->phy_base_addr + j,
+                                        ai->mdio_ops);
+
+                p->phy.ops->power_down(&p->phy, 1);
+                ++j;
+        }
+
+return 0;
+}
+