diff options
author | Divy Le Ray <divy@chelsio.com> | 2009-03-12 17:14:09 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-03-13 14:30:45 -0400 |
commit | fc88219601aa3f94def89433a6afde154e8faa8c (patch) | |
tree | 8c921807f947ba25c7ce188c9ec586aa57b0a0f9 /drivers/net/cxgb3/regs.h | |
parent | 42c8ea17e8f78752ed5a354791b0ea1697dc3480 (diff) |
cxgb3: disable high freq non-data interrupts
Under RX pressure, The HW might generate a high load of interrupts
to signal mac fifo or free lists overflow.
Disable the interrupts, and poll the relevant status bits
to maintain stats.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/cxgb3/regs.h')
-rw-r--r-- | drivers/net/cxgb3/regs.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index a035d5c24442..aa08550ee998 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h | |||
@@ -170,6 +170,10 @@ | |||
170 | 170 | ||
171 | #define S_RSPQ0DISABLED 8 | 171 | #define S_RSPQ0DISABLED 8 |
172 | 172 | ||
173 | #define S_FL0EMPTY 16 | ||
174 | #define V_FL0EMPTY(x) ((x) << S_FL0EMPTY) | ||
175 | #define F_FL0EMPTY V_FL0EMPTY(1U) | ||
176 | |||
173 | #define A_SG_EGR_RCQ_DRB_THRSH 0x54 | 177 | #define A_SG_EGR_RCQ_DRB_THRSH 0x54 |
174 | 178 | ||
175 | #define S_HIRCQDRBTHRSH 16 | 179 | #define S_HIRCQDRBTHRSH 16 |
@@ -258,6 +262,10 @@ | |||
258 | #define V_RSPQCREDITOVERFOW(x) ((x) << S_RSPQCREDITOVERFOW) | 262 | #define V_RSPQCREDITOVERFOW(x) ((x) << S_RSPQCREDITOVERFOW) |
259 | #define F_RSPQCREDITOVERFOW V_RSPQCREDITOVERFOW(1U) | 263 | #define F_RSPQCREDITOVERFOW V_RSPQCREDITOVERFOW(1U) |
260 | 264 | ||
265 | #define S_FLEMPTY 1 | ||
266 | #define V_FLEMPTY(x) ((x) << S_FLEMPTY) | ||
267 | #define F_FLEMPTY V_FLEMPTY(1U) | ||
268 | |||
261 | #define A_SG_INT_ENABLE 0x60 | 269 | #define A_SG_INT_ENABLE 0x60 |
262 | 270 | ||
263 | #define A_SG_CMDQ_CREDIT_TH 0x64 | 271 | #define A_SG_CMDQ_CREDIT_TH 0x64 |