diff options
author | Divy Le Ray <divy@chelsio.com> | 2007-03-18 16:10:12 -0400 |
---|---|---|
committer | Jeff Garzik <jeff@garzik.org> | 2007-03-23 01:48:34 -0400 |
commit | fc90664e3438c990d280f179ccb0642711d5c553 (patch) | |
tree | 8ece58a4eec002186f1c569385830f03336b50af /drivers/net/cxgb3/regs.h | |
parent | 2e2839627a957714808f98a802d137a7a2a1df46 (diff) |
cxgb3 - Fix potential MAC hang
Under rare conditions, the MAC might hang while generating a pause frame.
This patch fine tunes the MAC settings to avoid the issue, allows for
periodic MAC state check, and triggers a recovery if hung.
Also fix one MAC statistics counter for the rev board T3B2.
Signed-off-by: Divy Le Ray <divy@chelsio.com>
Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3/regs.h')
-rw-r--r-- | drivers/net/cxgb3/regs.h | 22 |
1 files changed, 22 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/regs.h b/drivers/net/cxgb3/regs.h index b56c5f52bcdc..b38629a244d0 100644 --- a/drivers/net/cxgb3/regs.h +++ b/drivers/net/cxgb3/regs.h | |||
@@ -1206,6 +1206,14 @@ | |||
1206 | 1206 | ||
1207 | #define A_TP_RX_TRC_KEY0 0x120 | 1207 | #define A_TP_RX_TRC_KEY0 0x120 |
1208 | 1208 | ||
1209 | #define A_TP_TX_DROP_CNT_CH0 0x12d | ||
1210 | |||
1211 | #define S_TXDROPCNTCH0RCVD 0 | ||
1212 | #define M_TXDROPCNTCH0RCVD 0xffff | ||
1213 | #define V_TXDROPCNTCH0RCVD(x) ((x) << S_TXDROPCNTCH0RCVD) | ||
1214 | #define G_TXDROPCNTCH0RCVD(x) (((x) >> S_TXDROPCNTCH0RCVD) & \ | ||
1215 | M_TXDROPCNTCH0RCVD) | ||
1216 | |||
1209 | #define A_ULPRX_CTL 0x500 | 1217 | #define A_ULPRX_CTL 0x500 |
1210 | 1218 | ||
1211 | #define S_ROUND_ROBIN 4 | 1219 | #define S_ROUND_ROBIN 4 |
@@ -1834,6 +1842,8 @@ | |||
1834 | #define V_TXPAUSEEN(x) ((x) << S_TXPAUSEEN) | 1842 | #define V_TXPAUSEEN(x) ((x) << S_TXPAUSEEN) |
1835 | #define F_TXPAUSEEN V_TXPAUSEEN(1U) | 1843 | #define F_TXPAUSEEN V_TXPAUSEEN(1U) |
1836 | 1844 | ||
1845 | #define A_XGM_TX_PAUSE_QUANTA 0x808 | ||
1846 | |||
1837 | #define A_XGM_RX_CTRL 0x80c | 1847 | #define A_XGM_RX_CTRL 0x80c |
1838 | 1848 | ||
1839 | #define S_RXEN 0 | 1849 | #define S_RXEN 0 |
@@ -1920,6 +1930,11 @@ | |||
1920 | 1930 | ||
1921 | #define A_XGM_TXFIFO_CFG 0x888 | 1931 | #define A_XGM_TXFIFO_CFG 0x888 |
1922 | 1932 | ||
1933 | #define S_TXIPG 13 | ||
1934 | #define M_TXIPG 0xff | ||
1935 | #define V_TXIPG(x) ((x) << S_TXIPG) | ||
1936 | #define G_TXIPG(x) (((x) >> S_TXIPG) & M_TXIPG) | ||
1937 | |||
1923 | #define S_TXFIFOTHRESH 4 | 1938 | #define S_TXFIFOTHRESH 4 |
1924 | #define M_TXFIFOTHRESH 0x1ff | 1939 | #define M_TXFIFOTHRESH 0x1ff |
1925 | 1940 | ||
@@ -2190,6 +2205,13 @@ | |||
2190 | 2205 | ||
2191 | #define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4 | 2206 | #define A_XGM_RX_MAX_PKT_SIZE_ERR_CNT 0x9a4 |
2192 | 2207 | ||
2208 | #define A_XGM_TX_SPI4_SOP_EOP_CNT 0x9a8 | ||
2209 | |||
2210 | #define S_TXSPI4SOPCNT 16 | ||
2211 | #define M_TXSPI4SOPCNT 0xffff | ||
2212 | #define V_TXSPI4SOPCNT(x) ((x) << S_TXSPI4SOPCNT) | ||
2213 | #define G_TXSPI4SOPCNT(x) (((x) >> S_TXSPI4SOPCNT) & M_TXSPI4SOPCNT) | ||
2214 | |||
2193 | #define A_XGM_RX_SPI4_SOP_EOP_CNT 0x9ac | 2215 | #define A_XGM_RX_SPI4_SOP_EOP_CNT 0x9ac |
2194 | 2216 | ||
2195 | #define XGMAC0_1_BASE_ADDR 0xa00 | 2217 | #define XGMAC0_1_BASE_ADDR 0xa00 |