aboutsummaryrefslogtreecommitdiffstats
path: root/drivers/net/cxgb3/adapter.h
diff options
context:
space:
mode:
authorDivy Le Ray <divy@chelsio.com>2007-01-18 22:04:14 -0500
committerJeff Garzik <jeff@garzik.org>2007-02-05 16:58:46 -0500
commit4d22de3e6cc4a09c369b504cd8bcde3385a974cd (patch)
treeaf13a2ee582105d961c79fc4e55fce0b5e043310 /drivers/net/cxgb3/adapter.h
parent0bf94faf64afaba6e7b49fd11541b59d2ba06d0e (diff)
Add support for the latest 1G/10G Chelsio adapter, T3.
This driver is required by the Chelsio T3 RDMA driver posted by Steve Wise. Signed-off-by: Divy Le Ray <divy@chelsio.com> Signed-off-by: Jeff Garzik <jeff@garzik.org>
Diffstat (limited to 'drivers/net/cxgb3/adapter.h')
-rw-r--r--drivers/net/cxgb3/adapter.h255
1 files changed, 255 insertions, 0 deletions
diff --git a/drivers/net/cxgb3/adapter.h b/drivers/net/cxgb3/adapter.h
new file mode 100644
index 000000000000..16643f6d00a9
--- /dev/null
+++ b/drivers/net/cxgb3/adapter.h
@@ -0,0 +1,255 @@
1/*
2 * This file is part of the Chelsio T3 Ethernet driver for Linux.
3 *
4 * Copyright (C) 2003-2006 Chelsio Communications. All rights reserved.
5 *
6 * This program is distributed in the hope that it will be useful, but WITHOUT
7 * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
8 * FITNESS FOR A PARTICULAR PURPOSE. See the LICENSE file included in this
9 * release for licensing terms and conditions.
10 */
11
12/* This file should not be included directly. Include common.h instead. */
13
14#ifndef __T3_ADAPTER_H__
15#define __T3_ADAPTER_H__
16
17#include <linux/pci.h>
18#include <linux/spinlock.h>
19#include <linux/interrupt.h>
20#include <linux/timer.h>
21#include <linux/cache.h>
22#include "t3cdev.h"
23#include <asm/semaphore.h>
24#include <asm/bitops.h>
25#include <asm/io.h>
26
27typedef irqreturn_t(*intr_handler_t) (int, void *);
28
29struct vlan_group;
30
31struct port_info {
32 struct vlan_group *vlan_grp;
33 const struct port_type_info *port_type;
34 u8 port_id;
35 u8 rx_csum_offload;
36 u8 nqsets;
37 u8 first_qset;
38 struct cphy phy;
39 struct cmac mac;
40 struct link_config link_config;
41 struct net_device_stats netstats;
42 int activity;
43};
44
45enum { /* adapter flags */
46 FULL_INIT_DONE = (1 << 0),
47 USING_MSI = (1 << 1),
48 USING_MSIX = (1 << 2),
49};
50
51struct rx_desc;
52struct rx_sw_desc;
53
54struct sge_fl { /* SGE per free-buffer list state */
55 unsigned int buf_size; /* size of each Rx buffer */
56 unsigned int credits; /* # of available Rx buffers */
57 unsigned int size; /* capacity of free list */
58 unsigned int cidx; /* consumer index */
59 unsigned int pidx; /* producer index */
60 unsigned int gen; /* free list generation */
61 struct rx_desc *desc; /* address of HW Rx descriptor ring */
62 struct rx_sw_desc *sdesc; /* address of SW Rx descriptor ring */
63 dma_addr_t phys_addr; /* physical address of HW ring start */
64 unsigned int cntxt_id; /* SGE context id for the free list */
65 unsigned long empty; /* # of times queue ran out of buffers */
66};
67
68/*
69 * Bundle size for grouping offload RX packets for delivery to the stack.
70 * Don't make this too big as we do prefetch on each packet in a bundle.
71 */
72# define RX_BUNDLE_SIZE 8
73
74struct rsp_desc;
75
76struct sge_rspq { /* state for an SGE response queue */
77 unsigned int credits; /* # of pending response credits */
78 unsigned int size; /* capacity of response queue */
79 unsigned int cidx; /* consumer index */
80 unsigned int gen; /* current generation bit */
81 unsigned int polling; /* is the queue serviced through NAPI? */
82 unsigned int holdoff_tmr; /* interrupt holdoff timer in 100ns */
83 unsigned int next_holdoff; /* holdoff time for next interrupt */
84 struct rsp_desc *desc; /* address of HW response ring */
85 dma_addr_t phys_addr; /* physical address of the ring */
86 unsigned int cntxt_id; /* SGE context id for the response q */
87 spinlock_t lock; /* guards response processing */
88 struct sk_buff *rx_head; /* offload packet receive queue head */
89 struct sk_buff *rx_tail; /* offload packet receive queue tail */
90
91 unsigned long offload_pkts;
92 unsigned long offload_bundles;
93 unsigned long eth_pkts; /* # of ethernet packets */
94 unsigned long pure_rsps; /* # of pure (non-data) responses */
95 unsigned long imm_data; /* responses with immediate data */
96 unsigned long rx_drops; /* # of packets dropped due to no mem */
97 unsigned long async_notif; /* # of asynchronous notification events */
98 unsigned long empty; /* # of times queue ran out of credits */
99 unsigned long nomem; /* # of responses deferred due to no mem */
100 unsigned long unhandled_irqs; /* # of spurious intrs */
101};
102
103struct tx_desc;
104struct tx_sw_desc;
105
106struct sge_txq { /* state for an SGE Tx queue */
107 unsigned long flags; /* HW DMA fetch status */
108 unsigned int in_use; /* # of in-use Tx descriptors */
109 unsigned int size; /* # of descriptors */
110 unsigned int processed; /* total # of descs HW has processed */
111 unsigned int cleaned; /* total # of descs SW has reclaimed */
112 unsigned int stop_thres; /* SW TX queue suspend threshold */
113 unsigned int cidx; /* consumer index */
114 unsigned int pidx; /* producer index */
115 unsigned int gen; /* current value of generation bit */
116 unsigned int unacked; /* Tx descriptors used since last COMPL */
117 struct tx_desc *desc; /* address of HW Tx descriptor ring */
118 struct tx_sw_desc *sdesc; /* address of SW Tx descriptor ring */
119 spinlock_t lock; /* guards enqueueing of new packets */
120 unsigned int token; /* WR token */
121 dma_addr_t phys_addr; /* physical address of the ring */
122 struct sk_buff_head sendq; /* List of backpressured offload packets */
123 struct tasklet_struct qresume_tsk; /* restarts the queue */
124 unsigned int cntxt_id; /* SGE context id for the Tx q */
125 unsigned long stops; /* # of times q has been stopped */
126 unsigned long restarts; /* # of queue restarts */
127};
128
129enum { /* per port SGE statistics */
130 SGE_PSTAT_TSO, /* # of TSO requests */
131 SGE_PSTAT_RX_CSUM_GOOD, /* # of successful RX csum offloads */
132 SGE_PSTAT_TX_CSUM, /* # of TX checksum offloads */
133 SGE_PSTAT_VLANEX, /* # of VLAN tag extractions */
134 SGE_PSTAT_VLANINS, /* # of VLAN tag insertions */
135
136 SGE_PSTAT_MAX /* must be last */
137};
138
139struct sge_qset { /* an SGE queue set */
140 struct sge_rspq rspq;
141 struct sge_fl fl[SGE_RXQ_PER_SET];
142 struct sge_txq txq[SGE_TXQ_PER_SET];
143 struct net_device *netdev; /* associated net device */
144 unsigned long txq_stopped; /* which Tx queues are stopped */
145 struct timer_list tx_reclaim_timer; /* reclaims TX buffers */
146 unsigned long port_stats[SGE_PSTAT_MAX];
147} ____cacheline_aligned;
148
149struct sge {
150 struct sge_qset qs[SGE_QSETS];
151 spinlock_t reg_lock; /* guards non-atomic SGE registers (eg context) */
152};
153
154struct adapter {
155 struct t3cdev tdev;
156 struct list_head adapter_list;
157 void __iomem *regs;
158 struct pci_dev *pdev;
159 unsigned long registered_device_map;
160 unsigned long open_device_map;
161 unsigned long flags;
162
163 const char *name;
164 int msg_enable;
165 unsigned int mmio_len;
166
167 struct adapter_params params;
168 unsigned int slow_intr_mask;
169 unsigned long irq_stats[IRQ_NUM_STATS];
170
171 struct {
172 unsigned short vec;
173 char desc[22];
174 } msix_info[SGE_QSETS + 1];
175
176 /* T3 modules */
177 struct sge sge;
178 struct mc7 pmrx;
179 struct mc7 pmtx;
180 struct mc7 cm;
181 struct mc5 mc5;
182
183 struct net_device *port[MAX_NPORTS];
184 unsigned int check_task_cnt;
185 struct delayed_work adap_check_task;
186 struct work_struct ext_intr_handler_task;
187
188 /*
189 * Dummy netdevices are needed when using multiple receive queues with
190 * NAPI as each netdevice can service only one queue.
191 */
192 struct net_device *dummy_netdev[SGE_QSETS - 1];
193
194 struct dentry *debugfs_root;
195
196 struct mutex mdio_lock;
197 spinlock_t stats_lock;
198 spinlock_t work_lock;
199};
200
201static inline u32 t3_read_reg(struct adapter *adapter, u32 reg_addr)
202{
203 u32 val = readl(adapter->regs + reg_addr);
204
205 CH_DBG(adapter, MMIO, "read register 0x%x value 0x%x\n", reg_addr, val);
206 return val;
207}
208
209static inline void t3_write_reg(struct adapter *adapter, u32 reg_addr, u32 val)
210{
211 CH_DBG(adapter, MMIO, "setting register 0x%x to 0x%x\n", reg_addr, val);
212 writel(val, adapter->regs + reg_addr);
213}
214
215static inline struct port_info *adap2pinfo(struct adapter *adap, int idx)
216{
217 return netdev_priv(adap->port[idx]);
218}
219
220/*
221 * We use the spare atalk_ptr to map a net device to its SGE queue set.
222 * This is a macro so it can be used as l-value.
223 */
224#define dev2qset(netdev) ((netdev)->atalk_ptr)
225
226#define OFFLOAD_DEVMAP_BIT 15
227
228#define tdev2adap(d) container_of(d, struct adapter, tdev)
229
230static inline int offload_running(struct adapter *adapter)
231{
232 return test_bit(OFFLOAD_DEVMAP_BIT, &adapter->open_device_map);
233}
234
235int t3_offload_tx(struct t3cdev *tdev, struct sk_buff *skb);
236
237void t3_os_ext_intr_handler(struct adapter *adapter);
238void t3_os_link_changed(struct adapter *adapter, int port_id, int link_status,
239 int speed, int duplex, int fc);
240
241void t3_sge_start(struct adapter *adap);
242void t3_sge_stop(struct adapter *adap);
243void t3_free_sge_resources(struct adapter *adap);
244void t3_sge_err_intr_handler(struct adapter *adapter);
245intr_handler_t t3_intr_handler(struct adapter *adap, int polling);
246int t3_eth_xmit(struct sk_buff *skb, struct net_device *dev);
247void t3_update_qset_coalesce(struct sge_qset *qs, const struct qset_params *p);
248int t3_sge_alloc_qset(struct adapter *adapter, unsigned int id, int nports,
249 int irq_vec_idx, const struct qset_params *p,
250 int ntxq, struct net_device *netdev);
251int t3_get_desc(const struct sge_qset *qs, unsigned int qnum, unsigned int idx,
252 unsigned char *data);
253irqreturn_t t3_sge_intr_msix(int irq, void *cookie);
254
255#endif /* __T3_ADAPTER_H__ */
generated by cgit v1.2.2 (git 2.25.0) at 2024-12-13 15:16:02 -0500