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authorFlorian Fainelli <florian@openwrt.org>2010-01-27 03:10:06 -0500
committerRalf Baechle <ralf@linux-mips.org>2010-02-27 06:53:16 -0500
commit780019ddf02f214ad61e641b57b8ac30c837e2a7 (patch)
tree2d0a01efc4d508057bcfaa7b3df5b3e490c249ed /drivers/net/cpmac.c
parent5f3c909881d5deebb9a3ddc836a15937e76daefc (diff)
MIPS: AR7: Implement clock API
This patch makes the ar7 clock code implement the Linux clk API. Drivers using the various clocks available in the SoC are updated accordingly. Signed-off-by: Florian Fainelli <florian@openwrt.org> Acked-by: Wim Van Sebroeck <wim@iguana.be> To: linux-mips@linux-mips.org Cc: Wim Van Sebroeck <wim@iguana.be> Cc: netdev@vger.kernel.org Cc: David Miller <davem@davemloft.net> Patchwork: http://patchwork.linux-mips.org/patch/881/ Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
Diffstat (limited to 'drivers/net/cpmac.c')
-rw-r--r--drivers/net/cpmac.c10
1 files changed, 9 insertions, 1 deletions
diff --git a/drivers/net/cpmac.c b/drivers/net/cpmac.c
index 8d0be26f94e3..bf2072e54200 100644
--- a/drivers/net/cpmac.c
+++ b/drivers/net/cpmac.c
@@ -36,6 +36,7 @@
36#include <linux/phy_fixed.h> 36#include <linux/phy_fixed.h>
37#include <linux/platform_device.h> 37#include <linux/platform_device.h>
38#include <linux/dma-mapping.h> 38#include <linux/dma-mapping.h>
39#include <linux/clk.h>
39#include <asm/gpio.h> 40#include <asm/gpio.h>
40#include <asm/atomic.h> 41#include <asm/atomic.h>
41 42
@@ -294,9 +295,16 @@ static int cpmac_mdio_write(struct mii_bus *bus, int phy_id,
294 295
295static int cpmac_mdio_reset(struct mii_bus *bus) 296static int cpmac_mdio_reset(struct mii_bus *bus)
296{ 297{
298 struct clk *cpmac_clk;
299
300 cpmac_clk = clk_get(&bus->dev, "cpmac");
301 if (IS_ERR(cpmac_clk)) {
302 printk(KERN_ERR "unable to get cpmac clock\n");
303 return -1;
304 }
297 ar7_device_reset(AR7_RESET_BIT_MDIO); 305 ar7_device_reset(AR7_RESET_BIT_MDIO);
298 cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE | 306 cpmac_write(bus->priv, CPMAC_MDIO_CONTROL, MDIOC_ENABLE |
299 MDIOC_CLKDIV(ar7_cpmac_freq() / 2200000 - 1)); 307 MDIOC_CLKDIV(clk_get_rate(cpmac_clk) / 2200000 - 1));
300 return 0; 308 return 0;
301} 309}
302 310