diff options
author | Scott Bardone <sbardone@chelsio.com> | 2005-06-23 01:40:19 -0400 |
---|---|---|
committer | Jeff Garzik <jgarzik@pobox.com> | 2005-06-23 01:40:19 -0400 |
commit | 559fb51ba7e66fe298b8355fabde1275b7def35f (patch) | |
tree | e1de3eb86ea5e6ac8c5f27dc32140a0c2aacc51e /drivers/net/chelsio/subr.c | |
parent | a5324343955997d1439f26518ddac567cd5d134b (diff) |
Update Chelsio gige net driver.
- Use extern prefix for functions required.
- Removed a lot of wrappers, including t1_read/write_reg_4.
- Removed various macros, using native kernel calls now.
- Enumerated various #defines.
- Removed a lot of shared code which is not currently used in "NIC only" mode.
- Removed dead code.
Documentation/networking/cxgb.txt:
- Updated release notes for version 2.1.1
drivers/net/chelsio/ch_ethtool.h
- removed file, no longer using ETHTOOL namespace.
drivers/net/chelsio/common.h
- moved code from osdep.h to common.h
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/cphy.h
- removed dead code.
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/cxgb2.c
- use DMA_{32,64}BIT_MASK in include/linux/dma-mapping.h.
- removed unused code.
- use printk message for link info resembling drivers/net/mii.c.
- no longer using the MODULE_xxx namespace.
- no longer using "pci_" namespace.
- no longer using ETHTOOL namespace.
drivers/net/chelsio/cxgb2.h
- removed file, merged into common.h
drivers/net/chelsio/elmer0.h
- removed dead code.
- added various enums.
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/espi.c
- removed various macros, using native kernel calls now.
- removed a lot of wrappers, including t1_read/write_reg_4.
drivers/net/chelsio/espi.h
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/gmac.h
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/mv88x201x.c
- changes to sync with Chelsio TOT.
drivers/net/chelsio/osdep.h
- removed file, consolidation. osdep was used to translate wrapper functions
since our code supports multiple OSs. removed wrappers.
drivers/net/chelsio/pm3393.c
- removed various macros, using native kernel calls now.
- removed a lot of wrappers, including t1_read/write_reg_4.
- removed unused code.
drivers/net/chelsio/regs.h
- added a few register entries for future and current feature support.
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/sge.c
- rewrote large portion of scatter-gather engine to stabilize
performance.
- using u8/u16/u32 kernel types instead of __u8/__u16/__u32 compiler
types.
drivers/net/chelsio/sge.h
- rewrote large portion of scatter-gather engine to stabilize
performance.
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/subr.c
- merged tp.c into subr.c
- removed various macros, using native kernel calls now.
- removed a lot of wrappers, including t1_read/write_reg_4.
- removed unused code.
drivers/net/chelsio/suni1x10gexp_regs.h
- modified copyright and authorship of file.
- added comment to #endif indicating which symbol it closes.
drivers/net/chelsio/tp.c
- removed file, merged into subr.c.
drivers/net/chelsio/tp.h
- removed file.
include/linux/pci_ids.h
- patched to include PCI_VENDOR_ID_CHELSIO 0x1425, removed define from
our code.
Diffstat (limited to 'drivers/net/chelsio/subr.c')
-rw-r--r-- | drivers/net/chelsio/subr.c | 235 |
1 files changed, 108 insertions, 127 deletions
diff --git a/drivers/net/chelsio/subr.c b/drivers/net/chelsio/subr.c index a90a3f95fcac..1ebb5d149aef 100644 --- a/drivers/net/chelsio/subr.c +++ b/drivers/net/chelsio/subr.c | |||
@@ -1,8 +1,8 @@ | |||
1 | /***************************************************************************** | 1 | /***************************************************************************** |
2 | * * | 2 | * * |
3 | * File: subr.c * | 3 | * File: subr.c * |
4 | * $Revision: 1.12 $ * | 4 | * $Revision: 1.27 $ * |
5 | * $Date: 2005/03/23 07:41:27 $ * | 5 | * $Date: 2005/06/22 01:08:36 $ * |
6 | * Description: * | 6 | * Description: * |
7 | * Various subroutines (intr,pio,etc.) used by Chelsio 10G Ethernet driver. * | 7 | * Various subroutines (intr,pio,etc.) used by Chelsio 10G Ethernet driver. * |
8 | * part of the Chelsio 10Gb Ethernet Driver. * | 8 | * part of the Chelsio 10Gb Ethernet Driver. * |
@@ -40,11 +40,9 @@ | |||
40 | #include "common.h" | 40 | #include "common.h" |
41 | #include "elmer0.h" | 41 | #include "elmer0.h" |
42 | #include "regs.h" | 42 | #include "regs.h" |
43 | |||
44 | #include "gmac.h" | 43 | #include "gmac.h" |
45 | #include "cphy.h" | 44 | #include "cphy.h" |
46 | #include "sge.h" | 45 | #include "sge.h" |
47 | #include "tp.h" | ||
48 | #include "espi.h" | 46 | #include "espi.h" |
49 | 47 | ||
50 | /** | 48 | /** |
@@ -64,7 +62,7 @@ static int t1_wait_op_done(adapter_t *adapter, int reg, u32 mask, int polarity, | |||
64 | int attempts, int delay) | 62 | int attempts, int delay) |
65 | { | 63 | { |
66 | while (1) { | 64 | while (1) { |
67 | u32 val = t1_read_reg_4(adapter, reg) & mask; | 65 | u32 val = readl(adapter->regs + reg) & mask; |
68 | 66 | ||
69 | if (!!val == polarity) | 67 | if (!!val == polarity) |
70 | return 0; | 68 | return 0; |
@@ -84,9 +82,9 @@ static int __t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) | |||
84 | { | 82 | { |
85 | int tpi_busy; | 83 | int tpi_busy; |
86 | 84 | ||
87 | t1_write_reg_4(adapter, A_TPI_ADDR, addr); | 85 | writel(addr, adapter->regs + A_TPI_ADDR); |
88 | t1_write_reg_4(adapter, A_TPI_WR_DATA, value); | 86 | writel(value, adapter->regs + A_TPI_WR_DATA); |
89 | t1_write_reg_4(adapter, A_TPI_CSR, F_TPIWR); | 87 | writel(F_TPIWR, adapter->regs + A_TPI_CSR); |
90 | 88 | ||
91 | tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, | 89 | tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, |
92 | TPI_ATTEMPTS, 3); | 90 | TPI_ATTEMPTS, 3); |
@@ -100,9 +98,9 @@ int t1_tpi_write(adapter_t *adapter, u32 addr, u32 value) | |||
100 | { | 98 | { |
101 | int ret; | 99 | int ret; |
102 | 100 | ||
103 | TPI_LOCK(adapter); | 101 | spin_lock(&(adapter)->tpi_lock); |
104 | ret = __t1_tpi_write(adapter, addr, value); | 102 | ret = __t1_tpi_write(adapter, addr, value); |
105 | TPI_UNLOCK(adapter); | 103 | spin_unlock(&(adapter)->tpi_lock); |
106 | return ret; | 104 | return ret; |
107 | } | 105 | } |
108 | 106 | ||
@@ -113,8 +111,8 @@ static int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) | |||
113 | { | 111 | { |
114 | int tpi_busy; | 112 | int tpi_busy; |
115 | 113 | ||
116 | t1_write_reg_4(adapter, A_TPI_ADDR, addr); | 114 | writel(addr, adapter->regs + A_TPI_ADDR); |
117 | t1_write_reg_4(adapter, A_TPI_CSR, 0); | 115 | writel(0, adapter->regs + A_TPI_CSR); |
118 | 116 | ||
119 | tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, | 117 | tpi_busy = t1_wait_op_done(adapter, A_TPI_CSR, F_TPIRDY, 1, |
120 | TPI_ATTEMPTS, 3); | 118 | TPI_ATTEMPTS, 3); |
@@ -122,7 +120,7 @@ static int __t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) | |||
122 | CH_ALERT("%s: TPI read from 0x%x failed\n", | 120 | CH_ALERT("%s: TPI read from 0x%x failed\n", |
123 | adapter->name, addr); | 121 | adapter->name, addr); |
124 | else | 122 | else |
125 | *valp = t1_read_reg_4(adapter, A_TPI_RD_DATA); | 123 | *valp = readl(adapter->regs + A_TPI_RD_DATA); |
126 | return tpi_busy; | 124 | return tpi_busy; |
127 | } | 125 | } |
128 | 126 | ||
@@ -130,21 +128,13 @@ int t1_tpi_read(adapter_t *adapter, u32 addr, u32 *valp) | |||
130 | { | 128 | { |
131 | int ret; | 129 | int ret; |
132 | 130 | ||
133 | TPI_LOCK(adapter); | 131 | spin_lock(&(adapter)->tpi_lock); |
134 | ret = __t1_tpi_read(adapter, addr, valp); | 132 | ret = __t1_tpi_read(adapter, addr, valp); |
135 | TPI_UNLOCK(adapter); | 133 | spin_unlock(&(adapter)->tpi_lock); |
136 | return ret; | 134 | return ret; |
137 | } | 135 | } |
138 | 136 | ||
139 | /* | 137 | /* |
140 | * Set a TPI parameter. | ||
141 | */ | ||
142 | static void t1_tpi_par(adapter_t *adapter, u32 value) | ||
143 | { | ||
144 | t1_write_reg_4(adapter, A_TPI_PAR, V_TPIPAR(value)); | ||
145 | } | ||
146 | |||
147 | /* | ||
148 | * Called when a port's link settings change to propagate the new values to the | 138 | * Called when a port's link settings change to propagate the new values to the |
149 | * associated PHY and MAC. After performing the common tasks it invokes an | 139 | * associated PHY and MAC. After performing the common tasks it invokes an |
150 | * OS-specific handler. | 140 | * OS-specific handler. |
@@ -227,7 +217,7 @@ static int mi1_mdio_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr, | |||
227 | { | 217 | { |
228 | u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); | 218 | u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); |
229 | 219 | ||
230 | TPI_LOCK(adapter); | 220 | spin_lock(&(adapter)->tpi_lock); |
231 | 221 | ||
232 | /* Write the address we want. */ | 222 | /* Write the address we want. */ |
233 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); | 223 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); |
@@ -242,7 +232,7 @@ static int mi1_mdio_ext_read(adapter_t *adapter, int phy_addr, int mmd_addr, | |||
242 | 232 | ||
243 | /* Read the data. */ | 233 | /* Read the data. */ |
244 | __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, valp); | 234 | __t1_tpi_read(adapter, A_ELMER0_PORT0_MI1_DATA, valp); |
245 | TPI_UNLOCK(adapter); | 235 | spin_unlock(&(adapter)->tpi_lock); |
246 | return 0; | 236 | return 0; |
247 | } | 237 | } |
248 | 238 | ||
@@ -251,7 +241,7 @@ static int mi1_mdio_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr, | |||
251 | { | 241 | { |
252 | u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); | 242 | u32 addr = V_MI1_REG_ADDR(mmd_addr) | V_MI1_PHY_ADDR(phy_addr); |
253 | 243 | ||
254 | TPI_LOCK(adapter); | 244 | spin_lock(&(adapter)->tpi_lock); |
255 | 245 | ||
256 | /* Write the address we want. */ | 246 | /* Write the address we want. */ |
257 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); | 247 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_ADDR, addr); |
@@ -264,7 +254,7 @@ static int mi1_mdio_ext_write(adapter_t *adapter, int phy_addr, int mmd_addr, | |||
264 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val); | 254 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_DATA, val); |
265 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_OP, MI1_OP_INDIRECT_WRITE); | 255 | __t1_tpi_write(adapter, A_ELMER0_PORT0_MI1_OP, MI1_OP_INDIRECT_WRITE); |
266 | mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); | 256 | mi1_wait_until_ready(adapter, A_ELMER0_PORT0_MI1_OP); |
267 | TPI_UNLOCK(adapter); | 257 | spin_unlock(&(adapter)->tpi_lock); |
268 | return 0; | 258 | return 0; |
269 | } | 259 | } |
270 | 260 | ||
@@ -277,7 +267,6 @@ static struct mdio_ops mi1_mdio_ext_ops = { | |||
277 | enum { | 267 | enum { |
278 | CH_BRD_N110_1F, | 268 | CH_BRD_N110_1F, |
279 | CH_BRD_N210_1F, | 269 | CH_BRD_N210_1F, |
280 | CH_BRD_T210_1F, | ||
281 | }; | 270 | }; |
282 | 271 | ||
283 | static struct board_info t1_board[] = { | 272 | static struct board_info t1_board[] = { |
@@ -308,13 +297,15 @@ struct pci_device_id t1_pci_tbl[] = { | |||
308 | { 0, } | 297 | { 0, } |
309 | }; | 298 | }; |
310 | 299 | ||
300 | MODULE_DEVICE_TABLE(pci, t1_pci_tbl); | ||
301 | |||
311 | /* | 302 | /* |
312 | * Return the board_info structure with a given index. Out-of-range indices | 303 | * Return the board_info structure with a given index. Out-of-range indices |
313 | * return NULL. | 304 | * return NULL. |
314 | */ | 305 | */ |
315 | const struct board_info *t1_get_board_info(unsigned int board_id) | 306 | const struct board_info *t1_get_board_info(unsigned int board_id) |
316 | { | 307 | { |
317 | return board_id < DIMOF(t1_board) ? &t1_board[board_id] : NULL; | 308 | return board_id < ARRAY_SIZE(t1_board) ? &t1_board[board_id] : NULL; |
318 | } | 309 | } |
319 | 310 | ||
320 | struct chelsio_vpd_t { | 311 | struct chelsio_vpd_t { |
@@ -436,7 +427,6 @@ int elmer0_ext_intr_handler(adapter_t *adapter) | |||
436 | t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause); | 427 | t1_tpi_read(adapter, A_ELMER0_INT_CAUSE, &cause); |
437 | 428 | ||
438 | switch (board_info(adapter)->board) { | 429 | switch (board_info(adapter)->board) { |
439 | case CHBT_BOARD_CHT210: | ||
440 | case CHBT_BOARD_N210: | 430 | case CHBT_BOARD_N210: |
441 | case CHBT_BOARD_N110: | 431 | case CHBT_BOARD_N110: |
442 | if (cause & ELMER0_GP_BIT6) { /* Marvell 88x2010 interrupt */ | 432 | if (cause & ELMER0_GP_BIT6) { /* Marvell 88x2010 interrupt */ |
@@ -446,23 +436,6 @@ int elmer0_ext_intr_handler(adapter_t *adapter) | |||
446 | link_changed(adapter, 0); | 436 | link_changed(adapter, 0); |
447 | } | 437 | } |
448 | break; | 438 | break; |
449 | case CHBT_BOARD_8000: | ||
450 | case CHBT_BOARD_CHT110: | ||
451 | CH_DBG(adapter, INTR, "External interrupt cause 0x%x\n", | ||
452 | cause); | ||
453 | if (cause & ELMER0_GP_BIT1) { /* PMC3393 INTB */ | ||
454 | struct cmac *mac = adapter->port[0].mac; | ||
455 | |||
456 | mac->ops->interrupt_handler(mac); | ||
457 | } | ||
458 | if (cause & ELMER0_GP_BIT5) { /* XPAK MOD_DETECT */ | ||
459 | u32 mod_detect; | ||
460 | |||
461 | t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect); | ||
462 | CH_MSG(adapter, INFO, LINK, "XPAK %s\n", | ||
463 | mod_detect ? "removed" : "inserted"); | ||
464 | } | ||
465 | break; | ||
466 | } | 439 | } |
467 | t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause); | 440 | t1_tpi_write(adapter, A_ELMER0_INT_CAUSE, cause); |
468 | return 0; | 441 | return 0; |
@@ -472,11 +445,11 @@ int elmer0_ext_intr_handler(adapter_t *adapter) | |||
472 | void t1_interrupts_enable(adapter_t *adapter) | 445 | void t1_interrupts_enable(adapter_t *adapter) |
473 | { | 446 | { |
474 | unsigned int i; | 447 | unsigned int i; |
448 | u32 pl_intr; | ||
475 | 449 | ||
476 | adapter->slow_intr_mask = F_PL_INTR_SGE_ERR | F_PL_INTR_TP; | 450 | adapter->slow_intr_mask = F_PL_INTR_SGE_ERR; |
477 | 451 | ||
478 | t1_sge_intr_enable(adapter->sge); | 452 | t1_sge_intr_enable(adapter->sge); |
479 | t1_tp_intr_enable(adapter->tp); | ||
480 | if (adapter->espi) { | 453 | if (adapter->espi) { |
481 | adapter->slow_intr_mask |= F_PL_INTR_ESPI; | 454 | adapter->slow_intr_mask |= F_PL_INTR_ESPI; |
482 | t1_espi_intr_enable(adapter->espi); | 455 | t1_espi_intr_enable(adapter->espi); |
@@ -489,17 +462,15 @@ void t1_interrupts_enable(adapter_t *adapter) | |||
489 | } | 462 | } |
490 | 463 | ||
491 | /* Enable PCIX & external chip interrupts on ASIC boards. */ | 464 | /* Enable PCIX & external chip interrupts on ASIC boards. */ |
492 | if (t1_is_asic(adapter)) { | 465 | pl_intr = readl(adapter->regs + A_PL_ENABLE); |
493 | u32 pl_intr = t1_read_reg_4(adapter, A_PL_ENABLE); | ||
494 | 466 | ||
495 | /* PCI-X interrupts */ | 467 | /* PCI-X interrupts */ |
496 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, | 468 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, |
497 | 0xffffffff); | 469 | 0xffffffff); |
498 | 470 | ||
499 | adapter->slow_intr_mask |= F_PL_INTR_EXT | F_PL_INTR_PCIX; | 471 | adapter->slow_intr_mask |= F_PL_INTR_EXT | F_PL_INTR_PCIX; |
500 | pl_intr |= F_PL_INTR_EXT | F_PL_INTR_PCIX; | 472 | pl_intr |= F_PL_INTR_EXT | F_PL_INTR_PCIX; |
501 | t1_write_reg_4(adapter, A_PL_ENABLE, pl_intr); | 473 | writel(pl_intr, adapter->regs + A_PL_ENABLE); |
502 | } | ||
503 | } | 474 | } |
504 | 475 | ||
505 | /* Disables all interrupts. */ | 476 | /* Disables all interrupts. */ |
@@ -508,7 +479,6 @@ void t1_interrupts_disable(adapter_t* adapter) | |||
508 | unsigned int i; | 479 | unsigned int i; |
509 | 480 | ||
510 | t1_sge_intr_disable(adapter->sge); | 481 | t1_sge_intr_disable(adapter->sge); |
511 | t1_tp_intr_disable(adapter->tp); | ||
512 | if (adapter->espi) | 482 | if (adapter->espi) |
513 | t1_espi_intr_disable(adapter->espi); | 483 | t1_espi_intr_disable(adapter->espi); |
514 | 484 | ||
@@ -519,8 +489,7 @@ void t1_interrupts_disable(adapter_t* adapter) | |||
519 | } | 489 | } |
520 | 490 | ||
521 | /* Disable PCIX & external chip interrupts. */ | 491 | /* Disable PCIX & external chip interrupts. */ |
522 | if (t1_is_asic(adapter)) | 492 | writel(0, adapter->regs + A_PL_ENABLE); |
523 | t1_write_reg_4(adapter, A_PL_ENABLE, 0); | ||
524 | 493 | ||
525 | /* PCI-X interrupts */ | 494 | /* PCI-X interrupts */ |
526 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0); | 495 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_ENABLE, 0); |
@@ -532,9 +501,10 @@ void t1_interrupts_disable(adapter_t* adapter) | |||
532 | void t1_interrupts_clear(adapter_t* adapter) | 501 | void t1_interrupts_clear(adapter_t* adapter) |
533 | { | 502 | { |
534 | unsigned int i; | 503 | unsigned int i; |
504 | u32 pl_intr; | ||
505 | |||
535 | 506 | ||
536 | t1_sge_intr_clear(adapter->sge); | 507 | t1_sge_intr_clear(adapter->sge); |
537 | t1_tp_intr_clear(adapter->tp); | ||
538 | if (adapter->espi) | 508 | if (adapter->espi) |
539 | t1_espi_intr_clear(adapter->espi); | 509 | t1_espi_intr_clear(adapter->espi); |
540 | 510 | ||
@@ -545,12 +515,10 @@ void t1_interrupts_clear(adapter_t* adapter) | |||
545 | } | 515 | } |
546 | 516 | ||
547 | /* Enable interrupts for external devices. */ | 517 | /* Enable interrupts for external devices. */ |
548 | if (t1_is_asic(adapter)) { | 518 | pl_intr = readl(adapter->regs + A_PL_CAUSE); |
549 | u32 pl_intr = t1_read_reg_4(adapter, A_PL_CAUSE); | ||
550 | 519 | ||
551 | t1_write_reg_4(adapter, A_PL_CAUSE, | 520 | writel(pl_intr | F_PL_INTR_EXT | F_PL_INTR_PCIX, |
552 | pl_intr | F_PL_INTR_EXT | F_PL_INTR_PCIX); | 521 | adapter->regs + A_PL_CAUSE); |
553 | } | ||
554 | 522 | ||
555 | /* PCI-X interrupts */ | 523 | /* PCI-X interrupts */ |
556 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, 0xffffffff); | 524 | pci_write_config_dword(adapter->pdev, A_PCICFG_INTR_CAUSE, 0xffffffff); |
@@ -559,17 +527,15 @@ void t1_interrupts_clear(adapter_t* adapter) | |||
559 | /* | 527 | /* |
560 | * Slow path interrupt handler for ASICs. | 528 | * Slow path interrupt handler for ASICs. |
561 | */ | 529 | */ |
562 | static int asic_slow_intr(adapter_t *adapter) | 530 | int t1_slow_intr_handler(adapter_t *adapter) |
563 | { | 531 | { |
564 | u32 cause = t1_read_reg_4(adapter, A_PL_CAUSE); | 532 | u32 cause = readl(adapter->regs + A_PL_CAUSE); |
565 | 533 | ||
566 | cause &= adapter->slow_intr_mask; | 534 | cause &= adapter->slow_intr_mask; |
567 | if (!cause) | 535 | if (!cause) |
568 | return 0; | 536 | return 0; |
569 | if (cause & F_PL_INTR_SGE_ERR) | 537 | if (cause & F_PL_INTR_SGE_ERR) |
570 | t1_sge_intr_error_handler(adapter->sge); | 538 | t1_sge_intr_error_handler(adapter->sge); |
571 | if (cause & F_PL_INTR_TP) | ||
572 | t1_tp_intr_handler(adapter->tp); | ||
573 | if (cause & F_PL_INTR_ESPI) | 539 | if (cause & F_PL_INTR_ESPI) |
574 | t1_espi_intr_handler(adapter->espi); | 540 | t1_espi_intr_handler(adapter->espi); |
575 | if (cause & F_PL_INTR_PCIX) | 541 | if (cause & F_PL_INTR_PCIX) |
@@ -578,41 +544,82 @@ static int asic_slow_intr(adapter_t *adapter) | |||
578 | t1_elmer0_ext_intr(adapter); | 544 | t1_elmer0_ext_intr(adapter); |
579 | 545 | ||
580 | /* Clear the interrupts just processed. */ | 546 | /* Clear the interrupts just processed. */ |
581 | t1_write_reg_4(adapter, A_PL_CAUSE, cause); | 547 | writel(cause, adapter->regs + A_PL_CAUSE); |
582 | (void)t1_read_reg_4(adapter, A_PL_CAUSE); /* flush writes */ | 548 | (void)readl(adapter->regs + A_PL_CAUSE); /* flush writes */ |
583 | return 1; | 549 | return 1; |
584 | } | 550 | } |
585 | 551 | ||
586 | int t1_slow_intr_handler(adapter_t *adapter) | 552 | /* Pause deadlock avoidance parameters */ |
553 | #define DROP_MSEC 16 | ||
554 | #define DROP_PKTS_CNT 1 | ||
555 | |||
556 | static void set_csum_offload(adapter_t *adapter, u32 csum_bit, int enable) | ||
557 | { | ||
558 | u32 val = readl(adapter->regs + A_TP_GLOBAL_CONFIG); | ||
559 | |||
560 | if (enable) | ||
561 | val |= csum_bit; | ||
562 | else | ||
563 | val &= ~csum_bit; | ||
564 | writel(val, adapter->regs + A_TP_GLOBAL_CONFIG); | ||
565 | } | ||
566 | |||
567 | void t1_tp_set_ip_checksum_offload(adapter_t *adapter, int enable) | ||
587 | { | 568 | { |
588 | return asic_slow_intr(adapter); | 569 | set_csum_offload(adapter, F_IP_CSUM, enable); |
589 | } | 570 | } |
590 | 571 | ||
591 | /* Power sequencing is a work-around for Intel's XPAKs. */ | 572 | void t1_tp_set_udp_checksum_offload(adapter_t *adapter, int enable) |
592 | static void power_sequence_xpak(adapter_t* adapter) | ||
593 | { | 573 | { |
594 | u32 mod_detect; | 574 | set_csum_offload(adapter, F_UDP_CSUM, enable); |
595 | u32 gpo; | 575 | } |
596 | 576 | ||
597 | /* Check for XPAK */ | 577 | void t1_tp_set_tcp_checksum_offload(adapter_t *adapter, int enable) |
598 | t1_tpi_read(adapter, A_ELMER0_GPI_STAT, &mod_detect); | 578 | { |
599 | if (!(ELMER0_GP_BIT5 & mod_detect)) { | 579 | set_csum_offload(adapter, F_TCP_CSUM, enable); |
600 | /* XPAK is present */ | 580 | } |
601 | t1_tpi_read(adapter, A_ELMER0_GPO, &gpo); | 581 | |
602 | gpo |= ELMER0_GP_BIT18; | 582 | static void t1_tp_reset(adapter_t *adapter, unsigned int tp_clk) |
603 | t1_tpi_write(adapter, A_ELMER0_GPO, gpo); | 583 | { |
584 | u32 val; | ||
585 | |||
586 | val = F_TP_IN_CSPI_CPL | F_TP_IN_CSPI_CHECK_IP_CSUM | | ||
587 | F_TP_IN_CSPI_CHECK_TCP_CSUM | F_TP_IN_ESPI_ETHERNET; | ||
588 | val |= F_TP_IN_ESPI_CHECK_IP_CSUM | | ||
589 | F_TP_IN_ESPI_CHECK_TCP_CSUM; | ||
590 | writel(val, adapter->regs + A_TP_IN_CONFIG); | ||
591 | writel(F_TP_OUT_CSPI_CPL | | ||
592 | F_TP_OUT_ESPI_ETHERNET | | ||
593 | F_TP_OUT_ESPI_GENERATE_IP_CSUM | | ||
594 | F_TP_OUT_ESPI_GENERATE_TCP_CSUM, | ||
595 | adapter->regs + A_TP_OUT_CONFIG); | ||
596 | |||
597 | val = readl(adapter->regs + A_TP_GLOBAL_CONFIG); | ||
598 | val &= ~(F_IP_CSUM | F_UDP_CSUM | F_TCP_CSUM); | ||
599 | writel(val, adapter->regs + A_TP_GLOBAL_CONFIG); | ||
600 | |||
601 | /* | ||
602 | * Enable pause frame deadlock prevention. | ||
603 | */ | ||
604 | if (is_T2(adapter)) { | ||
605 | u32 drop_ticks = DROP_MSEC * (tp_clk / 1000); | ||
606 | |||
607 | writel(F_ENABLE_TX_DROP | F_ENABLE_TX_ERROR | | ||
608 | V_DROP_TICKS_CNT(drop_ticks) | | ||
609 | V_NUM_PKTS_DROPPED(DROP_PKTS_CNT), | ||
610 | adapter->regs + A_TP_TX_DROP_CONFIG); | ||
604 | } | 611 | } |
612 | |||
613 | writel(F_TP_RESET, adapter->regs + A_TP_RESET); | ||
605 | } | 614 | } |
606 | 615 | ||
607 | int __devinit t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, | 616 | int __devinit t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, |
608 | struct adapter_params *p) | 617 | struct adapter_params *p) |
609 | { | 618 | { |
610 | p->chip_version = bi->chip_term; | 619 | p->chip_version = bi->chip_term; |
611 | p->is_asic = (p->chip_version != CHBT_TERM_FPGA); | ||
612 | if (p->chip_version == CHBT_TERM_T1 || | 620 | if (p->chip_version == CHBT_TERM_T1 || |
613 | p->chip_version == CHBT_TERM_T2 || | 621 | p->chip_version == CHBT_TERM_T2) { |
614 | p->chip_version == CHBT_TERM_FPGA) { | 622 | u32 val = readl(adapter->regs + A_TP_PC_CONFIG); |
615 | u32 val = t1_read_reg_4(adapter, A_TP_PC_CONFIG); | ||
616 | 623 | ||
617 | val = G_TP_PC_REV(val); | 624 | val = G_TP_PC_REV(val); |
618 | if (val == 2) | 625 | if (val == 2) |
@@ -633,23 +640,11 @@ int __devinit t1_get_board_rev(adapter_t *adapter, const struct board_info *bi, | |||
633 | static int board_init(adapter_t *adapter, const struct board_info *bi) | 640 | static int board_init(adapter_t *adapter, const struct board_info *bi) |
634 | { | 641 | { |
635 | switch (bi->board) { | 642 | switch (bi->board) { |
636 | case CHBT_BOARD_8000: | ||
637 | case CHBT_BOARD_N110: | 643 | case CHBT_BOARD_N110: |
638 | case CHBT_BOARD_N210: | 644 | case CHBT_BOARD_N210: |
639 | case CHBT_BOARD_CHT210: | 645 | writel(V_TPIPAR(0xf), adapter->regs + A_TPI_PAR); |
640 | case CHBT_BOARD_COUGAR: | ||
641 | t1_tpi_par(adapter, 0xf); | ||
642 | t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); | 646 | t1_tpi_write(adapter, A_ELMER0_GPO, 0x800); |
643 | break; | 647 | break; |
644 | case CHBT_BOARD_CHT110: | ||
645 | t1_tpi_par(adapter, 0xf); | ||
646 | t1_tpi_write(adapter, A_ELMER0_GPO, 0x1800); | ||
647 | |||
648 | /* TBD XXX Might not need. This fixes a problem | ||
649 | * described in the Intel SR XPAK errata. | ||
650 | */ | ||
651 | power_sequence_xpak(adapter); | ||
652 | break; | ||
653 | } | 648 | } |
654 | return 0; | 649 | return 0; |
655 | } | 650 | } |
@@ -663,20 +658,19 @@ int t1_init_hw_modules(adapter_t *adapter) | |||
663 | int err = -EIO; | 658 | int err = -EIO; |
664 | const struct board_info *bi = board_info(adapter); | 659 | const struct board_info *bi = board_info(adapter); |
665 | 660 | ||
666 | if (!adapter->mc4) { | 661 | if (!bi->clock_mc4) { |
667 | u32 val = t1_read_reg_4(adapter, A_MC4_CFG); | 662 | u32 val = readl(adapter->regs + A_MC4_CFG); |
668 | 663 | ||
669 | t1_write_reg_4(adapter, A_MC4_CFG, val | F_READY | F_MC4_SLOW); | 664 | writel(val | F_READY | F_MC4_SLOW, adapter->regs + A_MC4_CFG); |
670 | t1_write_reg_4(adapter, A_MC5_CONFIG, | 665 | writel(F_M_BUS_ENABLE | F_TCAM_RESET, |
671 | F_M_BUS_ENABLE | F_TCAM_RESET); | 666 | adapter->regs + A_MC5_CONFIG); |
672 | } | 667 | } |
673 | 668 | ||
674 | if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, | 669 | if (adapter->espi && t1_espi_init(adapter->espi, bi->chip_mac, |
675 | bi->espi_nports)) | 670 | bi->espi_nports)) |
676 | goto out_err; | 671 | goto out_err; |
677 | 672 | ||
678 | if (t1_tp_reset(adapter->tp, &adapter->params.tp, bi->clock_core)) | 673 | t1_tp_reset(adapter, bi->clock_core); |
679 | goto out_err; | ||
680 | 674 | ||
681 | err = t1_sge_configure(adapter->sge, &adapter->params.sge); | 675 | err = t1_sge_configure(adapter->sge, &adapter->params.sge); |
682 | if (err) | 676 | if (err) |
@@ -690,7 +684,7 @@ int t1_init_hw_modules(adapter_t *adapter) | |||
690 | /* | 684 | /* |
691 | * Determine a card's PCI mode. | 685 | * Determine a card's PCI mode. |
692 | */ | 686 | */ |
693 | static void __devinit get_pci_mode(adapter_t *adapter, struct pci_params *p) | 687 | static void __devinit get_pci_mode(adapter_t *adapter, struct chelsio_pci_params *p) |
694 | { | 688 | { |
695 | static unsigned short speed_map[] = { 33, 66, 100, 133 }; | 689 | static unsigned short speed_map[] = { 33, 66, 100, 133 }; |
696 | u32 pci_mode; | 690 | u32 pci_mode; |
@@ -720,8 +714,6 @@ void t1_free_sw_modules(adapter_t *adapter) | |||
720 | 714 | ||
721 | if (adapter->sge) | 715 | if (adapter->sge) |
722 | t1_sge_destroy(adapter->sge); | 716 | t1_sge_destroy(adapter->sge); |
723 | if (adapter->tp) | ||
724 | t1_tp_destroy(adapter->tp); | ||
725 | if (adapter->espi) | 717 | if (adapter->espi) |
726 | t1_espi_destroy(adapter->espi); | 718 | t1_espi_destroy(adapter->espi); |
727 | } | 719 | } |
@@ -764,21 +756,12 @@ int __devinit t1_init_sw_modules(adapter_t *adapter, | |||
764 | goto error; | 756 | goto error; |
765 | } | 757 | } |
766 | 758 | ||
767 | |||
768 | |||
769 | if (bi->espi_nports && !(adapter->espi = t1_espi_create(adapter))) { | 759 | if (bi->espi_nports && !(adapter->espi = t1_espi_create(adapter))) { |
770 | CH_ERR("%s: ESPI initialization failed\n", | 760 | CH_ERR("%s: ESPI initialization failed\n", |
771 | adapter->name); | 761 | adapter->name); |
772 | goto error; | 762 | goto error; |
773 | } | 763 | } |
774 | 764 | ||
775 | adapter->tp = t1_tp_create(adapter, &adapter->params.tp); | ||
776 | if (!adapter->tp) { | ||
777 | CH_ERR("%s: TP initialization failed\n", | ||
778 | adapter->name); | ||
779 | goto error; | ||
780 | } | ||
781 | |||
782 | board_init(adapter, bi); | 765 | board_init(adapter, bi); |
783 | bi->mdio_ops->init(adapter, bi); | 766 | bi->mdio_ops->init(adapter, bi); |
784 | if (bi->gphy->reset) | 767 | if (bi->gphy->reset) |
@@ -810,14 +793,12 @@ int __devinit t1_init_sw_modules(adapter_t *adapter, | |||
810 | * Get the port's MAC addresses either from the EEPROM if one | 793 | * Get the port's MAC addresses either from the EEPROM if one |
811 | * exists or the one hardcoded in the MAC. | 794 | * exists or the one hardcoded in the MAC. |
812 | */ | 795 | */ |
813 | if (!t1_is_asic(adapter) || bi->chip_mac == CHBT_MAC_DUMMY) | 796 | if (vpd_macaddress_get(adapter, i, hw_addr)) { |
814 | mac->ops->macaddress_get(mac, hw_addr); | ||
815 | else if (vpd_macaddress_get(adapter, i, hw_addr)) { | ||
816 | CH_ERR("%s: could not read MAC address from VPD ROM\n", | 797 | CH_ERR("%s: could not read MAC address from VPD ROM\n", |
817 | port_name(adapter, i)); | 798 | adapter->port[i].dev->name); |
818 | goto error; | 799 | goto error; |
819 | } | 800 | } |
820 | t1_set_hw_addr(adapter, i, hw_addr); | 801 | memcpy(adapter->port[i].dev->dev_addr, hw_addr, ETH_ALEN); |
821 | init_link_config(&adapter->port[i].link_config, bi); | 802 | init_link_config(&adapter->port[i].link_config, bi); |
822 | } | 803 | } |
823 | 804 | ||