diff options
author | Joe Perches <joe@perches.com> | 2010-02-22 11:56:57 -0500 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2010-02-26 04:38:34 -0500 |
commit | c1f51212eb809849bdc68a856ae5f424dcf20d9b (patch) | |
tree | 2a01f9e5201d3fc40527c24961b0f888f9e0ed61 /drivers/net/chelsio/pm3393.c | |
parent | 003bdb279bb6b212f25ea4e60e0164b6109d3704 (diff) |
drivers/net/chelsio: Use pr_<level>, netif_msg_<type>
Convert CH_<level> and CH_DBG uses to pr_<level> and netif equivalents
Remove CH_<level> and CH_DBG macro definitions
Signed-off-by: Joe Perches <joe@perches.com>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/chelsio/pm3393.c')
-rw-r--r-- | drivers/net/chelsio/pm3393.c | 16 |
1 files changed, 9 insertions, 7 deletions
diff --git a/drivers/net/chelsio/pm3393.c b/drivers/net/chelsio/pm3393.c index 33d674f36722..a6eb30a6e2b9 100644 --- a/drivers/net/chelsio/pm3393.c +++ b/drivers/net/chelsio/pm3393.c | |||
@@ -251,8 +251,9 @@ static int pm3393_interrupt_handler(struct cmac *cmac) | |||
251 | /* Read the master interrupt status register. */ | 251 | /* Read the master interrupt status register. */ |
252 | pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS, | 252 | pmread(cmac, SUNI1x10GEXP_REG_MASTER_INTERRUPT_STATUS, |
253 | &master_intr_status); | 253 | &master_intr_status); |
254 | CH_DBG(cmac->adapter, INTR, "PM3393 intr cause 0x%x\n", | 254 | if (netif_msg_intr(cmac->adapter)) |
255 | master_intr_status); | 255 | dev_dbg(&cmac->adapter->pdev->dev, "PM3393 intr cause 0x%x\n", |
256 | master_intr_status); | ||
256 | 257 | ||
257 | /* TBD XXX Lets just clear everything for now */ | 258 | /* TBD XXX Lets just clear everything for now */ |
258 | pm3393_interrupt_clear(cmac); | 259 | pm3393_interrupt_clear(cmac); |
@@ -776,11 +777,12 @@ static int pm3393_mac_reset(adapter_t * adapter) | |||
776 | successful_reset = (is_pl4_reset_finished && !is_pl4_outof_lock | 777 | successful_reset = (is_pl4_reset_finished && !is_pl4_outof_lock |
777 | && is_xaui_mabc_pll_locked); | 778 | && is_xaui_mabc_pll_locked); |
778 | 779 | ||
779 | CH_DBG(adapter, HW, | 780 | if (netif_msg_hw(adapter)) |
780 | "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, " | 781 | dev_dbg(&adapter->pdev->dev, |
781 | "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n", | 782 | "PM3393 HW reset %d: pl4_reset 0x%x, val 0x%x, " |
782 | i, is_pl4_reset_finished, val, is_pl4_outof_lock, | 783 | "is_pl4_outof_lock 0x%x, xaui_locked 0x%x\n", |
783 | is_xaui_mabc_pll_locked); | 784 | i, is_pl4_reset_finished, val, |
785 | is_pl4_outof_lock, is_xaui_mabc_pll_locked); | ||
784 | } | 786 | } |
785 | return successful_reset ? 0 : 1; | 787 | return successful_reset ? 0 : 1; |
786 | } | 788 | } |