chelsio: Use generic MDIO definitions and mdio_mii_ioctl()

Compile-tested only.

Signed-off-by: Ben Hutchings <bhutchings@solarflare.com>
Signed-off-by: David S. Miller <davem@davemloft.net>

1 files changed, 23 insertions, 22 deletions

diff --git a/drivers/net/chelsio/mv88x201x.c b/drivers/net/chelsio/mv88x201x.c
index cd856041af34..29e0cba48d53 100644
--- a/drivers/net/chelsio/mv88x201x.c
+++ b/drivers/net/chelsio/mv88x201x.c
@@ -53,7 +53,7 @@ static int led_init(struct cphy *cphy)
          * Writing these bits maps control to another
          * register. mmd(0x1) addr(0x7)
          */
-        mdio_write(cphy, 0x3, 0x8304, 0xdddd);
+        cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8304, 0xdddd);
         return 0;
 }
 
@@ -62,14 +62,14 @@ static int led_link(struct cphy *cphy, u32 do_enable)
         u32 led = 0;
 #define LINK_ENABLE_BIT 0x1
 
-        mdio_read(cphy, 0x1, 0x7, &led);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, &led);
 
         if (do_enable & LINK_ENABLE_BIT) {
                 led |= LINK_ENABLE_BIT;
-                mdio_write(cphy, 0x1, 0x7, led);
+                cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led);
         } else {
                 led &= ~LINK_ENABLE_BIT;
-                mdio_write(cphy, 0x1, 0x7, led);
+                cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, MDIO_CTRL2, led);
         }
         return 0;
 }
@@ -86,7 +86,7 @@ static int mv88x201x_reset(struct cphy *cphy, int wait)
 static int mv88x201x_interrupt_enable(struct cphy *cphy)
 {
         /* Enable PHY LASI interrupts. */
-        mdio_write(cphy, 0x1, 0x9002, 0x1);
+        cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, 0x9002, 0x1);
 
         /* Enable Marvell interrupts through Elmer0. */
         if (t1_is_asic(cphy->adapter)) {
@@ -102,7 +102,7 @@ static int mv88x201x_interrupt_enable(struct cphy *cphy)
 static int mv88x201x_interrupt_disable(struct cphy *cphy)
 {
         /* Disable PHY LASI interrupts. */
-        mdio_write(cphy, 0x1, 0x9002, 0x0);
+        cphy_mdio_write(cphy, MDIO_MMD_PMAPMD, 0x9002, 0x0);
 
         /* Disable Marvell interrupts through Elmer0. */
         if (t1_is_asic(cphy->adapter)) {
@@ -122,25 +122,25 @@ static int mv88x201x_interrupt_clear(struct cphy *cphy)
 
 #ifdef MV88x2010_LINK_STATUS_BUGS
         /* Required to read twice before clear takes affect. */
-        mdio_read(cphy, 0x1, 0x9003, &val);
-        mdio_read(cphy, 0x1, 0x9004, &val);
-        mdio_read(cphy, 0x1, 0x9005, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9003, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9004, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9005, &val);
 
         /* Read this register after the others above it else
          * the register doesn't clear correctly.
          */
-        mdio_read(cphy, 0x1, 0x1, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
 #endif
 
         /* Clear link status. */
-        mdio_read(cphy, 0x1, 0x1, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
         /* Clear PHY LASI interrupts. */
-        mdio_read(cphy, 0x1, 0x9005, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9005, &val);
 
 #ifdef MV88x2010_LINK_STATUS_BUGS
         /* Do it again. */
-        mdio_read(cphy, 0x1, 0x9003, &val);
-        mdio_read(cphy, 0x1, 0x9004, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9003, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, 0x9004, &val);
 #endif
 
         /* Clear Marvell interrupts through Elmer0. */
@@ -172,13 +172,12 @@ static int mv88x201x_get_link_status(struct cphy *cphy, int *link_ok,
                                      int *speed, int *duplex, int *fc)
 {
         u32 val = 0;
-#define LINK_STATUS_BIT 0x4
 
         if (link_ok) {
                 /* Read link status. */
-                mdio_read(cphy, 0x1, 0x1, &val);
-                val &= LINK_STATUS_BIT;
-                *link_ok = (val == LINK_STATUS_BIT);
+                cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT1, &val);
+                val &= MDIO_STAT1_LSTATUS;
+                *link_ok = (val == MDIO_STAT1_LSTATUS);
                 /* Turn on/off Link LED */
                 led_link(cphy, *link_ok);
         }
@@ -205,6 +204,8 @@ static struct cphy_ops mv88x201x_ops = {
         .interrupt_handler = mv88x201x_interrupt_handler,
         .get_link_status   = mv88x201x_get_link_status,
         .set_loopback      = mv88x201x_set_loopback,
+        .mmds              = (MDIO_DEVS_PMAPMD | MDIO_DEVS_PCS |
+                              MDIO_DEVS_PHYXS | MDIO_DEVS_WIS),
 };
 
 static struct cphy *mv88x201x_phy_create(adapter_t *adapter, int phy_addr,
@@ -219,12 +220,12 @@ static struct cphy *mv88x201x_phy_create(adapter_t *adapter, int phy_addr,
         cphy_init(cphy, adapter, phy_addr, &mv88x201x_ops, mdio_ops);
 
         /* Commands the PHY to enable XFP's clock. */
-        mdio_read(cphy, 0x3, 0x8300, &val);
-        mdio_write(cphy, 0x3, 0x8300, val | 1);
+        cphy_mdio_read(cphy, MDIO_MMD_PCS, 0x8300, &val);
+        cphy_mdio_write(cphy, MDIO_MMD_PCS, 0x8300, val | 1);
 
         /* Clear link status. Required because of a bug in the PHY.  */
-        mdio_read(cphy, 0x1, 0x8, &val);
-        mdio_read(cphy, 0x3, 0x8, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PMAPMD, MDIO_STAT2, &val);
+        cphy_mdio_read(cphy, MDIO_MMD_PCS, MDIO_STAT2, &val);
 
         /* Allows for Link,Ack LED turn on/off */
         led_init(cphy);