Merge branch 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6

* 'upstream-linus' of master.kernel.org:/pub/scm/linux/kernel/git/jgarzik/netdev-2.6: (116 commits)
  sk98lin: planned removal
  AT91: MACB support
  sky2: version 1.12
  sky2: add new chip ids
  sky2: Yukon Extreme support
  sky2: safer transmit timeout
  sky2: TSO support for EC_U
  sky2: use dev_err for error reports
  sky2: add Wake On Lan support
  fix unaligned exception in /drivers/net/wireless/orinoco.c
  Remove unused kernel config option DLCI_COUNT
  z85230: spinlock logic
  mips: declance: Driver model for the PMAD-A
  Spidernet: Rework RX linked list
  NET: turn local_save_flags() + local_irq_disable() into local_irq_save()
  NET-3c59x: turn local_save_flags() + local_irq_disable() into local_irq_save()
  hp100: convert pci_module_init() to pci_register_driver()
  NetXen: Added ethtool support for user level tools.
  NetXen: Firmware crb init changes.
  maintainers: add atl1 maintainers
  ...

1 files changed, 20 insertions, 20 deletions

diff --git a/drivers/net/chelsio/elmer0.h b/drivers/net/chelsio/elmer0.h
index 9ebecaa97d31..eef655c827d9 100644
--- a/drivers/net/chelsio/elmer0.h
+++ b/drivers/net/chelsio/elmer0.h
@@ -46,14 +46,14 @@ enum {
 };
 
 /* ELMER0 registers */
-#define A_ELMER0_VERSION 0x100000
-#define A_ELMER0_PHY_CFG 0x100004
-#define A_ELMER0_INT_ENABLE 0x100008
-#define A_ELMER0_INT_CAUSE 0x10000c
-#define A_ELMER0_GPI_CFG 0x100010
-#define A_ELMER0_GPI_STAT 0x100014
-#define A_ELMER0_GPO 0x100018
-#define A_ELMER0_PORT0_MI1_CFG 0x400000
+#define A_ELMER0_VERSION        0x100000
+#define A_ELMER0_PHY_CFG        0x100004
+#define A_ELMER0_INT_ENABLE     0x100008
+#define A_ELMER0_INT_CAUSE      0x10000c
+#define A_ELMER0_GPI_CFG        0x100010
+#define A_ELMER0_GPI_STAT       0x100014
+#define A_ELMER0_GPO            0x100018
+#define A_ELMER0_PORT0_MI1_CFG  0x400000
 
 #define S_MI1_MDI_ENABLE    0
 #define V_MI1_MDI_ENABLE(x) ((x) << S_MI1_MDI_ENABLE)
@@ -111,18 +111,18 @@ enum {
 #define V_MI1_OP_BUSY(x) ((x) << S_MI1_OP_BUSY)
 #define F_MI1_OP_BUSY    V_MI1_OP_BUSY(1U)
 
-#define A_ELMER0_PORT1_MI1_CFG 0x500000
-#define A_ELMER0_PORT1_MI1_ADDR 0x500004
-#define A_ELMER0_PORT1_MI1_DATA 0x500008
-#define A_ELMER0_PORT1_MI1_OP 0x50000c
-#define A_ELMER0_PORT2_MI1_CFG 0x600000
-#define A_ELMER0_PORT2_MI1_ADDR 0x600004
-#define A_ELMER0_PORT2_MI1_DATA 0x600008
-#define A_ELMER0_PORT2_MI1_OP 0x60000c
-#define A_ELMER0_PORT3_MI1_CFG 0x700000
-#define A_ELMER0_PORT3_MI1_ADDR 0x700004
-#define A_ELMER0_PORT3_MI1_DATA 0x700008
-#define A_ELMER0_PORT3_MI1_OP 0x70000c
+#define A_ELMER0_PORT1_MI1_CFG  0x500000
+#define A_ELMER0_PORT1_MI1_ADDR 0x500004
+#define A_ELMER0_PORT1_MI1_DATA 0x500008
+#define A_ELMER0_PORT1_MI1_OP   0x50000c
+#define A_ELMER0_PORT2_MI1_CFG  0x600000
+#define A_ELMER0_PORT2_MI1_ADDR 0x600004
+#define A_ELMER0_PORT2_MI1_DATA 0x600008
+#define A_ELMER0_PORT2_MI1_OP   0x60000c
+#define A_ELMER0_PORT3_MI1_CFG  0x700000
+#define A_ELMER0_PORT3_MI1_ADDR 0x700004
+#define A_ELMER0_PORT3_MI1_DATA 0x700008
+#define A_ELMER0_PORT3_MI1_OP   0x70000c
 
 /* Simple bit definition for GPI and GP0 registers. */
 #define     ELMER0_GP_BIT0              0x0001