diff options
author | Linus Torvalds <torvalds@linux-foundation.org> | 2011-10-25 07:25:22 -0400 |
---|---|---|
committer | Linus Torvalds <torvalds@linux-foundation.org> | 2011-10-25 07:25:22 -0400 |
commit | 8a9ea3237e7eb5c25f09e429ad242ae5a3d5ea22 (patch) | |
tree | a0a63398a9983667d52cbbbf4e2405b4f22b1d83 /drivers/net/can | |
parent | 1be025d3cb40cd295123af2c394f7229ef9b30ca (diff) | |
parent | 8b3408f8ee994973869d8ba32c5bf482bc4ddca4 (diff) |
Merge git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next
* git://git.kernel.org/pub/scm/linux/kernel/git/davem/net-next: (1745 commits)
dp83640: free packet queues on remove
dp83640: use proper function to free transmit time stamping packets
ipv6: Do not use routes from locally generated RAs
|PATCH net-next] tg3: add tx_dropped counter
be2net: don't create multiple RX/TX rings in multi channel mode
be2net: don't create multiple TXQs in BE2
be2net: refactor VF setup/teardown code into be_vf_setup/clear()
be2net: add vlan/rx-mode/flow-control config to be_setup()
net_sched: cls_flow: use skb_header_pointer()
ipv4: avoid useless call of the function check_peer_pmtu
TCP: remove TCP_DEBUG
net: Fix driver name for mdio-gpio.c
ipv4: tcp: fix TOS value in ACK messages sent from TIME_WAIT
rtnetlink: Add missing manual netlink notification in dev_change_net_namespaces
ipv4: fix ipsec forward performance regression
jme: fix irq storm after suspend/resume
route: fix ICMP redirect validation
net: hold sock reference while processing tx timestamps
tcp: md5: add more const attributes
Add ethtool -g support to virtio_net
...
Fix up conflicts in:
- drivers/net/Kconfig:
The split-up generated a trivial conflict with removal of a
stale reference to Documentation/networking/net-modules.txt.
Remove it from the new location instead.
- fs/sysfs/dir.c:
Fairly nasty conflicts with the sysfs rb-tree usage, conflicting
with Eric Biederman's changes for tagged directories.
Diffstat (limited to 'drivers/net/can')
-rw-r--r-- | drivers/net/can/at91_can.c | 2 | ||||
-rw-r--r-- | drivers/net/can/dev.c | 14 | ||||
-rw-r--r-- | drivers/net/can/flexcan.c | 189 | ||||
-rw-r--r-- | drivers/net/can/mscan/mscan.c | 26 | ||||
-rw-r--r-- | drivers/net/can/sja1000/Kconfig | 14 | ||||
-rw-r--r-- | drivers/net/can/sja1000/Makefile | 2 | ||||
-rw-r--r-- | drivers/net/can/sja1000/ems_pcmcia.c | 331 | ||||
-rw-r--r-- | drivers/net/can/sja1000/peak_pci.c | 291 | ||||
-rw-r--r-- | drivers/net/can/sja1000/sja1000.c | 2 | ||||
-rw-r--r-- | drivers/net/can/sja1000/sja1000.h | 2 | ||||
-rw-r--r-- | drivers/net/can/slcan.c | 2 | ||||
-rw-r--r-- | drivers/net/can/vcan.c | 2 |
12 files changed, 784 insertions, 93 deletions
diff --git a/drivers/net/can/at91_can.c b/drivers/net/can/at91_can.c index 121ede663e20..044ea0647b04 100644 --- a/drivers/net/can/at91_can.c +++ b/drivers/net/can/at91_can.c | |||
@@ -8,8 +8,6 @@ | |||
8 | * Public License ("GPL") version 2 as distributed in the 'COPYING' | 8 | * Public License ("GPL") version 2 as distributed in the 'COPYING' |
9 | * file from the main directory of the linux kernel source. | 9 | * file from the main directory of the linux kernel source. |
10 | * | 10 | * |
11 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
12 | * | ||
13 | * | 11 | * |
14 | * Your platform definition file should specify something like: | 12 | * Your platform definition file should specify something like: |
15 | * | 13 | * |
diff --git a/drivers/net/can/dev.c b/drivers/net/can/dev.c index 9bf1116e5b5e..25695bde0549 100644 --- a/drivers/net/can/dev.c +++ b/drivers/net/can/dev.c | |||
@@ -150,7 +150,19 @@ static int can_calc_bittiming(struct net_device *dev, struct can_bittiming *bt) | |||
150 | bt->prop_seg = tseg1 / 2; | 150 | bt->prop_seg = tseg1 / 2; |
151 | bt->phase_seg1 = tseg1 - bt->prop_seg; | 151 | bt->phase_seg1 = tseg1 - bt->prop_seg; |
152 | bt->phase_seg2 = tseg2; | 152 | bt->phase_seg2 = tseg2; |
153 | bt->sjw = 1; | 153 | |
154 | /* check for sjw user settings */ | ||
155 | if (!bt->sjw || !btc->sjw_max) | ||
156 | bt->sjw = 1; | ||
157 | else { | ||
158 | /* bt->sjw is at least 1 -> sanitize upper bound to sjw_max */ | ||
159 | if (bt->sjw > btc->sjw_max) | ||
160 | bt->sjw = btc->sjw_max; | ||
161 | /* bt->sjw must not be higher than tseg2 */ | ||
162 | if (tseg2 < bt->sjw) | ||
163 | bt->sjw = tseg2; | ||
164 | } | ||
165 | |||
154 | bt->brp = best_brp; | 166 | bt->brp = best_brp; |
155 | /* real bit-rate */ | 167 | /* real bit-rate */ |
156 | bt->bitrate = priv->clock.freq / (bt->brp * (tseg1 + tseg2 + 1)); | 168 | bt->bitrate = priv->clock.freq / (bt->brp * (tseg1 + tseg2 + 1)); |
diff --git a/drivers/net/can/flexcan.c b/drivers/net/can/flexcan.c index 17678117ed69..e02337953f41 100644 --- a/drivers/net/can/flexcan.c +++ b/drivers/net/can/flexcan.c | |||
@@ -33,10 +33,9 @@ | |||
33 | #include <linux/kernel.h> | 33 | #include <linux/kernel.h> |
34 | #include <linux/list.h> | 34 | #include <linux/list.h> |
35 | #include <linux/module.h> | 35 | #include <linux/module.h> |
36 | #include <linux/of.h> | ||
36 | #include <linux/platform_device.h> | 37 | #include <linux/platform_device.h> |
37 | 38 | ||
38 | #include <mach/clock.h> | ||
39 | |||
40 | #define DRV_NAME "flexcan" | 39 | #define DRV_NAME "flexcan" |
41 | 40 | ||
42 | /* 8 for RX fifo and 2 error handling */ | 41 | /* 8 for RX fifo and 2 error handling */ |
@@ -192,6 +191,31 @@ static struct can_bittiming_const flexcan_bittiming_const = { | |||
192 | }; | 191 | }; |
193 | 192 | ||
194 | /* | 193 | /* |
194 | * Abstract off the read/write for arm versus ppc. | ||
195 | */ | ||
196 | #if defined(__BIG_ENDIAN) | ||
197 | static inline u32 flexcan_read(void __iomem *addr) | ||
198 | { | ||
199 | return in_be32(addr); | ||
200 | } | ||
201 | |||
202 | static inline void flexcan_write(u32 val, void __iomem *addr) | ||
203 | { | ||
204 | out_be32(addr, val); | ||
205 | } | ||
206 | #else | ||
207 | static inline u32 flexcan_read(void __iomem *addr) | ||
208 | { | ||
209 | return readl(addr); | ||
210 | } | ||
211 | |||
212 | static inline void flexcan_write(u32 val, void __iomem *addr) | ||
213 | { | ||
214 | writel(val, addr); | ||
215 | } | ||
216 | #endif | ||
217 | |||
218 | /* | ||
195 | * Swtich transceiver on or off | 219 | * Swtich transceiver on or off |
196 | */ | 220 | */ |
197 | static void flexcan_transceiver_switch(const struct flexcan_priv *priv, int on) | 221 | static void flexcan_transceiver_switch(const struct flexcan_priv *priv, int on) |
@@ -212,9 +236,9 @@ static inline void flexcan_chip_enable(struct flexcan_priv *priv) | |||
212 | struct flexcan_regs __iomem *regs = priv->base; | 236 | struct flexcan_regs __iomem *regs = priv->base; |
213 | u32 reg; | 237 | u32 reg; |
214 | 238 | ||
215 | reg = readl(®s->mcr); | 239 | reg = flexcan_read(®s->mcr); |
216 | reg &= ~FLEXCAN_MCR_MDIS; | 240 | reg &= ~FLEXCAN_MCR_MDIS; |
217 | writel(reg, ®s->mcr); | 241 | flexcan_write(reg, ®s->mcr); |
218 | 242 | ||
219 | udelay(10); | 243 | udelay(10); |
220 | } | 244 | } |
@@ -224,9 +248,9 @@ static inline void flexcan_chip_disable(struct flexcan_priv *priv) | |||
224 | struct flexcan_regs __iomem *regs = priv->base; | 248 | struct flexcan_regs __iomem *regs = priv->base; |
225 | u32 reg; | 249 | u32 reg; |
226 | 250 | ||
227 | reg = readl(®s->mcr); | 251 | reg = flexcan_read(®s->mcr); |
228 | reg |= FLEXCAN_MCR_MDIS; | 252 | reg |= FLEXCAN_MCR_MDIS; |
229 | writel(reg, ®s->mcr); | 253 | flexcan_write(reg, ®s->mcr); |
230 | } | 254 | } |
231 | 255 | ||
232 | static int flexcan_get_berr_counter(const struct net_device *dev, | 256 | static int flexcan_get_berr_counter(const struct net_device *dev, |
@@ -234,7 +258,7 @@ static int flexcan_get_berr_counter(const struct net_device *dev, | |||
234 | { | 258 | { |
235 | const struct flexcan_priv *priv = netdev_priv(dev); | 259 | const struct flexcan_priv *priv = netdev_priv(dev); |
236 | struct flexcan_regs __iomem *regs = priv->base; | 260 | struct flexcan_regs __iomem *regs = priv->base; |
237 | u32 reg = readl(®s->ecr); | 261 | u32 reg = flexcan_read(®s->ecr); |
238 | 262 | ||
239 | bec->txerr = (reg >> 0) & 0xff; | 263 | bec->txerr = (reg >> 0) & 0xff; |
240 | bec->rxerr = (reg >> 8) & 0xff; | 264 | bec->rxerr = (reg >> 8) & 0xff; |
@@ -268,15 +292,15 @@ static int flexcan_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
268 | 292 | ||
269 | if (cf->can_dlc > 0) { | 293 | if (cf->can_dlc > 0) { |
270 | u32 data = be32_to_cpup((__be32 *)&cf->data[0]); | 294 | u32 data = be32_to_cpup((__be32 *)&cf->data[0]); |
271 | writel(data, ®s->cantxfg[FLEXCAN_TX_BUF_ID].data[0]); | 295 | flexcan_write(data, ®s->cantxfg[FLEXCAN_TX_BUF_ID].data[0]); |
272 | } | 296 | } |
273 | if (cf->can_dlc > 3) { | 297 | if (cf->can_dlc > 3) { |
274 | u32 data = be32_to_cpup((__be32 *)&cf->data[4]); | 298 | u32 data = be32_to_cpup((__be32 *)&cf->data[4]); |
275 | writel(data, ®s->cantxfg[FLEXCAN_TX_BUF_ID].data[1]); | 299 | flexcan_write(data, ®s->cantxfg[FLEXCAN_TX_BUF_ID].data[1]); |
276 | } | 300 | } |
277 | 301 | ||
278 | writel(can_id, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_id); | 302 | flexcan_write(can_id, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_id); |
279 | writel(ctrl, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); | 303 | flexcan_write(ctrl, ®s->cantxfg[FLEXCAN_TX_BUF_ID].can_ctrl); |
280 | 304 | ||
281 | kfree_skb(skb); | 305 | kfree_skb(skb); |
282 | 306 | ||
@@ -464,8 +488,8 @@ static void flexcan_read_fifo(const struct net_device *dev, | |||
464 | struct flexcan_mb __iomem *mb = ®s->cantxfg[0]; | 488 | struct flexcan_mb __iomem *mb = ®s->cantxfg[0]; |
465 | u32 reg_ctrl, reg_id; | 489 | u32 reg_ctrl, reg_id; |
466 | 490 | ||
467 | reg_ctrl = readl(&mb->can_ctrl); | 491 | reg_ctrl = flexcan_read(&mb->can_ctrl); |
468 | reg_id = readl(&mb->can_id); | 492 | reg_id = flexcan_read(&mb->can_id); |
469 | if (reg_ctrl & FLEXCAN_MB_CNT_IDE) | 493 | if (reg_ctrl & FLEXCAN_MB_CNT_IDE) |
470 | cf->can_id = ((reg_id >> 0) & CAN_EFF_MASK) | CAN_EFF_FLAG; | 494 | cf->can_id = ((reg_id >> 0) & CAN_EFF_MASK) | CAN_EFF_FLAG; |
471 | else | 495 | else |
@@ -475,12 +499,12 @@ static void flexcan_read_fifo(const struct net_device *dev, | |||
475 | cf->can_id |= CAN_RTR_FLAG; | 499 | cf->can_id |= CAN_RTR_FLAG; |
476 | cf->can_dlc = get_can_dlc((reg_ctrl >> 16) & 0xf); | 500 | cf->can_dlc = get_can_dlc((reg_ctrl >> 16) & 0xf); |
477 | 501 | ||
478 | *(__be32 *)(cf->data + 0) = cpu_to_be32(readl(&mb->data[0])); | 502 | *(__be32 *)(cf->data + 0) = cpu_to_be32(flexcan_read(&mb->data[0])); |
479 | *(__be32 *)(cf->data + 4) = cpu_to_be32(readl(&mb->data[1])); | 503 | *(__be32 *)(cf->data + 4) = cpu_to_be32(flexcan_read(&mb->data[1])); |
480 | 504 | ||
481 | /* mark as read */ | 505 | /* mark as read */ |
482 | writel(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, ®s->iflag1); | 506 | flexcan_write(FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, ®s->iflag1); |
483 | readl(®s->timer); | 507 | flexcan_read(®s->timer); |
484 | } | 508 | } |
485 | 509 | ||
486 | static int flexcan_read_frame(struct net_device *dev) | 510 | static int flexcan_read_frame(struct net_device *dev) |
@@ -516,17 +540,17 @@ static int flexcan_poll(struct napi_struct *napi, int quota) | |||
516 | * The error bits are cleared on read, | 540 | * The error bits are cleared on read, |
517 | * use saved value from irq handler. | 541 | * use saved value from irq handler. |
518 | */ | 542 | */ |
519 | reg_esr = readl(®s->esr) | priv->reg_esr; | 543 | reg_esr = flexcan_read(®s->esr) | priv->reg_esr; |
520 | 544 | ||
521 | /* handle state changes */ | 545 | /* handle state changes */ |
522 | work_done += flexcan_poll_state(dev, reg_esr); | 546 | work_done += flexcan_poll_state(dev, reg_esr); |
523 | 547 | ||
524 | /* handle RX-FIFO */ | 548 | /* handle RX-FIFO */ |
525 | reg_iflag1 = readl(®s->iflag1); | 549 | reg_iflag1 = flexcan_read(®s->iflag1); |
526 | while (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE && | 550 | while (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_AVAILABLE && |
527 | work_done < quota) { | 551 | work_done < quota) { |
528 | work_done += flexcan_read_frame(dev); | 552 | work_done += flexcan_read_frame(dev); |
529 | reg_iflag1 = readl(®s->iflag1); | 553 | reg_iflag1 = flexcan_read(®s->iflag1); |
530 | } | 554 | } |
531 | 555 | ||
532 | /* report bus errors */ | 556 | /* report bus errors */ |
@@ -536,8 +560,8 @@ static int flexcan_poll(struct napi_struct *napi, int quota) | |||
536 | if (work_done < quota) { | 560 | if (work_done < quota) { |
537 | napi_complete(napi); | 561 | napi_complete(napi); |
538 | /* enable IRQs */ | 562 | /* enable IRQs */ |
539 | writel(FLEXCAN_IFLAG_DEFAULT, ®s->imask1); | 563 | flexcan_write(FLEXCAN_IFLAG_DEFAULT, ®s->imask1); |
540 | writel(priv->reg_ctrl_default, ®s->ctrl); | 564 | flexcan_write(priv->reg_ctrl_default, ®s->ctrl); |
541 | } | 565 | } |
542 | 566 | ||
543 | return work_done; | 567 | return work_done; |
@@ -551,9 +575,9 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id) | |||
551 | struct flexcan_regs __iomem *regs = priv->base; | 575 | struct flexcan_regs __iomem *regs = priv->base; |
552 | u32 reg_iflag1, reg_esr; | 576 | u32 reg_iflag1, reg_esr; |
553 | 577 | ||
554 | reg_iflag1 = readl(®s->iflag1); | 578 | reg_iflag1 = flexcan_read(®s->iflag1); |
555 | reg_esr = readl(®s->esr); | 579 | reg_esr = flexcan_read(®s->esr); |
556 | writel(FLEXCAN_ESR_ERR_INT, ®s->esr); /* ACK err IRQ */ | 580 | flexcan_write(FLEXCAN_ESR_ERR_INT, ®s->esr); /* ACK err IRQ */ |
557 | 581 | ||
558 | /* | 582 | /* |
559 | * schedule NAPI in case of: | 583 | * schedule NAPI in case of: |
@@ -569,16 +593,16 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id) | |||
569 | * save them for later use. | 593 | * save them for later use. |
570 | */ | 594 | */ |
571 | priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS; | 595 | priv->reg_esr = reg_esr & FLEXCAN_ESR_ERR_BUS; |
572 | writel(FLEXCAN_IFLAG_DEFAULT & ~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, | 596 | flexcan_write(FLEXCAN_IFLAG_DEFAULT & |
573 | ®s->imask1); | 597 | ~FLEXCAN_IFLAG_RX_FIFO_AVAILABLE, ®s->imask1); |
574 | writel(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL, | 598 | flexcan_write(priv->reg_ctrl_default & ~FLEXCAN_CTRL_ERR_ALL, |
575 | ®s->ctrl); | 599 | ®s->ctrl); |
576 | napi_schedule(&priv->napi); | 600 | napi_schedule(&priv->napi); |
577 | } | 601 | } |
578 | 602 | ||
579 | /* FIFO overflow */ | 603 | /* FIFO overflow */ |
580 | if (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) { | 604 | if (reg_iflag1 & FLEXCAN_IFLAG_RX_FIFO_OVERFLOW) { |
581 | writel(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, ®s->iflag1); | 605 | flexcan_write(FLEXCAN_IFLAG_RX_FIFO_OVERFLOW, ®s->iflag1); |
582 | dev->stats.rx_over_errors++; | 606 | dev->stats.rx_over_errors++; |
583 | dev->stats.rx_errors++; | 607 | dev->stats.rx_errors++; |
584 | } | 608 | } |
@@ -587,7 +611,7 @@ static irqreturn_t flexcan_irq(int irq, void *dev_id) | |||
587 | if (reg_iflag1 & (1 << FLEXCAN_TX_BUF_ID)) { | 611 | if (reg_iflag1 & (1 << FLEXCAN_TX_BUF_ID)) { |
588 | /* tx_bytes is incremented in flexcan_start_xmit */ | 612 | /* tx_bytes is incremented in flexcan_start_xmit */ |
589 | stats->tx_packets++; | 613 | stats->tx_packets++; |
590 | writel((1 << FLEXCAN_TX_BUF_ID), ®s->iflag1); | 614 | flexcan_write((1 << FLEXCAN_TX_BUF_ID), ®s->iflag1); |
591 | netif_wake_queue(dev); | 615 | netif_wake_queue(dev); |
592 | } | 616 | } |
593 | 617 | ||
@@ -601,7 +625,7 @@ static void flexcan_set_bittiming(struct net_device *dev) | |||
601 | struct flexcan_regs __iomem *regs = priv->base; | 625 | struct flexcan_regs __iomem *regs = priv->base; |
602 | u32 reg; | 626 | u32 reg; |
603 | 627 | ||
604 | reg = readl(®s->ctrl); | 628 | reg = flexcan_read(®s->ctrl); |
605 | reg &= ~(FLEXCAN_CTRL_PRESDIV(0xff) | | 629 | reg &= ~(FLEXCAN_CTRL_PRESDIV(0xff) | |
606 | FLEXCAN_CTRL_RJW(0x3) | | 630 | FLEXCAN_CTRL_RJW(0x3) | |
607 | FLEXCAN_CTRL_PSEG1(0x7) | | 631 | FLEXCAN_CTRL_PSEG1(0x7) | |
@@ -625,11 +649,11 @@ static void flexcan_set_bittiming(struct net_device *dev) | |||
625 | reg |= FLEXCAN_CTRL_SMP; | 649 | reg |= FLEXCAN_CTRL_SMP; |
626 | 650 | ||
627 | dev_info(dev->dev.parent, "writing ctrl=0x%08x\n", reg); | 651 | dev_info(dev->dev.parent, "writing ctrl=0x%08x\n", reg); |
628 | writel(reg, ®s->ctrl); | 652 | flexcan_write(reg, ®s->ctrl); |
629 | 653 | ||
630 | /* print chip status */ | 654 | /* print chip status */ |
631 | dev_dbg(dev->dev.parent, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__, | 655 | dev_dbg(dev->dev.parent, "%s: mcr=0x%08x ctrl=0x%08x\n", __func__, |
632 | readl(®s->mcr), readl(®s->ctrl)); | 656 | flexcan_read(®s->mcr), flexcan_read(®s->ctrl)); |
633 | } | 657 | } |
634 | 658 | ||
635 | /* | 659 | /* |
@@ -650,10 +674,10 @@ static int flexcan_chip_start(struct net_device *dev) | |||
650 | flexcan_chip_enable(priv); | 674 | flexcan_chip_enable(priv); |
651 | 675 | ||
652 | /* soft reset */ | 676 | /* soft reset */ |
653 | writel(FLEXCAN_MCR_SOFTRST, ®s->mcr); | 677 | flexcan_write(FLEXCAN_MCR_SOFTRST, ®s->mcr); |
654 | udelay(10); | 678 | udelay(10); |
655 | 679 | ||
656 | reg_mcr = readl(®s->mcr); | 680 | reg_mcr = flexcan_read(®s->mcr); |
657 | if (reg_mcr & FLEXCAN_MCR_SOFTRST) { | 681 | if (reg_mcr & FLEXCAN_MCR_SOFTRST) { |
658 | dev_err(dev->dev.parent, | 682 | dev_err(dev->dev.parent, |
659 | "Failed to softreset can module (mcr=0x%08x)\n", | 683 | "Failed to softreset can module (mcr=0x%08x)\n", |
@@ -675,12 +699,12 @@ static int flexcan_chip_start(struct net_device *dev) | |||
675 | * choose format C | 699 | * choose format C |
676 | * | 700 | * |
677 | */ | 701 | */ |
678 | reg_mcr = readl(®s->mcr); | 702 | reg_mcr = flexcan_read(®s->mcr); |
679 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | | 703 | reg_mcr |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_FEN | FLEXCAN_MCR_HALT | |
680 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | | 704 | FLEXCAN_MCR_SUPV | FLEXCAN_MCR_WRN_EN | |
681 | FLEXCAN_MCR_IDAM_C; | 705 | FLEXCAN_MCR_IDAM_C; |
682 | dev_dbg(dev->dev.parent, "%s: writing mcr=0x%08x", __func__, reg_mcr); | 706 | dev_dbg(dev->dev.parent, "%s: writing mcr=0x%08x", __func__, reg_mcr); |
683 | writel(reg_mcr, ®s->mcr); | 707 | flexcan_write(reg_mcr, ®s->mcr); |
684 | 708 | ||
685 | /* | 709 | /* |
686 | * CTRL | 710 | * CTRL |
@@ -698,7 +722,7 @@ static int flexcan_chip_start(struct net_device *dev) | |||
698 | * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any | 722 | * (FLEXCAN_CTRL_ERR_MSK), too. Otherwise we don't get any |
699 | * warning or bus passive interrupts. | 723 | * warning or bus passive interrupts. |
700 | */ | 724 | */ |
701 | reg_ctrl = readl(®s->ctrl); | 725 | reg_ctrl = flexcan_read(®s->ctrl); |
702 | reg_ctrl &= ~FLEXCAN_CTRL_TSYN; | 726 | reg_ctrl &= ~FLEXCAN_CTRL_TSYN; |
703 | reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF | | 727 | reg_ctrl |= FLEXCAN_CTRL_BOFF_REC | FLEXCAN_CTRL_LBUF | |
704 | FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK; | 728 | FLEXCAN_CTRL_ERR_STATE | FLEXCAN_CTRL_ERR_MSK; |
@@ -706,38 +730,39 @@ static int flexcan_chip_start(struct net_device *dev) | |||
706 | /* save for later use */ | 730 | /* save for later use */ |
707 | priv->reg_ctrl_default = reg_ctrl; | 731 | priv->reg_ctrl_default = reg_ctrl; |
708 | dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); | 732 | dev_dbg(dev->dev.parent, "%s: writing ctrl=0x%08x", __func__, reg_ctrl); |
709 | writel(reg_ctrl, ®s->ctrl); | 733 | flexcan_write(reg_ctrl, ®s->ctrl); |
710 | 734 | ||
711 | for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) { | 735 | for (i = 0; i < ARRAY_SIZE(regs->cantxfg); i++) { |
712 | writel(0, ®s->cantxfg[i].can_ctrl); | 736 | flexcan_write(0, ®s->cantxfg[i].can_ctrl); |
713 | writel(0, ®s->cantxfg[i].can_id); | 737 | flexcan_write(0, ®s->cantxfg[i].can_id); |
714 | writel(0, ®s->cantxfg[i].data[0]); | 738 | flexcan_write(0, ®s->cantxfg[i].data[0]); |
715 | writel(0, ®s->cantxfg[i].data[1]); | 739 | flexcan_write(0, ®s->cantxfg[i].data[1]); |
716 | 740 | ||
717 | /* put MB into rx queue */ | 741 | /* put MB into rx queue */ |
718 | writel(FLEXCAN_MB_CNT_CODE(0x4), ®s->cantxfg[i].can_ctrl); | 742 | flexcan_write(FLEXCAN_MB_CNT_CODE(0x4), |
743 | ®s->cantxfg[i].can_ctrl); | ||
719 | } | 744 | } |
720 | 745 | ||
721 | /* acceptance mask/acceptance code (accept everything) */ | 746 | /* acceptance mask/acceptance code (accept everything) */ |
722 | writel(0x0, ®s->rxgmask); | 747 | flexcan_write(0x0, ®s->rxgmask); |
723 | writel(0x0, ®s->rx14mask); | 748 | flexcan_write(0x0, ®s->rx14mask); |
724 | writel(0x0, ®s->rx15mask); | 749 | flexcan_write(0x0, ®s->rx15mask); |
725 | 750 | ||
726 | flexcan_transceiver_switch(priv, 1); | 751 | flexcan_transceiver_switch(priv, 1); |
727 | 752 | ||
728 | /* synchronize with the can bus */ | 753 | /* synchronize with the can bus */ |
729 | reg_mcr = readl(®s->mcr); | 754 | reg_mcr = flexcan_read(®s->mcr); |
730 | reg_mcr &= ~FLEXCAN_MCR_HALT; | 755 | reg_mcr &= ~FLEXCAN_MCR_HALT; |
731 | writel(reg_mcr, ®s->mcr); | 756 | flexcan_write(reg_mcr, ®s->mcr); |
732 | 757 | ||
733 | priv->can.state = CAN_STATE_ERROR_ACTIVE; | 758 | priv->can.state = CAN_STATE_ERROR_ACTIVE; |
734 | 759 | ||
735 | /* enable FIFO interrupts */ | 760 | /* enable FIFO interrupts */ |
736 | writel(FLEXCAN_IFLAG_DEFAULT, ®s->imask1); | 761 | flexcan_write(FLEXCAN_IFLAG_DEFAULT, ®s->imask1); |
737 | 762 | ||
738 | /* print chip status */ | 763 | /* print chip status */ |
739 | dev_dbg(dev->dev.parent, "%s: reading mcr=0x%08x ctrl=0x%08x\n", | 764 | dev_dbg(dev->dev.parent, "%s: reading mcr=0x%08x ctrl=0x%08x\n", |
740 | __func__, readl(®s->mcr), readl(®s->ctrl)); | 765 | __func__, flexcan_read(®s->mcr), flexcan_read(®s->ctrl)); |
741 | 766 | ||
742 | return 0; | 767 | return 0; |
743 | 768 | ||
@@ -759,12 +784,12 @@ static void flexcan_chip_stop(struct net_device *dev) | |||
759 | u32 reg; | 784 | u32 reg; |
760 | 785 | ||
761 | /* Disable all interrupts */ | 786 | /* Disable all interrupts */ |
762 | writel(0, ®s->imask1); | 787 | flexcan_write(0, ®s->imask1); |
763 | 788 | ||
764 | /* Disable + halt module */ | 789 | /* Disable + halt module */ |
765 | reg = readl(®s->mcr); | 790 | reg = flexcan_read(®s->mcr); |
766 | reg |= FLEXCAN_MCR_MDIS | FLEXCAN_MCR_HALT; | 791 | reg |= FLEXCAN_MCR_MDIS | FLEXCAN_MCR_HALT; |
767 | writel(reg, ®s->mcr); | 792 | flexcan_write(reg, ®s->mcr); |
768 | 793 | ||
769 | flexcan_transceiver_switch(priv, 0); | 794 | flexcan_transceiver_switch(priv, 0); |
770 | priv->can.state = CAN_STATE_STOPPED; | 795 | priv->can.state = CAN_STATE_STOPPED; |
@@ -856,24 +881,24 @@ static int __devinit register_flexcandev(struct net_device *dev) | |||
856 | 881 | ||
857 | /* select "bus clock", chip must be disabled */ | 882 | /* select "bus clock", chip must be disabled */ |
858 | flexcan_chip_disable(priv); | 883 | flexcan_chip_disable(priv); |
859 | reg = readl(®s->ctrl); | 884 | reg = flexcan_read(®s->ctrl); |
860 | reg |= FLEXCAN_CTRL_CLK_SRC; | 885 | reg |= FLEXCAN_CTRL_CLK_SRC; |
861 | writel(reg, ®s->ctrl); | 886 | flexcan_write(reg, ®s->ctrl); |
862 | 887 | ||
863 | flexcan_chip_enable(priv); | 888 | flexcan_chip_enable(priv); |
864 | 889 | ||
865 | /* set freeze, halt and activate FIFO, restrict register access */ | 890 | /* set freeze, halt and activate FIFO, restrict register access */ |
866 | reg = readl(®s->mcr); | 891 | reg = flexcan_read(®s->mcr); |
867 | reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT | | 892 | reg |= FLEXCAN_MCR_FRZ | FLEXCAN_MCR_HALT | |
868 | FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV; | 893 | FLEXCAN_MCR_FEN | FLEXCAN_MCR_SUPV; |
869 | writel(reg, ®s->mcr); | 894 | flexcan_write(reg, ®s->mcr); |
870 | 895 | ||
871 | /* | 896 | /* |
872 | * Currently we only support newer versions of this core | 897 | * Currently we only support newer versions of this core |
873 | * featuring a RX FIFO. Older cores found on some Coldfire | 898 | * featuring a RX FIFO. Older cores found on some Coldfire |
874 | * derivates are not yet supported. | 899 | * derivates are not yet supported. |
875 | */ | 900 | */ |
876 | reg = readl(®s->mcr); | 901 | reg = flexcan_read(®s->mcr); |
877 | if (!(reg & FLEXCAN_MCR_FEN)) { | 902 | if (!(reg & FLEXCAN_MCR_FEN)) { |
878 | dev_err(dev->dev.parent, | 903 | dev_err(dev->dev.parent, |
879 | "Could not enable RX FIFO, unsupported core\n"); | 904 | "Could not enable RX FIFO, unsupported core\n"); |
@@ -901,16 +926,29 @@ static int __devinit flexcan_probe(struct platform_device *pdev) | |||
901 | struct net_device *dev; | 926 | struct net_device *dev; |
902 | struct flexcan_priv *priv; | 927 | struct flexcan_priv *priv; |
903 | struct resource *mem; | 928 | struct resource *mem; |
904 | struct clk *clk; | 929 | struct clk *clk = NULL; |
905 | void __iomem *base; | 930 | void __iomem *base; |
906 | resource_size_t mem_size; | 931 | resource_size_t mem_size; |
907 | int err, irq; | 932 | int err, irq; |
933 | u32 clock_freq = 0; | ||
934 | |||
935 | if (pdev->dev.of_node) { | ||
936 | const u32 *clock_freq_p; | ||
908 | 937 | ||
909 | clk = clk_get(&pdev->dev, NULL); | 938 | clock_freq_p = of_get_property(pdev->dev.of_node, |
910 | if (IS_ERR(clk)) { | 939 | "clock-frequency", NULL); |
911 | dev_err(&pdev->dev, "no clock defined\n"); | 940 | if (clock_freq_p) |
912 | err = PTR_ERR(clk); | 941 | clock_freq = *clock_freq_p; |
913 | goto failed_clock; | 942 | } |
943 | |||
944 | if (!clock_freq) { | ||
945 | clk = clk_get(&pdev->dev, NULL); | ||
946 | if (IS_ERR(clk)) { | ||
947 | dev_err(&pdev->dev, "no clock defined\n"); | ||
948 | err = PTR_ERR(clk); | ||
949 | goto failed_clock; | ||
950 | } | ||
951 | clock_freq = clk_get_rate(clk); | ||
914 | } | 952 | } |
915 | 953 | ||
916 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 954 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
@@ -943,7 +981,7 @@ static int __devinit flexcan_probe(struct platform_device *pdev) | |||
943 | dev->flags |= IFF_ECHO; /* we support local echo in hardware */ | 981 | dev->flags |= IFF_ECHO; /* we support local echo in hardware */ |
944 | 982 | ||
945 | priv = netdev_priv(dev); | 983 | priv = netdev_priv(dev); |
946 | priv->can.clock.freq = clk_get_rate(clk); | 984 | priv->can.clock.freq = clock_freq; |
947 | priv->can.bittiming_const = &flexcan_bittiming_const; | 985 | priv->can.bittiming_const = &flexcan_bittiming_const; |
948 | priv->can.do_set_mode = flexcan_set_mode; | 986 | priv->can.do_set_mode = flexcan_set_mode; |
949 | priv->can.do_get_berr_counter = flexcan_get_berr_counter; | 987 | priv->can.do_get_berr_counter = flexcan_get_berr_counter; |
@@ -978,7 +1016,8 @@ static int __devinit flexcan_probe(struct platform_device *pdev) | |||
978 | failed_map: | 1016 | failed_map: |
979 | release_mem_region(mem->start, mem_size); | 1017 | release_mem_region(mem->start, mem_size); |
980 | failed_get: | 1018 | failed_get: |
981 | clk_put(clk); | 1019 | if (clk) |
1020 | clk_put(clk); | ||
982 | failed_clock: | 1021 | failed_clock: |
983 | return err; | 1022 | return err; |
984 | } | 1023 | } |
@@ -996,15 +1035,27 @@ static int __devexit flexcan_remove(struct platform_device *pdev) | |||
996 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); | 1035 | mem = platform_get_resource(pdev, IORESOURCE_MEM, 0); |
997 | release_mem_region(mem->start, resource_size(mem)); | 1036 | release_mem_region(mem->start, resource_size(mem)); |
998 | 1037 | ||
999 | clk_put(priv->clk); | 1038 | if (priv->clk) |
1039 | clk_put(priv->clk); | ||
1000 | 1040 | ||
1001 | free_candev(dev); | 1041 | free_candev(dev); |
1002 | 1042 | ||
1003 | return 0; | 1043 | return 0; |
1004 | } | 1044 | } |
1005 | 1045 | ||
1046 | static struct of_device_id flexcan_of_match[] = { | ||
1047 | { | ||
1048 | .compatible = "fsl,p1010-flexcan", | ||
1049 | }, | ||
1050 | {}, | ||
1051 | }; | ||
1052 | |||
1006 | static struct platform_driver flexcan_driver = { | 1053 | static struct platform_driver flexcan_driver = { |
1007 | .driver.name = DRV_NAME, | 1054 | .driver = { |
1055 | .name = DRV_NAME, | ||
1056 | .owner = THIS_MODULE, | ||
1057 | .of_match_table = flexcan_of_match, | ||
1058 | }, | ||
1008 | .probe = flexcan_probe, | 1059 | .probe = flexcan_probe, |
1009 | .remove = __devexit_p(flexcan_remove), | 1060 | .remove = __devexit_p(flexcan_remove), |
1010 | }; | 1061 | }; |
diff --git a/drivers/net/can/mscan/mscan.c b/drivers/net/can/mscan/mscan.c index 4cc6f44c2ba2..ec4a3119e2c9 100644 --- a/drivers/net/can/mscan/mscan.c +++ b/drivers/net/can/mscan/mscan.c | |||
@@ -62,7 +62,7 @@ static enum can_state state_map[] = { | |||
62 | static int mscan_set_mode(struct net_device *dev, u8 mode) | 62 | static int mscan_set_mode(struct net_device *dev, u8 mode) |
63 | { | 63 | { |
64 | struct mscan_priv *priv = netdev_priv(dev); | 64 | struct mscan_priv *priv = netdev_priv(dev); |
65 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 65 | struct mscan_regs __iomem *regs = priv->reg_base; |
66 | int ret = 0; | 66 | int ret = 0; |
67 | int i; | 67 | int i; |
68 | u8 canctl1; | 68 | u8 canctl1; |
@@ -138,7 +138,7 @@ static int mscan_set_mode(struct net_device *dev, u8 mode) | |||
138 | static int mscan_start(struct net_device *dev) | 138 | static int mscan_start(struct net_device *dev) |
139 | { | 139 | { |
140 | struct mscan_priv *priv = netdev_priv(dev); | 140 | struct mscan_priv *priv = netdev_priv(dev); |
141 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 141 | struct mscan_regs __iomem *regs = priv->reg_base; |
142 | u8 canrflg; | 142 | u8 canrflg; |
143 | int err; | 143 | int err; |
144 | 144 | ||
@@ -178,7 +178,7 @@ static int mscan_restart(struct net_device *dev) | |||
178 | struct mscan_priv *priv = netdev_priv(dev); | 178 | struct mscan_priv *priv = netdev_priv(dev); |
179 | 179 | ||
180 | if (priv->type == MSCAN_TYPE_MPC5121) { | 180 | if (priv->type == MSCAN_TYPE_MPC5121) { |
181 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 181 | struct mscan_regs __iomem *regs = priv->reg_base; |
182 | 182 | ||
183 | priv->can.state = CAN_STATE_ERROR_ACTIVE; | 183 | priv->can.state = CAN_STATE_ERROR_ACTIVE; |
184 | WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD), | 184 | WARN(!(in_8(®s->canmisc) & MSCAN_BOHOLD), |
@@ -199,7 +199,7 @@ static netdev_tx_t mscan_start_xmit(struct sk_buff *skb, struct net_device *dev) | |||
199 | { | 199 | { |
200 | struct can_frame *frame = (struct can_frame *)skb->data; | 200 | struct can_frame *frame = (struct can_frame *)skb->data; |
201 | struct mscan_priv *priv = netdev_priv(dev); | 201 | struct mscan_priv *priv = netdev_priv(dev); |
202 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 202 | struct mscan_regs __iomem *regs = priv->reg_base; |
203 | int i, rtr, buf_id; | 203 | int i, rtr, buf_id; |
204 | u32 can_id; | 204 | u32 can_id; |
205 | 205 | ||
@@ -307,7 +307,7 @@ static enum can_state check_set_state(struct net_device *dev, u8 canrflg) | |||
307 | static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame) | 307 | static void mscan_get_rx_frame(struct net_device *dev, struct can_frame *frame) |
308 | { | 308 | { |
309 | struct mscan_priv *priv = netdev_priv(dev); | 309 | struct mscan_priv *priv = netdev_priv(dev); |
310 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 310 | struct mscan_regs __iomem *regs = priv->reg_base; |
311 | u32 can_id; | 311 | u32 can_id; |
312 | int i; | 312 | int i; |
313 | 313 | ||
@@ -348,7 +348,7 @@ static void mscan_get_err_frame(struct net_device *dev, struct can_frame *frame, | |||
348 | u8 canrflg) | 348 | u8 canrflg) |
349 | { | 349 | { |
350 | struct mscan_priv *priv = netdev_priv(dev); | 350 | struct mscan_priv *priv = netdev_priv(dev); |
351 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 351 | struct mscan_regs __iomem *regs = priv->reg_base; |
352 | struct net_device_stats *stats = &dev->stats; | 352 | struct net_device_stats *stats = &dev->stats; |
353 | enum can_state old_state; | 353 | enum can_state old_state; |
354 | 354 | ||
@@ -411,7 +411,7 @@ static int mscan_rx_poll(struct napi_struct *napi, int quota) | |||
411 | { | 411 | { |
412 | struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi); | 412 | struct mscan_priv *priv = container_of(napi, struct mscan_priv, napi); |
413 | struct net_device *dev = napi->dev; | 413 | struct net_device *dev = napi->dev; |
414 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 414 | struct mscan_regs __iomem *regs = priv->reg_base; |
415 | struct net_device_stats *stats = &dev->stats; | 415 | struct net_device_stats *stats = &dev->stats; |
416 | int npackets = 0; | 416 | int npackets = 0; |
417 | int ret = 1; | 417 | int ret = 1; |
@@ -458,7 +458,7 @@ static irqreturn_t mscan_isr(int irq, void *dev_id) | |||
458 | { | 458 | { |
459 | struct net_device *dev = (struct net_device *)dev_id; | 459 | struct net_device *dev = (struct net_device *)dev_id; |
460 | struct mscan_priv *priv = netdev_priv(dev); | 460 | struct mscan_priv *priv = netdev_priv(dev); |
461 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 461 | struct mscan_regs __iomem *regs = priv->reg_base; |
462 | struct net_device_stats *stats = &dev->stats; | 462 | struct net_device_stats *stats = &dev->stats; |
463 | u8 cantier, cantflg, canrflg; | 463 | u8 cantier, cantflg, canrflg; |
464 | irqreturn_t ret = IRQ_NONE; | 464 | irqreturn_t ret = IRQ_NONE; |
@@ -542,7 +542,7 @@ static int mscan_do_set_mode(struct net_device *dev, enum can_mode mode) | |||
542 | static int mscan_do_set_bittiming(struct net_device *dev) | 542 | static int mscan_do_set_bittiming(struct net_device *dev) |
543 | { | 543 | { |
544 | struct mscan_priv *priv = netdev_priv(dev); | 544 | struct mscan_priv *priv = netdev_priv(dev); |
545 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 545 | struct mscan_regs __iomem *regs = priv->reg_base; |
546 | struct can_bittiming *bt = &priv->can.bittiming; | 546 | struct can_bittiming *bt = &priv->can.bittiming; |
547 | u8 btr0, btr1; | 547 | u8 btr0, btr1; |
548 | 548 | ||
@@ -564,7 +564,7 @@ static int mscan_open(struct net_device *dev) | |||
564 | { | 564 | { |
565 | int ret; | 565 | int ret; |
566 | struct mscan_priv *priv = netdev_priv(dev); | 566 | struct mscan_priv *priv = netdev_priv(dev); |
567 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 567 | struct mscan_regs __iomem *regs = priv->reg_base; |
568 | 568 | ||
569 | /* common open */ | 569 | /* common open */ |
570 | ret = open_candev(dev); | 570 | ret = open_candev(dev); |
@@ -603,7 +603,7 @@ exit_napi_disable: | |||
603 | static int mscan_close(struct net_device *dev) | 603 | static int mscan_close(struct net_device *dev) |
604 | { | 604 | { |
605 | struct mscan_priv *priv = netdev_priv(dev); | 605 | struct mscan_priv *priv = netdev_priv(dev); |
606 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 606 | struct mscan_regs __iomem *regs = priv->reg_base; |
607 | 607 | ||
608 | netif_stop_queue(dev); | 608 | netif_stop_queue(dev); |
609 | napi_disable(&priv->napi); | 609 | napi_disable(&priv->napi); |
@@ -627,7 +627,7 @@ static const struct net_device_ops mscan_netdev_ops = { | |||
627 | int register_mscandev(struct net_device *dev, int mscan_clksrc) | 627 | int register_mscandev(struct net_device *dev, int mscan_clksrc) |
628 | { | 628 | { |
629 | struct mscan_priv *priv = netdev_priv(dev); | 629 | struct mscan_priv *priv = netdev_priv(dev); |
630 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 630 | struct mscan_regs __iomem *regs = priv->reg_base; |
631 | u8 ctl1; | 631 | u8 ctl1; |
632 | 632 | ||
633 | ctl1 = in_8(®s->canctl1); | 633 | ctl1 = in_8(®s->canctl1); |
@@ -664,7 +664,7 @@ int register_mscandev(struct net_device *dev, int mscan_clksrc) | |||
664 | void unregister_mscandev(struct net_device *dev) | 664 | void unregister_mscandev(struct net_device *dev) |
665 | { | 665 | { |
666 | struct mscan_priv *priv = netdev_priv(dev); | 666 | struct mscan_priv *priv = netdev_priv(dev); |
667 | struct mscan_regs *regs = (struct mscan_regs *)priv->reg_base; | 667 | struct mscan_regs __iomem *regs = priv->reg_base; |
668 | mscan_set_mode(dev, MSCAN_INIT_MODE); | 668 | mscan_set_mode(dev, MSCAN_INIT_MODE); |
669 | clrbits8(®s->canctl1, MSCAN_CANE); | 669 | clrbits8(®s->canctl1, MSCAN_CANE); |
670 | unregister_candev(dev); | 670 | unregister_candev(dev); |
diff --git a/drivers/net/can/sja1000/Kconfig b/drivers/net/can/sja1000/Kconfig index 6fdc031daaae..fe9e64d476eb 100644 --- a/drivers/net/can/sja1000/Kconfig +++ b/drivers/net/can/sja1000/Kconfig | |||
@@ -29,6 +29,13 @@ config CAN_SJA1000_OF_PLATFORM | |||
29 | OpenFirmware bindings, e.g. if you have a PowerPC based system | 29 | OpenFirmware bindings, e.g. if you have a PowerPC based system |
30 | you may want to enable this option. | 30 | you may want to enable this option. |
31 | 31 | ||
32 | config CAN_EMS_PCMCIA | ||
33 | tristate "EMS CPC-CARD Card" | ||
34 | depends on PCMCIA | ||
35 | ---help--- | ||
36 | This driver is for the one or two channel CPC-CARD cards from | ||
37 | EMS Dr. Thomas Wuensche (http://www.ems-wuensche.de). | ||
38 | |||
32 | config CAN_EMS_PCI | 39 | config CAN_EMS_PCI |
33 | tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card" | 40 | tristate "EMS CPC-PCI, CPC-PCIe and CPC-104P Card" |
34 | depends on PCI | 41 | depends on PCI |
@@ -37,6 +44,13 @@ config CAN_EMS_PCI | |||
37 | CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche | 44 | CPC-PCIe and CPC-104P cards from EMS Dr. Thomas Wuensche |
38 | (http://www.ems-wuensche.de). | 45 | (http://www.ems-wuensche.de). |
39 | 46 | ||
47 | config CAN_PEAK_PCI | ||
48 | tristate "PEAK PCAN PCI/PCIe Cards" | ||
49 | depends on PCI | ||
50 | ---help--- | ||
51 | This driver is for the PCAN PCI/PCIe cards (1, 2, 3 or 4 channels) | ||
52 | from PEAK Systems (http://www.peak-system.com). | ||
53 | |||
40 | config CAN_KVASER_PCI | 54 | config CAN_KVASER_PCI |
41 | tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards" | 55 | tristate "Kvaser PCIcanx and Kvaser PCIcan PCI Cards" |
42 | depends on PCI | 56 | depends on PCI |
diff --git a/drivers/net/can/sja1000/Makefile b/drivers/net/can/sja1000/Makefile index 2c591eb321c7..0604f240c8b1 100644 --- a/drivers/net/can/sja1000/Makefile +++ b/drivers/net/can/sja1000/Makefile | |||
@@ -6,8 +6,10 @@ obj-$(CONFIG_CAN_SJA1000) += sja1000.o | |||
6 | obj-$(CONFIG_CAN_SJA1000_ISA) += sja1000_isa.o | 6 | obj-$(CONFIG_CAN_SJA1000_ISA) += sja1000_isa.o |
7 | obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o | 7 | obj-$(CONFIG_CAN_SJA1000_PLATFORM) += sja1000_platform.o |
8 | obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o | 8 | obj-$(CONFIG_CAN_SJA1000_OF_PLATFORM) += sja1000_of_platform.o |
9 | obj-$(CONFIG_CAN_EMS_PCMCIA) += ems_pcmcia.o | ||
9 | obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o | 10 | obj-$(CONFIG_CAN_EMS_PCI) += ems_pci.o |
10 | obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o | 11 | obj-$(CONFIG_CAN_KVASER_PCI) += kvaser_pci.o |
12 | obj-$(CONFIG_CAN_PEAK_PCI) += peak_pci.o | ||
11 | obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o | 13 | obj-$(CONFIG_CAN_PLX_PCI) += plx_pci.o |
12 | obj-$(CONFIG_CAN_TSCAN1) += tscan1.o | 14 | obj-$(CONFIG_CAN_TSCAN1) += tscan1.o |
13 | 15 | ||
diff --git a/drivers/net/can/sja1000/ems_pcmcia.c b/drivers/net/can/sja1000/ems_pcmcia.c new file mode 100644 index 000000000000..075a5457a190 --- /dev/null +++ b/drivers/net/can/sja1000/ems_pcmcia.c | |||
@@ -0,0 +1,331 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2008 Sebastian Haas (initial chardev implementation) | ||
3 | * Copyright (C) 2010 Markus Plessing <plessing@ems-wuensche.com> | ||
4 | * Rework for mainline by Oliver Hartkopp <socketcan@hartkopp.net> | ||
5 | * | ||
6 | * This program is free software; you can redistribute it and/or modify | ||
7 | * it under the terms of the version 2 of the GNU General Public License | ||
8 | * as published by the Free Software Foundation | ||
9 | * | ||
10 | * This program is distributed in the hope that it will be useful, | ||
11 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
12 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
13 | * GNU General Public License for more details. | ||
14 | */ | ||
15 | |||
16 | #include <linux/kernel.h> | ||
17 | #include <linux/module.h> | ||
18 | #include <linux/interrupt.h> | ||
19 | #include <linux/netdevice.h> | ||
20 | #include <linux/delay.h> | ||
21 | #include <linux/io.h> | ||
22 | #include <pcmcia/cistpl.h> | ||
23 | #include <pcmcia/ds.h> | ||
24 | #include <linux/can.h> | ||
25 | #include <linux/can/dev.h> | ||
26 | #include "sja1000.h" | ||
27 | |||
28 | #define DRV_NAME "ems_pcmcia" | ||
29 | |||
30 | MODULE_AUTHOR("Markus Plessing <plessing@ems-wuensche.com>"); | ||
31 | MODULE_DESCRIPTION("Socket-CAN driver for EMS CPC-CARD cards"); | ||
32 | MODULE_SUPPORTED_DEVICE("EMS CPC-CARD CAN card"); | ||
33 | MODULE_LICENSE("GPL v2"); | ||
34 | |||
35 | #define EMS_PCMCIA_MAX_CHAN 2 | ||
36 | |||
37 | struct ems_pcmcia_card { | ||
38 | int channels; | ||
39 | struct pcmcia_device *pcmcia_dev; | ||
40 | struct net_device *net_dev[EMS_PCMCIA_MAX_CHAN]; | ||
41 | void __iomem *base_addr; | ||
42 | }; | ||
43 | |||
44 | #define EMS_PCMCIA_CAN_CLOCK (16000000 / 2) | ||
45 | |||
46 | /* | ||
47 | * The board configuration is probably following: | ||
48 | * RX1 is connected to ground. | ||
49 | * TX1 is not connected. | ||
50 | * CLKO is not connected. | ||
51 | * Setting the OCR register to 0xDA is a good idea. | ||
52 | * This means normal output mode , push-pull and the correct polarity. | ||
53 | */ | ||
54 | #define EMS_PCMCIA_OCR (OCR_TX0_PUSHPULL | OCR_TX1_PUSHPULL) | ||
55 | |||
56 | /* | ||
57 | * In the CDR register, you should set CBP to 1. | ||
58 | * You will probably also want to set the clock divider value to 7 | ||
59 | * (meaning direct oscillator output) because the second SJA1000 chip | ||
60 | * is driven by the first one CLKOUT output. | ||
61 | */ | ||
62 | #define EMS_PCMCIA_CDR (CDR_CBP | CDR_CLKOUT_MASK) | ||
63 | #define EMS_PCMCIA_MEM_SIZE 4096 /* Size of the remapped io-memory */ | ||
64 | #define EMS_PCMCIA_CAN_BASE_OFFSET 0x100 /* Offset where controllers starts */ | ||
65 | #define EMS_PCMCIA_CAN_CTRL_SIZE 0x80 /* Memory size for each controller */ | ||
66 | |||
67 | #define EMS_CMD_RESET 0x00 /* Perform a reset of the card */ | ||
68 | #define EMS_CMD_MAP 0x03 /* Map CAN controllers into card' memory */ | ||
69 | #define EMS_CMD_UMAP 0x02 /* Unmap CAN controllers from card' memory */ | ||
70 | |||
71 | static struct pcmcia_device_id ems_pcmcia_tbl[] = { | ||
72 | PCMCIA_DEVICE_PROD_ID123("EMS_T_W", "CPC-Card", "V2.0", 0xeab1ea23, | ||
73 | 0xa338573f, 0xe4575800), | ||
74 | PCMCIA_DEVICE_NULL, | ||
75 | }; | ||
76 | |||
77 | MODULE_DEVICE_TABLE(pcmcia, ems_pcmcia_tbl); | ||
78 | |||
79 | static u8 ems_pcmcia_read_reg(const struct sja1000_priv *priv, int port) | ||
80 | { | ||
81 | return readb(priv->reg_base + port); | ||
82 | } | ||
83 | |||
84 | static void ems_pcmcia_write_reg(const struct sja1000_priv *priv, int port, | ||
85 | u8 val) | ||
86 | { | ||
87 | writeb(val, priv->reg_base + port); | ||
88 | } | ||
89 | |||
90 | static irqreturn_t ems_pcmcia_interrupt(int irq, void *dev_id) | ||
91 | { | ||
92 | struct ems_pcmcia_card *card = dev_id; | ||
93 | struct net_device *dev; | ||
94 | irqreturn_t retval = IRQ_NONE; | ||
95 | int i, again; | ||
96 | |||
97 | /* Card not present */ | ||
98 | if (readw(card->base_addr) != 0xAA55) | ||
99 | return IRQ_HANDLED; | ||
100 | |||
101 | do { | ||
102 | again = 0; | ||
103 | |||
104 | /* Check interrupt for each channel */ | ||
105 | for (i = 0; i < card->channels; i++) { | ||
106 | dev = card->net_dev[i]; | ||
107 | if (!dev) | ||
108 | continue; | ||
109 | |||
110 | if (sja1000_interrupt(irq, dev) == IRQ_HANDLED) | ||
111 | again = 1; | ||
112 | } | ||
113 | /* At least one channel handled the interrupt */ | ||
114 | if (again) | ||
115 | retval = IRQ_HANDLED; | ||
116 | |||
117 | } while (again); | ||
118 | |||
119 | return retval; | ||
120 | } | ||
121 | |||
122 | /* | ||
123 | * Check if a CAN controller is present at the specified location | ||
124 | * by trying to set 'em into the PeliCAN mode | ||
125 | */ | ||
126 | static inline int ems_pcmcia_check_chan(struct sja1000_priv *priv) | ||
127 | { | ||
128 | /* Make sure SJA1000 is in reset mode */ | ||
129 | ems_pcmcia_write_reg(priv, REG_MOD, 1); | ||
130 | ems_pcmcia_write_reg(priv, REG_CDR, CDR_PELICAN); | ||
131 | |||
132 | /* read reset-values */ | ||
133 | if (ems_pcmcia_read_reg(priv, REG_CDR) == CDR_PELICAN) | ||
134 | return 1; | ||
135 | |||
136 | return 0; | ||
137 | } | ||
138 | |||
139 | static void ems_pcmcia_del_card(struct pcmcia_device *pdev) | ||
140 | { | ||
141 | struct ems_pcmcia_card *card = pdev->priv; | ||
142 | struct net_device *dev; | ||
143 | int i; | ||
144 | |||
145 | free_irq(pdev->irq, card); | ||
146 | |||
147 | for (i = 0; i < card->channels; i++) { | ||
148 | dev = card->net_dev[i]; | ||
149 | if (!dev) | ||
150 | continue; | ||
151 | |||
152 | printk(KERN_INFO "%s: removing %s on channel #%d\n", | ||
153 | DRV_NAME, dev->name, i); | ||
154 | unregister_sja1000dev(dev); | ||
155 | free_sja1000dev(dev); | ||
156 | } | ||
157 | |||
158 | writeb(EMS_CMD_UMAP, card->base_addr); | ||
159 | iounmap(card->base_addr); | ||
160 | kfree(card); | ||
161 | |||
162 | pdev->priv = NULL; | ||
163 | } | ||
164 | |||
165 | /* | ||
166 | * Probe PCI device for EMS CAN signature and register each available | ||
167 | * CAN channel to SJA1000 Socket-CAN subsystem. | ||
168 | */ | ||
169 | static int __devinit ems_pcmcia_add_card(struct pcmcia_device *pdev, | ||
170 | unsigned long base) | ||
171 | { | ||
172 | struct sja1000_priv *priv; | ||
173 | struct net_device *dev; | ||
174 | struct ems_pcmcia_card *card; | ||
175 | int err, i; | ||
176 | |||
177 | /* Allocating card structures to hold addresses, ... */ | ||
178 | card = kzalloc(sizeof(struct ems_pcmcia_card), GFP_KERNEL); | ||
179 | if (!card) | ||
180 | return -ENOMEM; | ||
181 | |||
182 | pdev->priv = card; | ||
183 | card->channels = 0; | ||
184 | |||
185 | card->base_addr = ioremap(base, EMS_PCMCIA_MEM_SIZE); | ||
186 | if (!card->base_addr) { | ||
187 | err = -ENOMEM; | ||
188 | goto failure_cleanup; | ||
189 | } | ||
190 | |||
191 | /* Check for unique EMS CAN signature */ | ||
192 | if (readw(card->base_addr) != 0xAA55) { | ||
193 | err = -ENODEV; | ||
194 | goto failure_cleanup; | ||
195 | } | ||
196 | |||
197 | /* Request board reset */ | ||
198 | writeb(EMS_CMD_RESET, card->base_addr); | ||
199 | |||
200 | /* Make sure CAN controllers are mapped into card's memory space */ | ||
201 | writeb(EMS_CMD_MAP, card->base_addr); | ||
202 | |||
203 | /* Detect available channels */ | ||
204 | for (i = 0; i < EMS_PCMCIA_MAX_CHAN; i++) { | ||
205 | dev = alloc_sja1000dev(0); | ||
206 | if (!dev) { | ||
207 | err = -ENOMEM; | ||
208 | goto failure_cleanup; | ||
209 | } | ||
210 | |||
211 | card->net_dev[i] = dev; | ||
212 | priv = netdev_priv(dev); | ||
213 | priv->priv = card; | ||
214 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
215 | |||
216 | priv->irq_flags = IRQF_SHARED; | ||
217 | dev->irq = pdev->irq; | ||
218 | priv->reg_base = card->base_addr + EMS_PCMCIA_CAN_BASE_OFFSET + | ||
219 | (i * EMS_PCMCIA_CAN_CTRL_SIZE); | ||
220 | |||
221 | /* Check if channel is present */ | ||
222 | if (ems_pcmcia_check_chan(priv)) { | ||
223 | priv->read_reg = ems_pcmcia_read_reg; | ||
224 | priv->write_reg = ems_pcmcia_write_reg; | ||
225 | priv->can.clock.freq = EMS_PCMCIA_CAN_CLOCK; | ||
226 | priv->ocr = EMS_PCMCIA_OCR; | ||
227 | priv->cdr = EMS_PCMCIA_CDR; | ||
228 | priv->flags |= SJA1000_CUSTOM_IRQ_HANDLER; | ||
229 | |||
230 | /* Register SJA1000 device */ | ||
231 | err = register_sja1000dev(dev); | ||
232 | if (err) { | ||
233 | free_sja1000dev(dev); | ||
234 | goto failure_cleanup; | ||
235 | } | ||
236 | |||
237 | card->channels++; | ||
238 | |||
239 | printk(KERN_INFO "%s: registered %s on channel " | ||
240 | "#%d at 0x%p, irq %d\n", DRV_NAME, dev->name, | ||
241 | i, priv->reg_base, dev->irq); | ||
242 | } else | ||
243 | free_sja1000dev(dev); | ||
244 | } | ||
245 | |||
246 | err = request_irq(dev->irq, &ems_pcmcia_interrupt, IRQF_SHARED, | ||
247 | DRV_NAME, card); | ||
248 | if (!err) | ||
249 | return 0; | ||
250 | |||
251 | failure_cleanup: | ||
252 | ems_pcmcia_del_card(pdev); | ||
253 | return err; | ||
254 | } | ||
255 | |||
256 | /* | ||
257 | * Setup PCMCIA socket and probe for EMS CPC-CARD | ||
258 | */ | ||
259 | static int __devinit ems_pcmcia_probe(struct pcmcia_device *dev) | ||
260 | { | ||
261 | int csval; | ||
262 | |||
263 | /* General socket configuration */ | ||
264 | dev->config_flags |= CONF_ENABLE_IRQ; | ||
265 | dev->config_index = 1; | ||
266 | dev->config_regs = PRESENT_OPTION; | ||
267 | |||
268 | /* The io structure describes IO port mapping */ | ||
269 | dev->resource[0]->end = 16; | ||
270 | dev->resource[0]->flags |= IO_DATA_PATH_WIDTH_8; | ||
271 | dev->resource[1]->end = 16; | ||
272 | dev->resource[1]->flags |= IO_DATA_PATH_WIDTH_16; | ||
273 | dev->io_lines = 5; | ||
274 | |||
275 | /* Allocate a memory window */ | ||
276 | dev->resource[2]->flags = | ||
277 | (WIN_DATA_WIDTH_8 | WIN_MEMORY_TYPE_CM | WIN_ENABLE); | ||
278 | dev->resource[2]->start = dev->resource[2]->end = 0; | ||
279 | |||
280 | csval = pcmcia_request_window(dev, dev->resource[2], 0); | ||
281 | if (csval) { | ||
282 | dev_err(&dev->dev, "pcmcia_request_window failed (err=%d)\n", | ||
283 | csval); | ||
284 | return 0; | ||
285 | } | ||
286 | |||
287 | csval = pcmcia_map_mem_page(dev, dev->resource[2], dev->config_base); | ||
288 | if (csval) { | ||
289 | dev_err(&dev->dev, "pcmcia_map_mem_page failed (err=%d)\n", | ||
290 | csval); | ||
291 | return 0; | ||
292 | } | ||
293 | |||
294 | csval = pcmcia_enable_device(dev); | ||
295 | if (csval) { | ||
296 | dev_err(&dev->dev, "pcmcia_enable_device failed (err=%d)\n", | ||
297 | csval); | ||
298 | return 0; | ||
299 | } | ||
300 | |||
301 | ems_pcmcia_add_card(dev, dev->resource[2]->start); | ||
302 | return 0; | ||
303 | } | ||
304 | |||
305 | /* | ||
306 | * Release claimed resources | ||
307 | */ | ||
308 | static void ems_pcmcia_remove(struct pcmcia_device *dev) | ||
309 | { | ||
310 | ems_pcmcia_del_card(dev); | ||
311 | pcmcia_disable_device(dev); | ||
312 | } | ||
313 | |||
314 | static struct pcmcia_driver ems_pcmcia_driver = { | ||
315 | .name = DRV_NAME, | ||
316 | .probe = ems_pcmcia_probe, | ||
317 | .remove = ems_pcmcia_remove, | ||
318 | .id_table = ems_pcmcia_tbl, | ||
319 | }; | ||
320 | |||
321 | static int __init ems_pcmcia_init(void) | ||
322 | { | ||
323 | return pcmcia_register_driver(&ems_pcmcia_driver); | ||
324 | } | ||
325 | module_init(ems_pcmcia_init); | ||
326 | |||
327 | static void __exit ems_pcmcia_exit(void) | ||
328 | { | ||
329 | pcmcia_unregister_driver(&ems_pcmcia_driver); | ||
330 | } | ||
331 | module_exit(ems_pcmcia_exit); | ||
diff --git a/drivers/net/can/sja1000/peak_pci.c b/drivers/net/can/sja1000/peak_pci.c new file mode 100644 index 000000000000..905bce0b3a43 --- /dev/null +++ b/drivers/net/can/sja1000/peak_pci.c | |||
@@ -0,0 +1,291 @@ | |||
1 | /* | ||
2 | * Copyright (C) 2007, 2011 Wolfgang Grandegger <wg@grandegger.com> | ||
3 | * | ||
4 | * Derived from the PCAN project file driver/src/pcan_pci.c: | ||
5 | * | ||
6 | * Copyright (C) 2001-2006 PEAK System-Technik GmbH | ||
7 | * | ||
8 | * This program is free software; you can redistribute it and/or modify | ||
9 | * it under the terms of the version 2 of the GNU General Public License | ||
10 | * as published by the Free Software Foundation | ||
11 | * | ||
12 | * This program is distributed in the hope that it will be useful, | ||
13 | * but WITHOUT ANY WARRANTY; without even the implied warranty of | ||
14 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the | ||
15 | * GNU General Public License for more details. | ||
16 | * | ||
17 | * You should have received a copy of the GNU General Public License | ||
18 | * along with this program; if not, write to the Free Software Foundation, | ||
19 | * Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. | ||
20 | */ | ||
21 | |||
22 | #include <linux/kernel.h> | ||
23 | #include <linux/version.h> | ||
24 | #include <linux/module.h> | ||
25 | #include <linux/interrupt.h> | ||
26 | #include <linux/netdevice.h> | ||
27 | #include <linux/delay.h> | ||
28 | #include <linux/pci.h> | ||
29 | #include <linux/io.h> | ||
30 | #include <linux/can.h> | ||
31 | #include <linux/can/dev.h> | ||
32 | |||
33 | #include "sja1000.h" | ||
34 | |||
35 | MODULE_AUTHOR("Wolfgang Grandegger <wg@grandegger.com>"); | ||
36 | MODULE_DESCRIPTION("Socket-CAN driver for PEAK PCAN PCI/PCIe cards"); | ||
37 | MODULE_SUPPORTED_DEVICE("PEAK PCAN PCI/PCIe CAN card"); | ||
38 | MODULE_LICENSE("GPL v2"); | ||
39 | |||
40 | #define DRV_NAME "peak_pci" | ||
41 | |||
42 | struct peak_pci_chan { | ||
43 | void __iomem *cfg_base; /* Common for all channels */ | ||
44 | struct net_device *next_dev; /* Chain of network devices */ | ||
45 | u16 icr_mask; /* Interrupt mask for fast ack */ | ||
46 | }; | ||
47 | |||
48 | #define PEAK_PCI_CAN_CLOCK (16000000 / 2) | ||
49 | |||
50 | #define PEAK_PCI_CDR (CDR_CBP | CDR_CLKOUT_MASK) | ||
51 | #define PEAK_PCI_OCR OCR_TX0_PUSHPULL | ||
52 | |||
53 | /* | ||
54 | * Important PITA registers | ||
55 | */ | ||
56 | #define PITA_ICR 0x00 /* Interrupt control register */ | ||
57 | #define PITA_GPIOICR 0x18 /* GPIO interface control register */ | ||
58 | #define PITA_MISC 0x1C /* Miscellaneous register */ | ||
59 | |||
60 | #define PEAK_PCI_CFG_SIZE 0x1000 /* Size of the config PCI bar */ | ||
61 | #define PEAK_PCI_CHAN_SIZE 0x0400 /* Size used by the channel */ | ||
62 | |||
63 | #define PEAK_PCI_VENDOR_ID 0x001C /* The PCI device and vendor IDs */ | ||
64 | #define PEAK_PCI_DEVICE_ID 0x0001 /* for PCI/PCIe slot cards */ | ||
65 | |||
66 | static const u16 peak_pci_icr_masks[] = {0x02, 0x01, 0x40, 0x80}; | ||
67 | |||
68 | static DEFINE_PCI_DEVICE_TABLE(peak_pci_tbl) = { | ||
69 | {PEAK_PCI_VENDOR_ID, PEAK_PCI_DEVICE_ID, PCI_ANY_ID, PCI_ANY_ID,}, | ||
70 | {0,} | ||
71 | }; | ||
72 | |||
73 | MODULE_DEVICE_TABLE(pci, peak_pci_tbl); | ||
74 | |||
75 | static u8 peak_pci_read_reg(const struct sja1000_priv *priv, int port) | ||
76 | { | ||
77 | return readb(priv->reg_base + (port << 2)); | ||
78 | } | ||
79 | |||
80 | static void peak_pci_write_reg(const struct sja1000_priv *priv, | ||
81 | int port, u8 val) | ||
82 | { | ||
83 | writeb(val, priv->reg_base + (port << 2)); | ||
84 | } | ||
85 | |||
86 | static void peak_pci_post_irq(const struct sja1000_priv *priv) | ||
87 | { | ||
88 | struct peak_pci_chan *chan = priv->priv; | ||
89 | u16 icr; | ||
90 | |||
91 | /* Select and clear in PITA stored interrupt */ | ||
92 | icr = readw(chan->cfg_base + PITA_ICR); | ||
93 | if (icr & chan->icr_mask) | ||
94 | writew(chan->icr_mask, chan->cfg_base + PITA_ICR); | ||
95 | } | ||
96 | |||
97 | static int __devinit peak_pci_probe(struct pci_dev *pdev, | ||
98 | const struct pci_device_id *ent) | ||
99 | { | ||
100 | struct sja1000_priv *priv; | ||
101 | struct peak_pci_chan *chan; | ||
102 | struct net_device *dev, *dev0 = NULL; | ||
103 | void __iomem *cfg_base, *reg_base; | ||
104 | u16 sub_sys_id, icr; | ||
105 | int i, err, channels; | ||
106 | |||
107 | err = pci_enable_device(pdev); | ||
108 | if (err) | ||
109 | return err; | ||
110 | |||
111 | err = pci_request_regions(pdev, DRV_NAME); | ||
112 | if (err) | ||
113 | goto failure_disable_pci; | ||
114 | |||
115 | err = pci_read_config_word(pdev, 0x2e, &sub_sys_id); | ||
116 | if (err) | ||
117 | goto failure_release_regions; | ||
118 | |||
119 | dev_dbg(&pdev->dev, "probing device %04x:%04x:%04x\n", | ||
120 | pdev->vendor, pdev->device, sub_sys_id); | ||
121 | |||
122 | err = pci_write_config_word(pdev, 0x44, 0); | ||
123 | if (err) | ||
124 | goto failure_release_regions; | ||
125 | |||
126 | if (sub_sys_id >= 12) | ||
127 | channels = 4; | ||
128 | else if (sub_sys_id >= 10) | ||
129 | channels = 3; | ||
130 | else if (sub_sys_id >= 4) | ||
131 | channels = 2; | ||
132 | else | ||
133 | channels = 1; | ||
134 | |||
135 | cfg_base = pci_iomap(pdev, 0, PEAK_PCI_CFG_SIZE); | ||
136 | if (!cfg_base) { | ||
137 | dev_err(&pdev->dev, "failed to map PCI resource #0\n"); | ||
138 | goto failure_release_regions; | ||
139 | } | ||
140 | |||
141 | reg_base = pci_iomap(pdev, 1, PEAK_PCI_CHAN_SIZE * channels); | ||
142 | if (!reg_base) { | ||
143 | dev_err(&pdev->dev, "failed to map PCI resource #1\n"); | ||
144 | goto failure_unmap_cfg_base; | ||
145 | } | ||
146 | |||
147 | /* Set GPIO control register */ | ||
148 | writew(0x0005, cfg_base + PITA_GPIOICR + 2); | ||
149 | /* Enable all channels of this card */ | ||
150 | writeb(0x00, cfg_base + PITA_GPIOICR); | ||
151 | /* Toggle reset */ | ||
152 | writeb(0x05, cfg_base + PITA_MISC + 3); | ||
153 | mdelay(5); | ||
154 | /* Leave parport mux mode */ | ||
155 | writeb(0x04, cfg_base + PITA_MISC + 3); | ||
156 | |||
157 | icr = readw(cfg_base + PITA_ICR + 2); | ||
158 | |||
159 | for (i = 0; i < channels; i++) { | ||
160 | dev = alloc_sja1000dev(sizeof(struct peak_pci_chan)); | ||
161 | if (!dev) { | ||
162 | err = -ENOMEM; | ||
163 | goto failure_remove_channels; | ||
164 | } | ||
165 | |||
166 | priv = netdev_priv(dev); | ||
167 | chan = priv->priv; | ||
168 | |||
169 | chan->cfg_base = cfg_base; | ||
170 | priv->reg_base = reg_base + i * PEAK_PCI_CHAN_SIZE; | ||
171 | |||
172 | priv->read_reg = peak_pci_read_reg; | ||
173 | priv->write_reg = peak_pci_write_reg; | ||
174 | priv->post_irq = peak_pci_post_irq; | ||
175 | |||
176 | priv->can.clock.freq = PEAK_PCI_CAN_CLOCK; | ||
177 | priv->ocr = PEAK_PCI_OCR; | ||
178 | priv->cdr = PEAK_PCI_CDR; | ||
179 | /* Neither a slave nor a single device distributes the clock */ | ||
180 | if (channels == 1 || i > 0) | ||
181 | priv->cdr |= CDR_CLK_OFF; | ||
182 | |||
183 | /* Setup interrupt handling */ | ||
184 | priv->irq_flags = IRQF_SHARED; | ||
185 | dev->irq = pdev->irq; | ||
186 | |||
187 | chan->icr_mask = peak_pci_icr_masks[i]; | ||
188 | icr |= chan->icr_mask; | ||
189 | |||
190 | SET_NETDEV_DEV(dev, &pdev->dev); | ||
191 | |||
192 | err = register_sja1000dev(dev); | ||
193 | if (err) { | ||
194 | dev_err(&pdev->dev, "failed to register device\n"); | ||
195 | free_sja1000dev(dev); | ||
196 | goto failure_remove_channels; | ||
197 | } | ||
198 | |||
199 | /* Create chain of SJA1000 devices */ | ||
200 | if (i == 0) | ||
201 | dev0 = dev; | ||
202 | else | ||
203 | chan->next_dev = dev; | ||
204 | |||
205 | dev_info(&pdev->dev, | ||
206 | "%s at reg_base=0x%p cfg_base=0x%p irq=%d\n", | ||
207 | dev->name, priv->reg_base, chan->cfg_base, dev->irq); | ||
208 | } | ||
209 | |||
210 | pci_set_drvdata(pdev, dev0); | ||
211 | |||
212 | /* Enable interrupts */ | ||
213 | writew(icr, cfg_base + PITA_ICR + 2); | ||
214 | |||
215 | return 0; | ||
216 | |||
217 | failure_remove_channels: | ||
218 | /* Disable interrupts */ | ||
219 | writew(0x0, cfg_base + PITA_ICR + 2); | ||
220 | |||
221 | for (dev = dev0; dev; dev = chan->next_dev) { | ||
222 | unregister_sja1000dev(dev); | ||
223 | free_sja1000dev(dev); | ||
224 | priv = netdev_priv(dev); | ||
225 | chan = priv->priv; | ||
226 | dev = chan->next_dev; | ||
227 | } | ||
228 | |||
229 | pci_iounmap(pdev, reg_base); | ||
230 | |||
231 | failure_unmap_cfg_base: | ||
232 | pci_iounmap(pdev, cfg_base); | ||
233 | |||
234 | failure_release_regions: | ||
235 | pci_release_regions(pdev); | ||
236 | |||
237 | failure_disable_pci: | ||
238 | pci_disable_device(pdev); | ||
239 | |||
240 | return err; | ||
241 | } | ||
242 | |||
243 | static void __devexit peak_pci_remove(struct pci_dev *pdev) | ||
244 | { | ||
245 | struct net_device *dev = pci_get_drvdata(pdev); /* First device */ | ||
246 | struct sja1000_priv *priv = netdev_priv(dev); | ||
247 | struct peak_pci_chan *chan = priv->priv; | ||
248 | void __iomem *cfg_base = chan->cfg_base; | ||
249 | void __iomem *reg_base = priv->reg_base; | ||
250 | |||
251 | /* Disable interrupts */ | ||
252 | writew(0x0, cfg_base + PITA_ICR + 2); | ||
253 | |||
254 | /* Loop over all registered devices */ | ||
255 | while (1) { | ||
256 | dev_info(&pdev->dev, "removing device %s\n", dev->name); | ||
257 | unregister_sja1000dev(dev); | ||
258 | free_sja1000dev(dev); | ||
259 | dev = chan->next_dev; | ||
260 | if (!dev) | ||
261 | break; | ||
262 | priv = netdev_priv(dev); | ||
263 | chan = priv->priv; | ||
264 | } | ||
265 | |||
266 | pci_iounmap(pdev, reg_base); | ||
267 | pci_iounmap(pdev, cfg_base); | ||
268 | pci_release_regions(pdev); | ||
269 | pci_disable_device(pdev); | ||
270 | |||
271 | pci_set_drvdata(pdev, NULL); | ||
272 | } | ||
273 | |||
274 | static struct pci_driver peak_pci_driver = { | ||
275 | .name = DRV_NAME, | ||
276 | .id_table = peak_pci_tbl, | ||
277 | .probe = peak_pci_probe, | ||
278 | .remove = __devexit_p(peak_pci_remove), | ||
279 | }; | ||
280 | |||
281 | static int __init peak_pci_init(void) | ||
282 | { | ||
283 | return pci_register_driver(&peak_pci_driver); | ||
284 | } | ||
285 | module_init(peak_pci_init); | ||
286 | |||
287 | static void __exit peak_pci_exit(void) | ||
288 | { | ||
289 | pci_unregister_driver(&peak_pci_driver); | ||
290 | } | ||
291 | module_exit(peak_pci_exit); | ||
diff --git a/drivers/net/can/sja1000/sja1000.c b/drivers/net/can/sja1000/sja1000.c index f501bba1fc6f..04a3f1b756a8 100644 --- a/drivers/net/can/sja1000/sja1000.c +++ b/drivers/net/can/sja1000/sja1000.c | |||
@@ -40,8 +40,6 @@ | |||
40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | 40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
41 | * DAMAGE. | 41 | * DAMAGE. |
42 | * | 42 | * |
43 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
44 | * | ||
45 | */ | 43 | */ |
46 | 44 | ||
47 | #include <linux/module.h> | 45 | #include <linux/module.h> |
diff --git a/drivers/net/can/sja1000/sja1000.h b/drivers/net/can/sja1000/sja1000.h index 78bd4ecac140..23fff06875f5 100644 --- a/drivers/net/can/sja1000/sja1000.h +++ b/drivers/net/can/sja1000/sja1000.h | |||
@@ -40,8 +40,6 @@ | |||
40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | 40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
41 | * DAMAGE. | 41 | * DAMAGE. |
42 | * | 42 | * |
43 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
44 | * | ||
45 | */ | 43 | */ |
46 | 44 | ||
47 | #ifndef SJA1000_DEV_H | 45 | #ifndef SJA1000_DEV_H |
diff --git a/drivers/net/can/slcan.c b/drivers/net/can/slcan.c index 4b70b7e8bdeb..a979b006f459 100644 --- a/drivers/net/can/slcan.c +++ b/drivers/net/can/slcan.c | |||
@@ -35,8 +35,6 @@ | |||
35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | 35 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
36 | * DAMAGE. | 36 | * DAMAGE. |
37 | * | 37 | * |
38 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
39 | * | ||
40 | */ | 38 | */ |
41 | 39 | ||
42 | #include <linux/module.h> | 40 | #include <linux/module.h> |
diff --git a/drivers/net/can/vcan.c b/drivers/net/can/vcan.c index a30b8f480f61..f93e2d6fc88c 100644 --- a/drivers/net/can/vcan.c +++ b/drivers/net/can/vcan.c | |||
@@ -37,8 +37,6 @@ | |||
37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | 37 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH |
38 | * DAMAGE. | 38 | * DAMAGE. |
39 | * | 39 | * |
40 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
41 | * | ||
42 | */ | 40 | */ |
43 | 41 | ||
44 | #include <linux/module.h> | 42 | #include <linux/module.h> |