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authorTomoya <tomoya-linux@dsn.okisemi.com>2010-12-12 15:24:08 -0500
committerDavid S. Miller <davem@davemloft.net>2010-12-13 15:24:19 -0500
commite489ccebf14657774fd877dc841b458703730586 (patch)
tree4873adfa3eff1d312402d1a7707164da75009812 /drivers/net/can
parent76d94b232940ca91e9b26c590cb7312ab88ff722 (diff)
pch_can: Divide poll function
To easy to read/understand, divide poll function into two sub-functions. Signed-off-by: Tomoya MORINAGA <tomoya-linux@dsn.okisemi.com> Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/can')
-rw-r--r--drivers/net/can/pch_can.c71
1 files changed, 35 insertions, 36 deletions
diff --git a/drivers/net/can/pch_can.c b/drivers/net/can/pch_can.c
index f0f140492c07..0b6d4f490296 100644
--- a/drivers/net/can/pch_can.c
+++ b/drivers/net/can/pch_can.c
@@ -819,72 +819,71 @@ RX_NEXT:
819 819
820 return rcv_pkts; 820 return rcv_pkts;
821} 821}
822static int pch_can_rx_poll(struct napi_struct *napi, int quota) 822
823static void pch_can_tx_complete(struct net_device *ndev, u32 int_stat)
823{ 824{
824 struct net_device *ndev = napi->dev;
825 struct pch_can_priv *priv = netdev_priv(ndev); 825 struct pch_can_priv *priv = netdev_priv(ndev);
826 struct net_device_stats *stats = &(priv->ndev->stats); 826 struct net_device_stats *stats = &(priv->ndev->stats);
827 u32 dlc; 827 u32 dlc;
828
829 can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1);
830 iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
831 &priv->regs->ifregs[1].cmask);
832 pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
833 dlc = get_can_dlc(ioread32(&priv->regs->ifregs[1].mcont) &
834 PCH_IF_MCONT_DLC);
835 stats->tx_bytes += dlc;
836 stats->tx_packets++;
837 if (int_stat == PCH_TX_OBJ_END)
838 netif_wake_queue(ndev);
839}
840
841static int pch_can_rx_poll(struct napi_struct *napi, int quota)
842{
843 struct net_device *ndev = napi->dev;
844 struct pch_can_priv *priv = netdev_priv(ndev);
828 u32 int_stat; 845 u32 int_stat;
829 int rcv_pkts = 0; 846 int rcv_pkts = 0;
830 u32 reg_stat; 847 u32 reg_stat;
831 848
832 int_stat = pch_can_int_pending(priv); 849 int_stat = pch_can_int_pending(priv);
833 if (!int_stat) 850 if (!int_stat)
834 return 0; 851 goto end;
835 852
836INT_STAT: 853 if ((int_stat == PCH_STATUS_INT) && (quota > 0)) {
837 if (int_stat == PCH_STATUS_INT) {
838 reg_stat = ioread32(&priv->regs->stat); 854 reg_stat = ioread32(&priv->regs->stat);
839 if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) { 855 if (reg_stat & (PCH_BUS_OFF | PCH_LEC_ALL)) {
840 if ((reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL) 856 if (reg_stat & PCH_BUS_OFF ||
857 (reg_stat & PCH_LEC_ALL) != PCH_LEC_ALL) {
841 pch_can_error(ndev, reg_stat); 858 pch_can_error(ndev, reg_stat);
859 quota--;
860 }
842 } 861 }
843 862
844 if (reg_stat & PCH_TX_OK) { 863 if (reg_stat & PCH_TX_OK)
845 iowrite32(PCH_CMASK_RX_TX_GET,
846 &priv->regs->ifregs[1].cmask);
847 pch_can_check_if_busy(&priv->regs->ifregs[1].creq,
848 ioread32(&priv->regs->intr));
849 pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK); 864 pch_can_bit_clear(&priv->regs->stat, PCH_TX_OK);
850 }
851 865
852 if (reg_stat & PCH_RX_OK) 866 if (reg_stat & PCH_RX_OK)
853 pch_can_bit_clear(&priv->regs->stat, PCH_RX_OK); 867 pch_can_bit_clear(&priv->regs->stat, PCH_RX_OK);
854 868
855 int_stat = pch_can_int_pending(priv); 869 int_stat = pch_can_int_pending(priv);
856 if (int_stat == PCH_STATUS_INT)
857 goto INT_STAT;
858 } 870 }
859 871
860MSG_OBJ: 872 if (quota == 0)
873 goto end;
874
861 if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) { 875 if ((int_stat >= PCH_RX_OBJ_START) && (int_stat <= PCH_RX_OBJ_END)) {
862 rcv_pkts = pch_can_rx_normal(ndev, int_stat); 876 rcv_pkts += pch_can_rx_normal(ndev, int_stat);
863 if (rcv_pkts < 0) 877 quota -= rcv_pkts;
864 return 0; 878 if (quota < 0)
879 goto end;
865 } else if ((int_stat >= PCH_TX_OBJ_START) && 880 } else if ((int_stat >= PCH_TX_OBJ_START) &&
866 (int_stat <= PCH_TX_OBJ_END)) { 881 (int_stat <= PCH_TX_OBJ_END)) {
867 /* Handle transmission interrupt */ 882 /* Handle transmission interrupt */
868 can_get_echo_skb(ndev, int_stat - PCH_RX_OBJ_END - 1); 883 pch_can_tx_complete(ndev, int_stat);
869 iowrite32(PCH_CMASK_RX_TX_GET | PCH_CMASK_CLRINTPND,
870 &priv->regs->ifregs[1].cmask);
871 dlc = ioread32(&priv->regs->ifregs[1].mcont) &
872 PCH_IF_MCONT_DLC;
873 pch_can_check_if_busy(&priv->regs->ifregs[1].creq, int_stat);
874 if (dlc > 8)
875 dlc = 8;
876 stats->tx_bytes += dlc;
877 stats->tx_packets++;
878 if (int_stat == PCH_TX_OBJ_END)
879 netif_wake_queue(ndev);
880 } 884 }
881 885
882 int_stat = pch_can_int_pending(priv); 886end:
883 if (int_stat == PCH_STATUS_INT)
884 goto INT_STAT;
885 else if (int_stat >= 1 && int_stat <= 32)
886 goto MSG_OBJ;
887
888 napi_complete(napi); 887 napi_complete(napi);
889 pch_can_set_int_enables(priv, PCH_CAN_ALL); 888 pch_can_set_int_enables(priv, PCH_CAN_ALL);
890 889