diff options
author | Wolfgang Grandegger <wg@grandegger.com> | 2009-05-15 19:39:30 -0400 |
---|---|---|
committer | David S. Miller <davem@davemloft.net> | 2009-05-18 18:41:41 -0400 |
commit | 429da1cc841bc9f2e762fd7272fc2b80314b890a (patch) | |
tree | a9ae764bf413b6597f8ec8a957483bd17f3c2941 /drivers/net/can/sja1000/sja1000.h | |
parent | 39549eef3587f1c1e8c65c88a2400d10fd30ea17 (diff) |
can: Driver for the SJA1000 CAN controller
This patch adds the generic Socket-CAN driver for the Philips SJA1000
full CAN controller.
Signed-off-by: Wolfgang Grandegger <wg@grandegger.com>
Signed-off-by: Oliver Hartkopp <oliver.hartkopp@volkswagen.de>
Signed-off-by: David S. Miller <davem@davemloft.net>
Diffstat (limited to 'drivers/net/can/sja1000/sja1000.h')
-rw-r--r-- | drivers/net/can/sja1000/sja1000.h | 180 |
1 files changed, 180 insertions, 0 deletions
diff --git a/drivers/net/can/sja1000/sja1000.h b/drivers/net/can/sja1000/sja1000.h new file mode 100644 index 000000000000..ccd302887964 --- /dev/null +++ b/drivers/net/can/sja1000/sja1000.h | |||
@@ -0,0 +1,180 @@ | |||
1 | /* | ||
2 | * sja1000.h - Philips SJA1000 network device driver | ||
3 | * | ||
4 | * Copyright (c) 2003 Matthias Brukner, Trajet Gmbh, Rebenring 33, | ||
5 | * 38106 Braunschweig, GERMANY | ||
6 | * | ||
7 | * Copyright (c) 2002-2007 Volkswagen Group Electronic Research | ||
8 | * All rights reserved. | ||
9 | * | ||
10 | * Redistribution and use in source and binary forms, with or without | ||
11 | * modification, are permitted provided that the following conditions | ||
12 | * are met: | ||
13 | * 1. Redistributions of source code must retain the above copyright | ||
14 | * notice, this list of conditions and the following disclaimer. | ||
15 | * 2. Redistributions in binary form must reproduce the above copyright | ||
16 | * notice, this list of conditions and the following disclaimer in the | ||
17 | * documentation and/or other materials provided with the distribution. | ||
18 | * 3. Neither the name of Volkswagen nor the names of its contributors | ||
19 | * may be used to endorse or promote products derived from this software | ||
20 | * without specific prior written permission. | ||
21 | * | ||
22 | * Alternatively, provided that this notice is retained in full, this | ||
23 | * software may be distributed under the terms of the GNU General | ||
24 | * Public License ("GPL") version 2, in which case the provisions of the | ||
25 | * GPL apply INSTEAD OF those given above. | ||
26 | * | ||
27 | * The provided data structures and external interfaces from this code | ||
28 | * are not restricted to be used by modules with a GPL compatible license. | ||
29 | * | ||
30 | * THIS SOFTWARE IS PROVIDED BY THE COPYRIGHT HOLDERS AND CONTRIBUTORS | ||
31 | * "AS IS" AND ANY EXPRESS OR IMPLIED WARRANTIES, INCLUDING, BUT NOT | ||
32 | * LIMITED TO, THE IMPLIED WARRANTIES OF MERCHANTABILITY AND FITNESS FOR | ||
33 | * A PARTICULAR PURPOSE ARE DISCLAIMED. IN NO EVENT SHALL THE COPYRIGHT | ||
34 | * OWNER OR CONTRIBUTORS BE LIABLE FOR ANY DIRECT, INDIRECT, INCIDENTAL, | ||
35 | * SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT NOT | ||
36 | * LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES; LOSS OF USE, | ||
37 | * DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED AND ON ANY | ||
38 | * THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT | ||
39 | * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE | ||
40 | * OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH | ||
41 | * DAMAGE. | ||
42 | * | ||
43 | * Send feedback to <socketcan-users@lists.berlios.de> | ||
44 | * | ||
45 | */ | ||
46 | |||
47 | #ifndef SJA1000_DEV_H | ||
48 | #define SJA1000_DEV_H | ||
49 | |||
50 | #include <linux/can/dev.h> | ||
51 | #include <linux/can/platform/sja1000.h> | ||
52 | |||
53 | #define SJA1000_MAX_IRQ 20 /* max. number of interrupts handled in ISR */ | ||
54 | |||
55 | /* SJA1000 registers - manual section 6.4 (Pelican Mode) */ | ||
56 | #define REG_MOD 0x00 | ||
57 | #define REG_CMR 0x01 | ||
58 | #define REG_SR 0x02 | ||
59 | #define REG_IR 0x03 | ||
60 | #define REG_IER 0x04 | ||
61 | #define REG_ALC 0x0B | ||
62 | #define REG_ECC 0x0C | ||
63 | #define REG_EWL 0x0D | ||
64 | #define REG_RXERR 0x0E | ||
65 | #define REG_TXERR 0x0F | ||
66 | #define REG_ACCC0 0x10 | ||
67 | #define REG_ACCC1 0x11 | ||
68 | #define REG_ACCC2 0x12 | ||
69 | #define REG_ACCC3 0x13 | ||
70 | #define REG_ACCM0 0x14 | ||
71 | #define REG_ACCM1 0x15 | ||
72 | #define REG_ACCM2 0x16 | ||
73 | #define REG_ACCM3 0x17 | ||
74 | #define REG_RMC 0x1D | ||
75 | #define REG_RBSA 0x1E | ||
76 | |||
77 | /* Common registers - manual section 6.5 */ | ||
78 | #define REG_BTR0 0x06 | ||
79 | #define REG_BTR1 0x07 | ||
80 | #define REG_OCR 0x08 | ||
81 | #define REG_CDR 0x1F | ||
82 | |||
83 | #define REG_FI 0x10 | ||
84 | #define SFF_BUF 0x13 | ||
85 | #define EFF_BUF 0x15 | ||
86 | |||
87 | #define FI_FF 0x80 | ||
88 | #define FI_RTR 0x40 | ||
89 | |||
90 | #define REG_ID1 0x11 | ||
91 | #define REG_ID2 0x12 | ||
92 | #define REG_ID3 0x13 | ||
93 | #define REG_ID4 0x14 | ||
94 | |||
95 | #define CAN_RAM 0x20 | ||
96 | |||
97 | /* mode register */ | ||
98 | #define MOD_RM 0x01 | ||
99 | #define MOD_LOM 0x02 | ||
100 | #define MOD_STM 0x04 | ||
101 | #define MOD_AFM 0x08 | ||
102 | #define MOD_SM 0x10 | ||
103 | |||
104 | /* commands */ | ||
105 | #define CMD_SRR 0x10 | ||
106 | #define CMD_CDO 0x08 | ||
107 | #define CMD_RRB 0x04 | ||
108 | #define CMD_AT 0x02 | ||
109 | #define CMD_TR 0x01 | ||
110 | |||
111 | /* interrupt sources */ | ||
112 | #define IRQ_BEI 0x80 | ||
113 | #define IRQ_ALI 0x40 | ||
114 | #define IRQ_EPI 0x20 | ||
115 | #define IRQ_WUI 0x10 | ||
116 | #define IRQ_DOI 0x08 | ||
117 | #define IRQ_EI 0x04 | ||
118 | #define IRQ_TI 0x02 | ||
119 | #define IRQ_RI 0x01 | ||
120 | #define IRQ_ALL 0xFF | ||
121 | #define IRQ_OFF 0x00 | ||
122 | |||
123 | /* status register content */ | ||
124 | #define SR_BS 0x80 | ||
125 | #define SR_ES 0x40 | ||
126 | #define SR_TS 0x20 | ||
127 | #define SR_RS 0x10 | ||
128 | #define SR_TCS 0x08 | ||
129 | #define SR_TBS 0x04 | ||
130 | #define SR_DOS 0x02 | ||
131 | #define SR_RBS 0x01 | ||
132 | |||
133 | #define SR_CRIT (SR_BS|SR_ES) | ||
134 | |||
135 | /* ECC register */ | ||
136 | #define ECC_SEG 0x1F | ||
137 | #define ECC_DIR 0x20 | ||
138 | #define ECC_ERR 6 | ||
139 | #define ECC_BIT 0x00 | ||
140 | #define ECC_FORM 0x40 | ||
141 | #define ECC_STUFF 0x80 | ||
142 | #define ECC_MASK 0xc0 | ||
143 | |||
144 | /* | ||
145 | * Flags for sja1000priv.flags | ||
146 | */ | ||
147 | #define SJA1000_CUSTOM_IRQ_HANDLER 0x1 | ||
148 | |||
149 | /* | ||
150 | * SJA1000 private data structure | ||
151 | */ | ||
152 | struct sja1000_priv { | ||
153 | struct can_priv can; /* must be the first member */ | ||
154 | int open_time; | ||
155 | struct sk_buff *echo_skb; | ||
156 | |||
157 | /* the lower-layer is responsible for appropriate locking */ | ||
158 | u8 (*read_reg) (const struct net_device *dev, int reg); | ||
159 | void (*write_reg) (const struct net_device *dev, int reg, u8 val); | ||
160 | void (*pre_irq) (const struct net_device *dev); | ||
161 | void (*post_irq) (const struct net_device *dev); | ||
162 | |||
163 | void *priv; /* for board-specific data */ | ||
164 | struct net_device *dev; | ||
165 | |||
166 | unsigned long irq_flags; /* for request_irq() */ | ||
167 | |||
168 | u16 flags; /* custom mode flags */ | ||
169 | u8 ocr; /* output control register */ | ||
170 | u8 cdr; /* clock divider register */ | ||
171 | }; | ||
172 | |||
173 | struct net_device *alloc_sja1000dev(int sizeof_priv); | ||
174 | void free_sja1000dev(struct net_device *dev); | ||
175 | int register_sja1000dev(struct net_device *dev); | ||
176 | void unregister_sja1000dev(struct net_device *dev); | ||
177 | |||
178 | irqreturn_t sja1000_interrupt(int irq, void *dev_id); | ||
179 | |||
180 | #endif /* SJA1000_DEV_H */ | ||